1 /* 2 * Copyright (c) 2018-2022 Arm Limited. All rights reserved. 3 * Copyright 2019-2023 NXP. All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #ifndef __FLASH_LAYOUT_H__ 19 #define __FLASH_LAYOUT_H__ 20 21 /* Flash layout on LPC55S69 with BL2 (multiple image boot): 22 * 23 * 0x0000_0000 BL2 - MCUBoot (32 KB) 24 * 0x0000_8000 Secure image primary slot (160 KB) 25 * 0x0003_0000 Non-secure image primary slot (96 KB) 26 * 0x0004_8000 Secure image secondary slot (160 KB) 27 * 0x0007_0000 Non-secure image secondary slot (96 KB) 28 * 0x0008_8000 Protected Storage Area (10 KB) 29 * 0x0008_A800 Internal Trusted Storage Area (8 KB) 30 * 0x0008_C800 OTP / NV counters area (2 KB) 31 * 0x0008_D000 Unused (44 KB) 32 * 33 * Flash layout on LPC55S69 with BL2 (single image boot): 34 * 35 * 0x0000_0000 BL2 - MCUBoot (32 KB) 36 * 0x0000_8000 Primary image area (Secure + Non-secure images) (256 KB) 37 * 0x0004_8000 Secondary image area (Secure + Non-secure images) (256 KB) 38 * 0x0008_8000 Protected Storage Area (10 KB) 39 * 0x0008_A800 Internal Trusted Storage Area (8 KB) 40 * 0x0008_C800 OTP / NV counters area (2 KB) 41 * 0x0008_D000 Unused (44 KB) 42 * 43 * Flash layout on LPC55S69 without BL2: 44 * 45 * 0x0000_0000 Primary image area(576 kB): 46 * 0x0000_0000 Secure image primary (320 kB) 47 * 0x0005_0000 Non-secure image primary (256 kB) 48 * Reserved area: 49 * 0xXXXX_XXXX Secure Binary tail Area (4 KB), if SB is used. 50 * 0xXXXX_XXXX Protected Storage Area (3 KB) 51 * 0xXXXX_XXXX Internal Trusted Storage Area (3 KB) 52 * 0xXXXX_XXXX OTP area (2 KB) 53 * 0xXXXX_XXXX Unused 54 */ 55 56 /* This header file is included from linker scatter file as well, where only a 57 * limited C constructs are allowed. Therefore it is not possible to include 58 * here the platform_base_address.h to access flash related defines. To resolve 59 * this some of the values are redefined here with different names, these are 60 * marked with comment. 61 */ 62 63 /* Size of a Secure and of a Non-secure image */ 64 #ifdef BL2 65 66 #define FLASH_S_PARTITION_SIZE (0x28000) /* S partition: 160 KB */ 67 #define FLASH_NS_PARTITION_SIZE (0x18000) /* NS partition: 96 KB */ 68 69 #if (FLASH_S_PARTITION_SIZE > FLASH_NS_PARTITION_SIZE) 70 #define FLASH_MAX_PARTITION_SIZE FLASH_S_PARTITION_SIZE 71 #else 72 #define FLASH_MAX_PARTITION_SIZE FLASH_NS_PARTITION_SIZE 73 #endif 74 #else /* NO BL2 */ 75 76 #define FLASH_S_PARTITION_SIZE (0x50000) /* S partition: 320 kB*/ 77 #define FLASH_NS_PARTITION_SIZE (0x40000) /* NS partition: 256 kB*/ 78 79 #endif /* BL2 */ 80 81 /* Sector size of the embedded flash hardware (erase/program) */ 82 #define FLASH_AREA_IMAGE_SECTOR_SIZE (512) /* 512 B. Flash memory program/erase operations have a page granularity. */ 83 84 /* FLASH size */ 85 #define FLASH_TOTAL_SIZE (0x000A0000-(17*FLASH_AREA_IMAGE_SECTOR_SIZE)) /* 631.5 kB. The last 17 pages (8.5KB) are reserved for PFR on the 640KB flash. */ 86 87 /* Flash layout info for BL2 bootloader */ 88 #define FLASH_BASE_ADDRESS (0x00000000) 89 90 #ifdef BL2 91 /* Offset and size definitions of the flash partitions that are handled by the 92 * bootloader. The image swapping is done between IMAGE_PRIMARY and 93 * IMAGE_SECONDARY, SCRATCH is used as a temporary storage during image 94 * swapping. 95 */ 96 #define FLASH_AREA_BL2_OFFSET (0x0) 97 #define FLASH_AREA_BL2_SIZE (0x8000) /* 32 KB */ 98 99 #if !defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1) 100 /* Secure + Non-secure image primary slot */ 101 #define FLASH_AREA_0_ID (1) 102 #define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) 103 #define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE + \ 104 FLASH_NS_PARTITION_SIZE) 105 /* Secure + Non-secure secondary slot */ 106 #define FLASH_AREA_2_ID (FLASH_AREA_0_ID + 1) 107 #define FLASH_AREA_2_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) 108 #define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE + \ 109 FLASH_NS_PARTITION_SIZE) 110 /* Not used (scratch area), the 'Swap' firmware upgrade operation is not 111 * supported on LPC55S69. 112 */ 113 #define FLASH_AREA_SCRATCH_ID (FLASH_AREA_2_ID + 1) 114 #define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) 115 #define FLASH_AREA_SCRATCH_SIZE (0) 116 /* Maximum number of image sectors supported by the bootloader. */ 117 #define MCUBOOT_MAX_IMG_SECTORS ((FLASH_S_PARTITION_SIZE + \ 118 FLASH_NS_PARTITION_SIZE) / \ 119 FLASH_AREA_IMAGE_SECTOR_SIZE) 120 #elif (MCUBOOT_IMAGE_NUMBER == 2) 121 /* Secure image primary slot */ 122 #define FLASH_AREA_0_ID (1) 123 #define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) 124 #define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE) 125 /* Non-secure image primary slot */ 126 #define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1) 127 #define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) 128 #define FLASH_AREA_1_SIZE (FLASH_NS_PARTITION_SIZE) 129 /* Secure image secondary slot */ 130 #define FLASH_AREA_2_ID (FLASH_AREA_1_ID + 1) 131 #define FLASH_AREA_2_OFFSET (FLASH_AREA_1_OFFSET + FLASH_AREA_1_SIZE) 132 #define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE) 133 /* Non-secure image secondary slot */ 134 #define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1) 135 #define FLASH_AREA_3_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) 136 #define FLASH_AREA_3_SIZE (FLASH_NS_PARTITION_SIZE) 137 /* Not used (scratch area), the 'Swap' firmware upgrade operation is not 138 * supported on LPC55S69. 139 */ 140 #define FLASH_AREA_SCRATCH_ID (FLASH_AREA_3_ID + 1) 141 #define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_3_OFFSET + FLASH_AREA_3_SIZE) 142 #define FLASH_AREA_SCRATCH_SIZE (0) 143 /* Maximum number of image sectors supported by the bootloader. */ 144 #define MCUBOOT_MAX_IMG_SECTORS (FLASH_MAX_PARTITION_SIZE / \ 145 FLASH_AREA_IMAGE_SECTOR_SIZE) 146 #else /* MCUBOOT_IMAGE_NUMBER > 2 */ 147 #error "Only MCUBOOT_IMAGE_NUMBER 1 and 2 are supported!" 148 #endif /* MCUBOOT_IMAGE_NUMBER */ 149 150 /* Not used, the 'Swap' firmware upgrade operation is not supported on LPC55S69. 151 * The maximum number of status entries supported by the bootloader. 152 */ 153 #define MCUBOOT_STATUS_MAX_ENTRIES (0) 154 155 #else /* NO BL2 */ 156 157 158 #ifdef SB_FILE /* Use signed Secure Binary (SB) image */ 159 #define FLASH_SB_TAIL 0x1000 /* 4 KB */ 160 #else 161 #define FLASH_SB_TAIL 0x0 /* 0 KB */ 162 #endif 163 164 /* Secure + Non-secure image primary slot */ 165 #define FLASH_AREA_0_ID (1) 166 #define FLASH_AREA_0_OFFSET (0x0) 167 #define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE + \ 168 FLASH_NS_PARTITION_SIZE + \ 169 FLASH_SB_TAIL) 170 171 /* Not used*/ 172 #define FLASH_AREA_SCRATCH_ID (FLASH_AREA_0_ID + 1) 173 #define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) 174 #define FLASH_AREA_SCRATCH_SIZE (0) 175 #endif /* BL2 */ 176 177 /* Note: FLASH_PS_AREA_OFFSET, FLASH_ITS_AREA_OFFSET and 178 * FLASH_OTP_NV_COUNTERS_AREA_OFFSET point to offsets in flash, but reads and 179 * writes to these addresses are redirected to Code SRAM by Driver_Flash.c. 180 */ 181 182 /* Protected Storage (PS) Service definitions */ 183 #define FLASH_PS_AREA_OFFSET (FLASH_AREA_SCRATCH_OFFSET + \ 184 FLASH_AREA_SCRATCH_SIZE) 185 #define FLASH_PS_AREA_SIZE (0xC00) /* 3 KB */ 186 187 /* Internal Trusted Storage (ITS) Service definitions */ 188 #define FLASH_ITS_AREA_OFFSET (FLASH_PS_AREA_OFFSET + \ 189 FLASH_PS_AREA_SIZE) 190 #define FLASH_ITS_AREA_SIZE (0xC00) /* 3 KB */ 191 192 /* OTP_definitions */ 193 #define FLASH_OTP_NV_COUNTERS_AREA_OFFSET (FLASH_ITS_AREA_OFFSET + \ 194 FLASH_ITS_AREA_SIZE) 195 #define FLASH_OTP_NV_COUNTERS_AREA_SIZE (FLASH_AREA_IMAGE_SECTOR_SIZE * 4) 196 #define FLASH_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE 197 198 /* Offset and size definition in flash area used by assemble.py */ 199 #define SECURE_IMAGE_OFFSET (0x0) 200 #define SECURE_IMAGE_MAX_SIZE FLASH_S_PARTITION_SIZE 201 202 #define NON_SECURE_IMAGE_OFFSET (SECURE_IMAGE_OFFSET + \ 203 SECURE_IMAGE_MAX_SIZE) 204 #define NON_SECURE_IMAGE_MAX_SIZE FLASH_NS_PARTITION_SIZE 205 206 /* Flash device name used by BL2 207 * Name is defined in flash driver file: Driver_Flash.c 208 */ 209 #define FLASH_DEV_NAME Driver_FLASH0 210 /* Smallest flash programmable unit in bytes */ 211 #define TFM_HAL_FLASH_PROGRAM_UNIT FLASH_AREA_IMAGE_SECTOR_SIZE 212 213 /* Protected Storage (PS) Service definitions 214 * Note: Further documentation of these definitions can be found in the 215 * TF-M PS Integration Guide. 216 */ 217 #define TFM_HAL_PS_FLASH_DRIVER Driver_FLASH0 218 219 /* In this target the CMSIS driver requires only the offset from the base 220 * address instead of the full memory address. 221 */ 222 /* Base address of dedicated flash area for PS */ 223 #define TFM_HAL_PS_FLASH_AREA_ADDR FLASH_PS_AREA_OFFSET 224 /* Size of dedicated flash area for PS */ 225 #define TFM_HAL_PS_FLASH_AREA_SIZE FLASH_PS_AREA_SIZE 226 #define PS_RAM_FS_SIZE TFM_HAL_PS_FLASH_AREA_SIZE 227 /* Number of physical erase sectors per logical FS block */ 228 #define TFM_HAL_PS_SECTORS_PER_BLOCK 3 229 230 /* Smallest flash programmable unit in bytes */ 231 #define TFM_HAL_PS_PROGRAM_UNIT FLASH_AREA_IMAGE_SECTOR_SIZE 232 #define PS_FLASH_NAND_BUF_SIZE (FLASH_AREA_IMAGE_SECTOR_SIZE * \ 233 TFM_HAL_PS_SECTORS_PER_BLOCK) 234 235 /* Internal Trusted Storage (ITS) Service definitions 236 * Note: Further documentation of these definitions can be found in the 237 * TF-M ITS Integration Guide. The ITS should be in the internal flash, but is 238 * allocated in the external flash just for development platforms that don't 239 * have internal flash available. 240 */ 241 #define TFM_HAL_ITS_FLASH_DRIVER Driver_FLASH0 242 243 /* In this target the CMSIS driver requires only the offset from the base 244 * address instead of the full memory address. 245 */ 246 /* Base address of dedicated flash area for ITS */ 247 #define TFM_HAL_ITS_FLASH_AREA_ADDR FLASH_ITS_AREA_OFFSET 248 /* Size of dedicated flash area for ITS */ 249 #define TFM_HAL_ITS_FLASH_AREA_SIZE FLASH_ITS_AREA_SIZE 250 #define ITS_RAM_FS_SIZE TFM_HAL_ITS_FLASH_AREA_SIZE 251 /* Number of physical erase sectors per logical FS block */ 252 #define TFM_HAL_ITS_SECTORS_PER_BLOCK 3 253 254 /* Smallest flash programmable unit in bytes */ 255 #define TFM_HAL_ITS_PROGRAM_UNIT FLASH_AREA_IMAGE_SECTOR_SIZE 256 #define ITS_FLASH_NAND_BUF_SIZE (FLASH_AREA_IMAGE_SECTOR_SIZE * \ 257 TFM_HAL_ITS_SECTORS_PER_BLOCK) 258 259 /* OTP / NV counter definitions */ 260 #define TFM_OTP_NV_COUNTERS_AREA_SIZE (FLASH_OTP_NV_COUNTERS_AREA_SIZE / 2) 261 #define TFM_OTP_NV_COUNTERS_AREA_ADDR FLASH_OTP_NV_COUNTERS_AREA_OFFSET 262 #define TFM_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_OTP_NV_COUNTERS_SECTOR_SIZE 263 #define TFM_OTP_NV_COUNTERS_BACKUP_AREA_ADDR (TFM_OTP_NV_COUNTERS_AREA_ADDR + \ 264 TFM_OTP_NV_COUNTERS_AREA_SIZE) 265 266 /* Use Flash memory to store Code data */ 267 #define S_ROM_ALIAS_BASE (0x10000000) 268 #define NS_ROM_ALIAS_BASE (0x00000000) 269 270 /* Use SRAM[0-4] memory to store RW data */ 271 #define S_RAM_ALIAS_BASE (0x30000000) 272 #define NS_RAM_ALIAS_BASE (0x20000000) 273 274 #define TOTAL_ROM_SIZE FLASH_TOTAL_SIZE 275 #define TOTAL_RAM_SIZE (0x00044000) /* RAM 0-4. 272 KB RAM for data (without SRAM X for code)*/ 276 277 #endif /* __FLASH_LAYOUT_H__ */
