1 /*
2 * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /*
20 * This file is derivative of CMSIS V5.9.0 startup_ARMCM33.c
21 * Git SHA: 2b7495b8535bdcb306dac29b9ded4cfb679d7e5c
22 */
23
24 /* NS linker scripts using the default CMSIS style naming conventions, while the
25 * secure and bl2 linker scripts remain untouched (region.h compatibility).
26 * To be compatible with the untouched files (which using ARMCLANG naming style),
27 * we have to override __INITIAL_SP and __STACK_LIMIT labels. */
28 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
29 #include "cmsis_override.h"
30 #endif
31
32 #include "tfm_hal_device_header.h"
33
34 /*----------------------------------------------------------------------------
35 External References
36 *----------------------------------------------------------------------------*/
37 extern uint32_t __INITIAL_SP;
38 extern uint32_t __STACK_LIMIT;
39 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
40 extern uint64_t __STACK_SEAL;
41 #endif
42
43 typedef void(*VECTOR_TABLE_Type)(void);
44
45 extern __NO_RETURN void __PROGRAM_START(void);
46
47 /*----------------------------------------------------------------------------
48 Internal References
49 *----------------------------------------------------------------------------*/
50 __NO_RETURN void Reset_Handler (void);
51
52 /*----------------------------------------------------------------------------
53 Exception / Interrupt Handler
54 *----------------------------------------------------------------------------*/
55 #define DEFAULT_IRQ_HANDLER(handler_name) \
56 __NO_RETURN void __WEAK handler_name(void); \
57 void handler_name(void) { \
58 while(1); \
59 }
60
61 /* Exceptions */
62 DEFAULT_IRQ_HANDLER(NMI_Handler)
63 DEFAULT_IRQ_HANDLER(HardFault_Handler)
64 DEFAULT_IRQ_HANDLER(MemManage_Handler)
65 DEFAULT_IRQ_HANDLER(BusFault_Handler)
66 DEFAULT_IRQ_HANDLER(UsageFault_Handler)
67 DEFAULT_IRQ_HANDLER(SecureFault_Handler)
68 DEFAULT_IRQ_HANDLER(SVC_Handler)
69 DEFAULT_IRQ_HANDLER(DebugMon_Handler)
70 DEFAULT_IRQ_HANDLER(PendSV_Handler)
71 DEFAULT_IRQ_HANDLER(SysTick_Handler)
72
73 DEFAULT_IRQ_HANDLER(WDT_BOD_IRQHandler)
74 DEFAULT_IRQ_HANDLER(DMA0_IRQHandler)
75 DEFAULT_IRQ_HANDLER(GINT0_IRQHandler)
76 DEFAULT_IRQ_HANDLER(GINT1_IRQHandler)
77 DEFAULT_IRQ_HANDLER(PIN_INT0_IRQHandler)
78 DEFAULT_IRQ_HANDLER(PIN_INT1_IRQHandler)
79 DEFAULT_IRQ_HANDLER(PIN_INT2_IRQHandler)
80 DEFAULT_IRQ_HANDLER(PIN_INT3_IRQHandler)
81 DEFAULT_IRQ_HANDLER(UTICK0_IRQHandler)
82 DEFAULT_IRQ_HANDLER(MRT0_IRQHandler)
83 DEFAULT_IRQ_HANDLER(CTIMER0_IRQHandler)
84 DEFAULT_IRQ_HANDLER(CTIMER1_IRQHandler)
85 DEFAULT_IRQ_HANDLER(SCT0_IRQHandler)
86 DEFAULT_IRQ_HANDLER(CTIMER3_IRQHandler)
87 DEFAULT_IRQ_HANDLER(FLEXCOMM0_IRQHandler)
88 DEFAULT_IRQ_HANDLER(FLEXCOMM1_IRQHandler)
89 DEFAULT_IRQ_HANDLER(FLEXCOMM2_IRQHandler)
90 DEFAULT_IRQ_HANDLER(FLEXCOMM3_IRQHandler)
91 DEFAULT_IRQ_HANDLER(FLEXCOMM4_IRQHandler)
92 DEFAULT_IRQ_HANDLER(FLEXCOMM5_IRQHandler)
93 DEFAULT_IRQ_HANDLER(FLEXCOMM6_IRQHandler)
94 DEFAULT_IRQ_HANDLER(FLEXCOMM7_IRQHandler)
95 DEFAULT_IRQ_HANDLER(ADC0_IRQHandler)
96 DEFAULT_IRQ_HANDLER(Reserved39_IRQHandler)
97 DEFAULT_IRQ_HANDLER(ACMP_IRQHandler)
98 DEFAULT_IRQ_HANDLER(Reserved41_IRQHandler)
99 DEFAULT_IRQ_HANDLER(Reserved42_IRQHandler)
100 DEFAULT_IRQ_HANDLER(USB0_NEEDCLK_IRQHandler)
101 DEFAULT_IRQ_HANDLER(USB0_IRQHandler)
102 DEFAULT_IRQ_HANDLER(RTC_IRQHandler)
103 DEFAULT_IRQ_HANDLER(Reserved46_IRQHandler)
104 DEFAULT_IRQ_HANDLER(MAILBOX_IRQHandler)
105 DEFAULT_IRQ_HANDLER(PIN_INT4_IRQHandler)
106 DEFAULT_IRQ_HANDLER(PIN_INT5_IRQHandler)
107 DEFAULT_IRQ_HANDLER(PIN_INT6_IRQHandler)
108 DEFAULT_IRQ_HANDLER(PIN_INT7_IRQHandler)
109 DEFAULT_IRQ_HANDLER(CTIMER2_IRQHandler)
110 DEFAULT_IRQ_HANDLER(CTIMER4_IRQHandler)
111 DEFAULT_IRQ_HANDLER(OS_EVENT_IRQHandler)
112 DEFAULT_IRQ_HANDLER(Reserved55_IRQHandler)
113 DEFAULT_IRQ_HANDLER(Reserved56_IRQHandler)
114 DEFAULT_IRQ_HANDLER(Reserved57_IRQHandler)
115 DEFAULT_IRQ_HANDLER(SDIO_IRQHandler)
116 DEFAULT_IRQ_HANDLER(Reserved59_IRQHandler)
117 DEFAULT_IRQ_HANDLER(Reserved60_IRQHandler)
118 DEFAULT_IRQ_HANDLER(Reserved61_IRQHandler)
119 DEFAULT_IRQ_HANDLER(USB1_PHY_IRQHandler)
120 DEFAULT_IRQ_HANDLER(USB1_IRQHandler)
121 DEFAULT_IRQ_HANDLER(USB1_NEEDCLK_IRQHandler)
122 DEFAULT_IRQ_HANDLER(SEC_HYPERVISOR_CALL_IRQHandler)
123 DEFAULT_IRQ_HANDLER(SEC_GPIO_INT0_IRQ0_IRQHandler)
124 DEFAULT_IRQ_HANDLER(SEC_GPIO_INT0_IRQ1_IRQHandler)
125 DEFAULT_IRQ_HANDLER(PLU_IRQHandler)
126 DEFAULT_IRQ_HANDLER(SEC_VIO_IRQHandler)
127 DEFAULT_IRQ_HANDLER(HASHCRYPT_IRQHandler)
128 DEFAULT_IRQ_HANDLER(CASER_IRQHandler)
129 DEFAULT_IRQ_HANDLER(PUF_IRQHandler)
130 DEFAULT_IRQ_HANDLER(PQ_IRQHandler)
131 DEFAULT_IRQ_HANDLER(DMA1_IRQHandler)
132 DEFAULT_IRQ_HANDLER(FLEXCOMM8_IRQHandler)
133
134 /*----------------------------------------------------------------------------
135 Exception / Interrupt Vector table
136 *----------------------------------------------------------------------------*/
137
138 #if defined ( __GNUC__ )
139 #pragma GCC diagnostic push
140 #pragma GCC diagnostic ignored "-Wpedantic"
141 #endif
142
143 extern const VECTOR_TABLE_Type __VECTOR_TABLE[];
144 const VECTOR_TABLE_Type __VECTOR_TABLE[] __VECTOR_TABLE_ATTRIBUTE = {
145 (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
146 Reset_Handler, /* Reset Handler */
147 NMI_Handler, /* NMI Handler*/
148 HardFault_Handler, /* Hard Fault Handler*/
149 MemManage_Handler, /* MPU Fault Handler*/
150 BusFault_Handler, /* Bus Fault Handler*/
151 UsageFault_Handler, /* Usage Fault Handler*/
152 SecureFault_Handler, /* Secure Fault Handler */
153 0, /* Reserved*/
154 0, /* Reserved*/
155 0, /* Reserved*/
156 SVC_Handler, /* SVCall Handler*/
157 DebugMon_Handler, /* Debug Monitor Handler*/
158 0, /* Reserved*/
159 PendSV_Handler, /* PendSV Handler*/
160 SysTick_Handler, /* SysTick Handler*/
161
162 /* External Interrupts*/
163 WDT_BOD_IRQHandler, /* Windowed watchdog timer, Brownout detect, Flash interrupt */
164 DMA0_IRQHandler, /* DMA0 controller */
165 GINT0_IRQHandler, /* GPIO group 0 */
166 GINT1_IRQHandler, /* GPIO group 1 */
167 PIN_INT0_IRQHandler, /* Pin interrupt 0 or pattern match engine slice 0 */
168 PIN_INT1_IRQHandler, /* Pin interrupt 1or pattern match engine slice 1 */
169 PIN_INT2_IRQHandler, /* Pin interrupt 2 or pattern match engine slice 2 */
170 PIN_INT3_IRQHandler, /* Pin interrupt 3 or pattern match engine slice 3 */
171 UTICK0_IRQHandler, /* Micro-tick Timer */
172 MRT0_IRQHandler, /* Multi-rate timer */
173 CTIMER0_IRQHandler, /* Standard counter/timer CTIMER0 */
174 CTIMER1_IRQHandler, /* Standard counter/timer CTIMER1 */
175 SCT0_IRQHandler, /* SCTimer/PWM */
176 CTIMER3_IRQHandler, /* Standard counter/timer CTIMER3 */
177 FLEXCOMM0_IRQHandler, /* Flexcomm Interface 0 (USART, SPI, I2C, I2S, FLEXCOMM) */
178 FLEXCOMM1_IRQHandler, /* Flexcomm Interface 1 (USART, SPI, I2C, I2S, FLEXCOMM) */
179 FLEXCOMM2_IRQHandler, /* Flexcomm Interface 2 (USART, SPI, I2C, I2S, FLEXCOMM) */
180 FLEXCOMM3_IRQHandler, /* Flexcomm Interface 3 (USART, SPI, I2C, I2S, FLEXCOMM) */
181 FLEXCOMM4_IRQHandler, /* Flexcomm Interface 4 (USART, SPI, I2C, I2S, FLEXCOMM) */
182 FLEXCOMM5_IRQHandler, /* Flexcomm Interface 5 (USART, SPI, I2C, I2S, FLEXCOMM) */
183 FLEXCOMM6_IRQHandler, /* Flexcomm Interface 6 (USART, SPI, I2C, I2S, FLEXCOMM) */
184 FLEXCOMM7_IRQHandler, /* Flexcomm Interface 7 (USART, SPI, I2C, I2S, FLEXCOMM) */
185 ADC0_IRQHandler, /* ADC0 */
186 Reserved39_IRQHandler, /* Reserved interrupt */
187 ACMP_IRQHandler, /* ACMP interrupts */
188 Reserved41_IRQHandler, /* Reserved interrupt */
189 Reserved42_IRQHandler, /* Reserved interrupt */
190 USB0_NEEDCLK_IRQHandler, /* USB Activity Wake-up Interrupt */
191 USB0_IRQHandler, /* USB device */
192 RTC_IRQHandler, /* RTC alarm and wake-up interrupts */
193 Reserved46_IRQHandler, /* Reserved interrupt */
194 MAILBOX_IRQHandler, /* WAKEUP,Mailbox interrupt (present on selected devices) */
195 PIN_INT4_IRQHandler, /* Pin interrupt 4 or pattern match engine slice 4 int */
196 PIN_INT5_IRQHandler, /* Pin interrupt 5 or pattern match engine slice 5 int */
197 PIN_INT6_IRQHandler, /* Pin interrupt 6 or pattern match engine slice 6 int */
198 PIN_INT7_IRQHandler, /* Pin interrupt 7 or pattern match engine slice 7 int */
199 CTIMER2_IRQHandler, /* Standard counter/timer CTIMER2 */
200 CTIMER4_IRQHandler, /* Standard counter/timer CTIMER4 */
201 OS_EVENT_IRQHandler, /* OSEVTIMER0 and OSEVTIMER0_WAKEUP interrupts */
202 Reserved55_IRQHandler, /* Reserved interrupt */
203 Reserved56_IRQHandler, /* Reserved interrupt */
204 Reserved57_IRQHandler, /* Reserved interrupt */
205 SDIO_IRQHandler, /* SD/MMC */
206 Reserved59_IRQHandler, /* Reserved interrupt */
207 Reserved60_IRQHandler, /* Reserved interrupt */
208 Reserved61_IRQHandler, /* Reserved interrupt */
209 USB1_PHY_IRQHandler, /* USB1_PHY */
210 USB1_IRQHandler, /* USB1 interrupt */
211 USB1_NEEDCLK_IRQHandler, /* USB1 activity */
212 SEC_HYPERVISOR_CALL_IRQHandler, /* SEC_HYPERVISOR_CALL interrupt */
213 SEC_GPIO_INT0_IRQ0_IRQHandler, /* SEC_GPIO_INT0_IRQ0 interrupt */
214 SEC_GPIO_INT0_IRQ1_IRQHandler, /* SEC_GPIO_INT0_IRQ1 interrupt */
215 PLU_IRQHandler, /* PLU interrupt */
216 SEC_VIO_IRQHandler, /* SEC_VIO interrupt */
217 HASHCRYPT_IRQHandler, /* HASHCRYPT interrupt */
218 CASER_IRQHandler, /* CASPER interrupt */
219 PUF_IRQHandler, /* PUF interrupt */
220 PQ_IRQHandler, /* PQ interrupt */
221 DMA1_IRQHandler, /* DMA1 interrupt */
222 FLEXCOMM8_IRQHandler, /* Flexcomm Interface 8 (SPI, , FLEXCOMM) */
223 };
224
225 #if defined ( __GNUC__ )
226 #pragma GCC diagnostic pop
227 #endif
228
229 /*----------------------------------------------------------------------------
230 Reset Handler called on controller reset
231 *----------------------------------------------------------------------------*/
Reset_Handler(void)232 void Reset_Handler(void)
233 {
234 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
235 __disable_irq();
236 #endif
237 __set_PSP((uint32_t)(&__INITIAL_SP));
238
239 __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
240 __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
241
242 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
243 __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
244 #endif
245
246 SystemInit(); /* CMSIS System Initialization */
247 __PROGRAM_START(); /* Enter PreMain (C library entry point) */
248 }
249
