1 /* 2 * Copyright (c) 2017-2020 Arm Limited 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __TARGET_CFG_H__ 18 #define __TARGET_CFG_H__ 19 20 #include "uart_stdout.h" 21 #include "tfm_peripherals_def.h" 22 #include "tfm_plat_defs.h" 23 #include "arm_uart_drv.h" 24 25 #define TFM_DRIVER_STDIO Driver_USART0 26 #define NS_DRIVER_STDIO Driver_USART0 27 28 /** 29 * \brief Defines the word offsets of Slave Peripheral Protection Controller 30 * Registers 31 */ 32 enum ppc_bank_e 33 { 34 PPC_SP_DO_NOT_CONFIGURE = -1, 35 PPC_SP_AHB_PPC0 = 0, 36 PPC_SP_RES0, 37 PPC_SP_RES1, 38 PPC_SP_RES2, 39 PPC_SP_AHB_PPC_EXP0, 40 PPC_SP_AHB_PPC_EXP1, 41 PPC_SP_AHB_PPC_EXP2, 42 PPC_SP_AHB_PPC_EXP3, 43 PPC_SP_APB_PPC0, 44 PPC_SP_APB_PPC1, 45 PPC_SP_RES3, 46 PPC_SP_RES4, 47 PPC_SP_APB_PPC_EXP0, 48 PPC_SP_APB_PPC_EXP1, 49 PPC_SP_APB_PPC_EXP2, 50 PPC_SP_APB_PPC_EXP3, 51 }; 52 53 /** 54 * \brief Store the addresses of memory regions 55 */ 56 struct memory_region_limits { 57 uint32_t non_secure_code_start; 58 uint32_t non_secure_partition_base; 59 uint32_t non_secure_partition_limit; 60 uint32_t veneer_base; 61 uint32_t veneer_limit; 62 #ifdef BL2 63 uint32_t secondary_partition_base; 64 uint32_t secondary_partition_limit; 65 #endif /* BL2 */ 66 }; 67 68 /** 69 * \brief Holds the data necessary to do isolation for a specific peripheral. 70 */ 71 struct platform_data_t 72 { 73 uint32_t periph_start; 74 uint32_t periph_limit; 75 enum ppc_bank_e periph_ppc_bank; 76 int16_t periph_ppc_loc; 77 }; 78 79 /** 80 * \brief Configures the Memory Protection Controller. 81 * 82 * \return Returns error code. 83 */ 84 int32_t mpc_init_cfg(void); 85 86 /** 87 * \brief Configures the Peripheral Protection Controller. 88 */ 89 void ppc_init_cfg(void); 90 91 /** 92 * \brief Restict access to peripheral to secure 93 */ 94 void ppc_configure_to_secure(enum ppc_bank_e bank, uint16_t loc); 95 96 /** 97 * \brief Allow non-secure access to peripheral 98 */ 99 void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint16_t loc); 100 101 /** 102 * \brief Enable secure unprivileged access to peripheral 103 */ 104 void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); 105 106 /** 107 * \brief Clear secure unprivileged access to peripheral 108 */ 109 void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); 110 111 /** 112 * \brief Clears PPC interrupt. 113 */ 114 void ppc_clear_irq(void); 115 116 /** 117 * \brief Configures SAU and IDAU. 118 */ 119 void sau_and_idau_cfg(void); 120 121 /** 122 * \brief Enables the fault handlers and sets priorities. 123 * 124 * \return Returns values as specified by the \ref tfm_plat_err_t 125 */ 126 enum tfm_plat_err_t enable_fault_handlers(void); 127 128 /** 129 * \brief Configures the system reset request properties 130 * 131 * \return Returns values as specified by the \ref tfm_plat_err_t 132 */ 133 enum tfm_plat_err_t system_reset_cfg(void); 134 135 /** 136 * \brief Configures the system debug properties. 137 * 138 * \return Returns values as specified by the \ref tfm_plat_err_t 139 */ 140 enum tfm_plat_err_t init_debug(void); 141 142 /** 143 * \brief Configures all external interrupts to target the 144 * NS state, apart for the ones associated to secure 145 * peripherals (plus MPC and PPC) 146 * 147 * \return Returns values as specified by the \ref tfm_plat_err_t 148 */ 149 enum tfm_plat_err_t nvic_interrupt_target_state_cfg(void); 150 151 /** 152 * \brief This function enable the interrupts associated 153 * to the secure peripherals (plus the isolation boundary violation 154 * interrupts) 155 * 156 * \return Returns values as specified by the \ref tfm_plat_err_t 157 */ 158 enum tfm_plat_err_t nvic_interrupt_enable(void); 159 160 #endif /* __TARGET_CFG_H__ */ 161
