1 /*
2  * Copyright (c) 2019, Arm Limited. All rights reserved.
3  * Copyright (c) 2019-2021, Cypress Semiconductor Corporation. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
7  */
8 
9 #include <stdbool.h>
10 #include <stdint.h>
11 #include "cy_tcpwm_counter.h"
12 #include "device_definition.h"
13 #include "tfm_plat_defs.h"
14 #include "tfm_plat_test.h"
15 
tfm_plat_test_secure_timer_start(void)16 void tfm_plat_test_secure_timer_start(void)
17 {
18     cy_en_tcpwm_status_t rc;
19 
20     if (!CY_TCPWM0_TIMER0_DEV_S.is_initialized) {
21         Cy_TCPWM_Counter_Disable(
22             CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
23             CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num
24         );
25 
26         rc = Cy_TCPWM_Counter_Init(CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
27                                    CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num,
28                                    CY_TCPWM0_TIMER0_DEV_S.tcpwm_config);
29         if (rc == CY_TCPWM_SUCCESS) {
30             CY_TCPWM0_TIMER0_DEV_S.is_initialized = true;
31         } else {
32             return;
33         }
34     }
35     Cy_TCPWM_Counter_Enable(
36         CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
37         CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num
38     );
39     Cy_TCPWM_TriggerStart(
40         CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
41         (1UL << CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num)
42     );
43 }
44 
tfm_plat_test_secure_timer_clear_intr(void)45 void tfm_plat_test_secure_timer_clear_intr(void) {
46     Cy_TCPWM_ClearInterrupt(CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
47                             CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num,
48                             CY_TCPWM0_TIMER0_DEV_S.tcpwm_config->interruptSources);
49 }
50 
tfm_plat_test_secure_timer_stop(void)51 void tfm_plat_test_secure_timer_stop(void)
52 {
53     Cy_TCPWM_Counter_Disable(
54         CY_TCPWM0_TIMER0_DEV_S.tcpwm_base,
55         CY_TCPWM0_TIMER0_DEV_S.tcpwm_counter_num
56     );
57 }
58 
tfm_plat_test_non_secure_timer_start(void)59 void tfm_plat_test_non_secure_timer_start(void)
60 {
61     cy_en_tcpwm_status_t rc;
62 
63     if (!CY_TCPWM0_TIMER1_DEV_NS.is_initialized) {
64         Cy_TCPWM_Counter_Disable(
65             CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
66             CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num
67         );
68 
69         rc = Cy_TCPWM_Counter_Init(CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
70                                    CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num,
71                                    CY_TCPWM0_TIMER1_DEV_NS.tcpwm_config);
72         if (rc == CY_TCPWM_SUCCESS) {
73             CY_TCPWM0_TIMER1_DEV_NS.is_initialized = true;
74         } else {
75             return;
76         }
77     }
78     Cy_TCPWM_Counter_Enable(
79         CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
80         CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num
81     );
82     Cy_TCPWM_TriggerStart(
83         CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
84         (1UL << CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num)
85     );
86 }
87 
tfm_plat_test_non_secure_timer_stop(void)88 void tfm_plat_test_non_secure_timer_stop(void)
89 {
90     Cy_TCPWM_Counter_Disable(
91         CY_TCPWM0_TIMER1_DEV_NS.tcpwm_base,
92         CY_TCPWM0_TIMER1_DEV_NS.tcpwm_counter_num
93     );
94 }
95