1#------------------------------------------------------------------------------- 2# Copyright (c) 2023-2024, Arm Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6#------------------------------------------------------------------------------- 7 8# Note: Cached varaibles always take the first value set, while normal 9# variables always take the last. 10 11set(TFM_BL1_MEMORY_MAPPED_FLASH OFF CACHE BOOL "Whether BL1 can directly access flash content") 12set(TFM_ATTESTATION_SCHEME "CCA" CACHE STRING "Attestation scheme to use [OFF, PSA, CCA, DPE]") 13 14set(PLATFORM_HAS_BOOT_DMA OFF CACHE BOOL "Enable dma support for memory transactions for bootloader") 15set(PLATFORM_HAS_NI_TOWER ON CACHE BOOL "Enable NI-Tower support") 16set(PLATFORM_HAS_SMMU_V3 ON CACHE BOOL "Enable SMMU V3 support") 17 18# This sub-platform uses a mix of MHUv2 in BL1 and MHUv3 in other firmware. 19# Because of this, PLAT_MHU_VERSION cannot be set to 2 or 3, which would add 20# either MHUv2 or MHUv3 for all firmware. To work around this, set 21# PLAT_MHU_VERSION to 0 so neither gets added by the common cmake and 22# sub-platform specific cmake can be used to handle the mix of MHUv2 and MHUv3. 23set(PLAT_MHU_VERSION 0 CACHE STRING "Supported MHU version by platform") 24set(MCUBOOT_IMAGE_NUMBER 6 CACHE STRING "Number of images supported by MCUBoot") 25set(RSE_USE_HOST_UART OFF CACHE BOOL "Whether RSE should use the UART from the host system (opposed to dedicated UART private to RSE)") 26set(RSE_USE_HOST_FLASH OFF CACHE BOOL "Enable RSE using the host flash.") 27set(RSE_HAS_EXPANSION_PERIPHERALS ON CACHE BOOL "Whether RSE has sub-platform specific peripherals in the expansion layer") 28if (TFM_PLATFORM_VARIANT STREQUAL "1") 29 set(PLAT_LCP_COUNT 8 CACHE STRING "Number of LCPs to load") 30elseif (TFM_PLATFORM_VARIANT STREQUAL "2") 31 set(PLAT_LCP_COUNT 4 CACHE STRING "Number of LCPs to load") 32 set(RSE_AMOUNT 4 CACHE STRING "Amount of RSEs in the system") 33 set(MULTI_RSE_TOPOLOGY_FILE ${CMAKE_CURRENT_LIST_DIR}/bl1/rdfremontcfg2.tgf CACHE STRING "Topology file for RSE to RSE BL1 communication") 34else() 35 set(PLAT_LCP_COUNT 16 CACHE STRING "Number of LCPs to load") 36endif() 37set(RSE_LOAD_NS_IMAGE OFF CACHE BOOL "Whether to load an NS image") 38set(CONFIG_TFM_SPM_BACKEND IPC CACHE STRING "The SPM backend") 39 40# Once all cache options are set, set common options as fallback 41include(${CMAKE_CURRENT_LIST_DIR}/../common/config.cmake) 42