1 /*
2  * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #include "tfm_hal_device_header.h"
9 #include "common_target_cfg.h"
10 #include "tfm_hal_platform.h"
11 #include "tfm_peripherals_def.h"
12 #include "uart_stdout.h"
13 #include "device_definition.h"
14 #ifdef TFM_PARTITION_PROTECTED_STORAGE
15 #include "host_base_address.h"
16 #endif /* TFM_PARTITION_PROTECTED_STORAGE */
17 
18 #ifdef TFM_PARTITION_PROTECTED_STORAGE
19 #define RSE_ATU_REGION_PS_SLOT  16
20 #endif /* TFM_PARTITION_PROTECTED_STORAGE */
21 
22 extern const struct memory_region_limits memory_regions;
23 
tfm_hal_platform_init(void)24 enum tfm_hal_status_t tfm_hal_platform_init(void)
25 {
26     enum tfm_plat_err_t plat_err = TFM_PLAT_ERR_SYSTEM_ERR;
27 #ifdef TFM_PARTITION_PROTECTED_STORAGE
28     enum atu_error_t err;
29 #endif /* TFM_PARTITION_PROTECTED_STORAGE */
30 
31     plat_err = enable_fault_handlers();
32     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
33         return TFM_HAL_ERROR_GENERIC;
34     }
35 
36     plat_err = system_reset_cfg();
37     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
38         return TFM_HAL_ERROR_GENERIC;
39     }
40 
41     plat_err = init_debug();
42     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
43         return TFM_HAL_ERROR_GENERIC;
44     }
45 
46     __enable_irq();
47     stdio_init();
48 
49     if (sam_init(&SAM_DEV_S) != SAM_ERROR_NONE) {
50         return TFM_HAL_ERROR_GENERIC;
51     }
52 
53     plat_err = nvic_interrupt_target_state_cfg();
54     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
55         return TFM_HAL_ERROR_GENERIC;
56     }
57 
58     plat_err = nvic_interrupt_enable();
59     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
60         return TFM_HAL_ERROR_GENERIC;
61     }
62 
63     plat_err = dma_init_cfg();
64     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
65         return TFM_HAL_ERROR_GENERIC;
66     }
67 
68 #ifdef TFM_PARTITION_PROTECTED_STORAGE
69     /* Initialize PS region */
70     err = atu_initialize_region(&ATU_DEV_S,
71                                 RSE_ATU_REGION_PS_SLOT,
72                                 HOST_ACCESS_PS_BASE_S,
73                                 HOST_FLASH0_PS_BASE,
74                                 HOST_FLASH0_PS_SIZE);
75     if (err != ATU_ERR_NONE) {
76         return TFM_HAL_ERROR_GENERIC;
77     }
78 #endif /* TFM_PARTITION_PROTECTED_STORAGE */
79 
80     return TFM_HAL_SUCCESS;
81 }
82 
tfm_hal_get_ns_VTOR(void)83 uint32_t tfm_hal_get_ns_VTOR(void)
84 {
85 #ifndef RSE_LOAD_NS_IMAGE
86     /* If an NS image hasn't been set up, then just return 0 */
87     return 0;
88 #endif
89 
90     return memory_regions.non_secure_code_start;
91 }
92 
tfm_hal_get_ns_MSP(void)93 uint32_t tfm_hal_get_ns_MSP(void)
94 {
95 #ifndef RSE_LOAD_NS_IMAGE
96     /* If an NS image hasn't been set up, then just return 0 */
97     return 0;
98 #endif
99 
100     return *((uint32_t *)memory_regions.non_secure_code_start);
101 }
102 
tfm_hal_get_ns_entry_point(void)103 uint32_t tfm_hal_get_ns_entry_point(void)
104 {
105 #ifndef RSE_LOAD_NS_IMAGE
106     /* If an NS image hasn't been set up, then just return 0 */
107     return 0;
108 #endif
109 
110     return *((uint32_t *)(memory_regions.non_secure_code_start + 4));
111 }
112