1 /* 2 * Copyright (c) 2019-2024 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing software 11 * distributed under the License is distributed on an "AS IS" BASIS 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /** 18 * \file device_definition.h 19 * \brief The structure definitions in this file are exported based on the 20 * peripheral definitions from device_cfg.h. 21 * This file is meant to be used as a helper for baremetal 22 * applications and/or as an example of how to configure the generic 23 * driver structures. 24 */ 25 26 #ifndef __DEVICE_DEFINITION_H__ 27 #define __DEVICE_DEFINITION_H__ 28 29 #include "device_cfg.h" 30 #include "host_device_definition.h" 31 #ifdef RSE_HAS_EXPANSION_PERIPHERALS 32 #include "rse_expansion_device_definition.h" 33 #endif /* RSE_HAS_EXPANSION_PERIPHERALS */ 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 /* ======= Defines peripheral configuration structures ======= */ 40 /* ATU driver structures */ 41 #ifdef ATU_S 42 #include "atu_rse_drv.h" 43 extern struct atu_dev_t ATU_DEV_S; 44 #endif 45 46 /* SIC driver structures */ 47 #ifdef SIC_S 48 #include "sic_drv.h" 49 extern struct sic_dev_t SIC_DEV_S; 50 #endif 51 52 /* TRAM driver structures */ 53 #ifdef TRAM_S 54 #include "tram_drv.h" 55 extern struct tram_dev_t TRAM_DEV_S; 56 #endif 57 58 /* UART CMSDK driver structures */ 59 #ifdef UART0_CMSDK_S 60 #include "uart_cmsdk_drv.h" 61 extern struct uart_cmsdk_dev_t UART0_CMSDK_DEV_S; 62 #endif 63 #ifdef UART0_CMSDK_NS 64 #include "uart_cmsdk_drv.h" 65 extern struct uart_cmsdk_dev_t UART0_CMSDK_DEV_NS; 66 #endif 67 68 /* ARM PPC driver structures */ 69 #ifdef PPC_RSE_MAIN0_S 70 #include "ppc_rse_drv.h" 71 extern struct ppc_rse_dev_t PPC_RSE_MAIN0_DEV_S; 72 #endif 73 74 #ifdef PPC_RSE_MAIN_EXP0_S 75 #include "ppc_rse_drv.h" 76 extern struct ppc_rse_dev_t PPC_RSE_MAIN_EXP0_DEV_S; 77 #endif 78 79 #ifdef PPC_RSE_MAIN_EXP1_S 80 #include "ppc_rse_drv.h" 81 extern struct ppc_rse_dev_t PPC_RSE_MAIN_EXP1_DEV_S; 82 #endif 83 84 #ifdef PPC_RSE_MAIN_EXP2_S 85 #include "ppc_rse_drv.h" 86 extern struct ppc_rse_dev_t PPC_RSE_MAIN_EXP2_DEV_S; 87 #endif 88 89 #ifdef PPC_RSE_MAIN_EXP3_S 90 #include "ppc_rse_drv.h" 91 extern struct ppc_rse_dev_t PPC_RSE_MAIN_EXP3_DEV_S; 92 #endif 93 94 #ifdef PPC_RSE_PERIPH0_S 95 #include "ppc_rse_drv.h" 96 extern struct ppc_rse_dev_t PPC_RSE_PERIPH0_DEV_S; 97 #endif 98 99 #ifdef PPC_RSE_PERIPH1_S 100 #include "ppc_rse_drv.h" 101 extern struct ppc_rse_dev_t PPC_RSE_PERIPH1_DEV_S; 102 #endif 103 104 #ifdef PPC_RSE_PERIPH_EXP0_S 105 #include "ppc_rse_drv.h" 106 extern struct ppc_rse_dev_t PPC_RSE_PERIPH_EXP0_DEV_S; 107 #endif 108 109 #ifdef PPC_RSE_PERIPH_EXP1_S 110 #include "ppc_rse_drv.h" 111 extern struct ppc_rse_dev_t PPC_RSE_PERIPH_EXP1_DEV_S; 112 #endif 113 114 #ifdef PPC_RSE_PERIPH_EXP2_S 115 #include "ppc_rse_drv.h" 116 extern struct ppc_rse_dev_t PPC_RSE_PERIPH_EXP2_DEV_S; 117 #endif 118 119 #ifdef PPC_RSE_PERIPH_EXP3_S 120 #include "ppc_rse_drv.h" 121 extern struct ppc_rse_dev_t PPC_RSE_PERIPH_EXP3_DEV_S; 122 #endif 123 124 /* System counters */ 125 #ifdef SYSCOUNTER_CNTRL_ARMV8_M_S 126 #include "syscounter_armv8-m_cntrl_drv.h" 127 extern struct syscounter_armv8_m_cntrl_dev_t SYSCOUNTER_CNTRL_ARMV8_M_DEV_S; 128 #endif 129 130 #ifdef SYSCOUNTER_READ_ARMV8_M_S 131 #include "syscounter_armv8-m_read_drv.h" 132 extern struct syscounter_armv8_m_read_dev_t SYSCOUNTER_READ_ARMV8_M_DEV_S; 133 #endif 134 135 /* System timers */ 136 #ifdef SYSTIMER0_ARMV8_M_S 137 #include "systimer_armv8-m_drv.h" 138 extern struct systimer_armv8_m_dev_t SYSTIMER0_ARMV8_M_DEV_S; 139 #endif 140 #ifdef SYSTIMER0_ARMV8_M_NS 141 #include "systimer_armv8-m_drv.h" 142 extern struct systimer_armv8_m_dev_t SYSTIMER0_ARMV8_M_DEV_NS; 143 #endif 144 145 #ifdef SYSTIMER1_ARMV8_M_S 146 #include "systimer_armv8-m_drv.h" 147 extern struct systimer_armv8_m_dev_t SYSTIMER1_ARMV8_M_DEV_S; 148 #endif 149 #ifdef SYSTIMER1_ARMV8_M_NS 150 #include "systimer_armv8-m_drv.h" 151 extern struct systimer_armv8_m_dev_t SYSTIMER1_ARMV8_M_DEV_NS; 152 #endif 153 154 #ifdef SYSTIMER2_ARMV8_M_S 155 #include "systimer_armv8-m_drv.h" 156 extern struct systimer_armv8_m_dev_t SYSTIMER2_ARMV8_M_DEV_S; 157 #endif 158 #ifdef SYSTIMER2_ARMV8_M_NS 159 #include "systimer_armv8-m_drv.h" 160 extern struct systimer_armv8_m_dev_t SYSTIMER2_ARMV8_M_DEV_NS; 161 #endif 162 163 #ifdef SYSTIMER3_ARMV8_M_S 164 #include "systimer_armv8-m_drv.h" 165 extern struct systimer_armv8_m_dev_t SYSTIMER3_ARMV8_M_DEV_S; 166 #endif 167 #ifdef SYSTIMER3_ARMV8_M_NS 168 #include "systimer_armv8-m_drv.h" 169 extern struct systimer_armv8_m_dev_t SYSTIMER3_ARMV8_M_DEV_NS; 170 #endif 171 172 /* System Watchdogs */ 173 #ifdef SYSWDOG_ARMV8_M_S 174 #include "syswdog_armv8-m_drv.h" 175 extern struct syswdog_armv8_m_dev_t SYSWDOG_ARMV8_M_DEV_S; 176 #endif 177 #ifdef SYSWDOG_ARMV8_M_NS 178 #include "syswdog_armv8-m_drv.h" 179 extern struct syswdog_armv8_m_dev_t SYSWDOG_ARMV8_M_DEV_NS; 180 #endif 181 182 /* ARM MPC SIE 300 driver structures */ 183 #ifdef MPC_VM0_S 184 #include "mpc_sie_drv.h" 185 extern struct mpc_sie_dev_t MPC_VM0_DEV_S; 186 #endif 187 188 #ifdef MPC_VM1_S 189 #include "mpc_sie_drv.h" 190 extern struct mpc_sie_dev_t MPC_VM1_DEV_S; 191 #endif 192 193 #ifdef MPC_SIC_S 194 #include "mpc_sie_drv.h" 195 extern struct mpc_sie_dev_t MPC_SIC_DEV_S; 196 #endif 197 198 #ifdef KMU_S 199 #include "kmu_drv.h" 200 extern struct kmu_dev_t KMU_DEV_S; 201 #endif 202 203 #ifdef SAM_S 204 #include "sam_drv.h" 205 extern struct sam_dev_t SAM_DEV_S; 206 #endif 207 208 #ifdef LCM_S 209 #include "lcm_drv.h" 210 extern struct lcm_dev_t LCM_DEV_S; 211 #endif 212 213 #ifdef INTEGRITY_CHECKER_S 214 #include "integrity_checker_drv.h" 215 extern struct integrity_checker_dev_t INTEGRITY_CHECKER_DEV_S; 216 #endif 217 218 #ifdef DMA350_DMA0_S 219 #include "dma350_drv.h" 220 #include "dma350_ch_drv.h" 221 extern struct dma350_dev_t DMA350_DMA0_DEV_S; 222 #endif 223 224 #ifdef DMA350_DMA0_CH0_S 225 extern struct dma350_ch_dev_t DMA350_DMA0_CH0_DEV_S; 226 #endif 227 228 #ifdef DMA350_DMA0_CH1_S 229 extern struct dma350_ch_dev_t DMA350_DMA0_CH1_DEV_S; 230 #endif 231 232 #ifdef DMA350_DMA0_CH2_S 233 extern struct dma350_ch_dev_t DMA350_DMA0_CH2_DEV_S; 234 #endif 235 236 #ifdef DMA350_DMA0_CH3_S 237 extern struct dma350_ch_dev_t DMA350_DMA0_CH3_DEV_S; 238 #endif 239 240 #ifdef GPIO0_S 241 #include "gpio_pl061_drv.h" 242 extern pl061_regblk_t *const GPIO0_DEV_S; 243 #endif 244 245 #ifdef GPIO1_S 246 #include "gpio_pl061_drv.h" 247 extern pl061_regblk_t *const GPIO1_DEV_S; 248 #endif 249 250 #ifdef GPIO0_NS 251 #include "gpio_pl061_drv.h" 252 extern pl061_regblk_t *const GPIO0_DEV_NS; 253 #endif 254 255 #ifdef GPIO1_NS 256 #include "gpio_pl061_drv.h" 257 extern pl061_regblk_t *const GPIO1_DEV_NS; 258 #endif 259 260 #ifdef __cplusplus 261 } 262 #endif 263 264 #endif /* __DEVICE_DEFINITION_H__ */ 265
