1 /*
2 * Copyright (c) 2016-2020 Arm Limited. All rights reserved.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "Driver_PPC.h"
18
19 #include "cmsis_driver_config.h"
20 #include "RTE_Device.h"
21
22 /* Driver version */
23 #define ARM_PPC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1, 0)
24
25 /* Driver Version */
26 static const ARM_DRIVER_VERSION DriverVersion = {
27 ARM_PPC_API_VERSION,
28 ARM_PPC_DRV_VERSION
29 };
30
ARM_PPC_GetVersion(void)31 static ARM_DRIVER_VERSION ARM_PPC_GetVersion(void)
32 {
33 return DriverVersion;
34 }
35
36 #if (RTE_AHB_PPC0)
37 /* AHB PPC0 Driver wrapper functions */
AHB_PPC0_Initialize(void)38 static int32_t AHB_PPC0_Initialize(void)
39 {
40 ppc_sse200_init(&AHB_PPC0_DEV, AHB_PPC0);
41
42 return ARM_DRIVER_OK;
43 }
44
AHB_PPC0_Uninitialize(void)45 static int32_t AHB_PPC0_Uninitialize(void)
46 {
47 /* Nothing to be done*/
48 return ARM_DRIVER_OK;
49 }
50
AHB_PPC0_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)51 static int32_t AHB_PPC0_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr,
52 ARM_PPC_PrivAttr priv_attr)
53 {
54 enum ppc_sse200_error_t ret;
55
56 ret = ppc_sse200_config_peripheral(&AHB_PPC0_DEV, periph,
57 (enum ppc_sse200_sec_attr_t)sec_attr,
58 (enum ppc_sse200_priv_attr_t)priv_attr);
59 if (ret != PPC_SSE200_ERR_NONE) {
60 return ARM_DRIVER_ERROR;
61 }
62
63 return ARM_DRIVER_OK;
64 }
65
AHB_PPC0_IsPeriphSecure(uint8_t periph)66 static uint32_t AHB_PPC0_IsPeriphSecure(uint8_t periph)
67 {
68 return ppc_sse200_is_periph_secure(&AHB_PPC0_DEV, periph);
69 }
70
AHB_PPC0_IsPeriphPrivOnly(uint8_t periph)71 static uint32_t AHB_PPC0_IsPeriphPrivOnly(uint8_t periph)
72 {
73 return ppc_sse200_is_periph_priv_only(&AHB_PPC0_DEV, periph);
74 }
75
AHB_PPC0_EnableInterrupt(void)76 static int32_t AHB_PPC0_EnableInterrupt(void)
77 {
78 enum ppc_sse200_error_t ret;
79
80 ret = ppc_sse200_irq_enable(&AHB_PPC0_DEV);
81
82 if (ret != PPC_SSE200_ERR_NONE) {
83 return ARM_DRIVER_ERROR;
84 }
85
86 return ARM_DRIVER_OK;
87 }
88
AHB_PPC0_DisableInterrupt(void)89 static void AHB_PPC0_DisableInterrupt(void)
90 {
91 ppc_sse200_irq_disable(&AHB_PPC0_DEV);
92 }
93
AHB_PPC0_ClearInterrupt(void)94 static void AHB_PPC0_ClearInterrupt(void)
95 {
96 ppc_sse200_clear_irq(&AHB_PPC0_DEV);
97 }
98
AHB_PPC0_InterruptState(void)99 static uint32_t AHB_PPC0_InterruptState(void)
100 {
101 return ppc_sse200_irq_state(&AHB_PPC0_DEV);
102 }
103
104 /* AHB PPC0 Driver CMSIS access structure */
105 extern ARM_DRIVER_PPC Driver_AHB_PPC0;
106 ARM_DRIVER_PPC Driver_AHB_PPC0 = {
107 .GetVersion = ARM_PPC_GetVersion,
108 .Initialize = AHB_PPC0_Initialize,
109 .Uninitialize = AHB_PPC0_Uninitialize,
110 .ConfigPeriph = AHB_PPC0_ConfigPeriph,
111 .IsPeriphSecure = AHB_PPC0_IsPeriphSecure,
112 .IsPeriphPrivOnly = AHB_PPC0_IsPeriphPrivOnly,
113 .EnableInterrupt = AHB_PPC0_EnableInterrupt,
114 .DisableInterrupt = AHB_PPC0_DisableInterrupt,
115 .ClearInterrupt = AHB_PPC0_ClearInterrupt,
116 .InterruptState = AHB_PPC0_InterruptState
117 };
118 #endif /* RTE_AHB_PPC0 */
119
120 #if (RTE_AHB_PPCEXP0)
121 /* AHB PPCEXP0 Driver wrapper functions */
AHB_PPCEXP0_Initialize(void)122 static int32_t AHB_PPCEXP0_Initialize(void)
123 {
124 ppc_sse200_init(&AHB_PPCEXP0_DEV, AHB_PPC_EXP0);
125
126 return ARM_DRIVER_OK;
127 }
128
AHB_PPCEXP0_Uninitialize(void)129 static int32_t AHB_PPCEXP0_Uninitialize(void)
130 {
131 /* Nothing to be done */
132 return ARM_DRIVER_OK;
133 }
134
AHB_PPCEXP0_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)135 static int32_t AHB_PPCEXP0_ConfigPeriph(uint8_t periph,
136 ARM_PPC_SecAttr sec_attr,
137 ARM_PPC_PrivAttr priv_attr)
138 {
139 enum ppc_sse200_error_t ret;
140
141 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP0_DEV, periph,
142 (enum ppc_sse200_sec_attr_t)sec_attr,
143 (enum ppc_sse200_priv_attr_t)priv_attr);
144
145 if (ret != PPC_SSE200_ERR_NONE) {
146 return ARM_DRIVER_ERROR;
147 }
148
149 return ARM_DRIVER_OK;
150 }
151
AHB_PPCEXP0_IsPeriphSecure(uint8_t periph)152 static uint32_t AHB_PPCEXP0_IsPeriphSecure(uint8_t periph)
153 {
154 return ppc_sse200_is_periph_secure(&AHB_PPCEXP0_DEV, periph);
155 }
156
AHB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)157 static uint32_t AHB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)
158 {
159 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP0_DEV, periph);
160 }
161
AHB_PPCEXP0_EnableInterrupt(void)162 static int32_t AHB_PPCEXP0_EnableInterrupt(void)
163 {
164 enum ppc_sse200_error_t ret;
165
166 ret = ppc_sse200_irq_enable(&AHB_PPCEXP0_DEV);
167
168 if (ret != PPC_SSE200_ERR_NONE) {
169 return ARM_DRIVER_ERROR;
170 }
171
172 return ARM_DRIVER_OK;
173 }
174
AHB_PPCEXP0_DisableInterrupt(void)175 static void AHB_PPCEXP0_DisableInterrupt(void)
176 {
177 ppc_sse200_irq_disable(&AHB_PPCEXP0_DEV);
178 }
179
AHB_PPCEXP0_ClearInterrupt(void)180 static void AHB_PPCEXP0_ClearInterrupt(void)
181 {
182 ppc_sse200_clear_irq(&AHB_PPCEXP0_DEV);
183 }
184
AHB_PPCEXP0_InterruptState(void)185 static uint32_t AHB_PPCEXP0_InterruptState(void)
186 {
187 return ppc_sse200_irq_state(&AHB_PPCEXP0_DEV);
188 }
189
190 /* AHB PPCEXP0 Driver CMSIS access structure */
191 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP0;
192 ARM_DRIVER_PPC Driver_AHB_PPCEXP0 = {
193 .GetVersion = ARM_PPC_GetVersion,
194 .Initialize = AHB_PPCEXP0_Initialize,
195 .Uninitialize = AHB_PPCEXP0_Uninitialize,
196 .ConfigPeriph = AHB_PPCEXP0_ConfigPeriph,
197 .IsPeriphSecure = AHB_PPCEXP0_IsPeriphSecure,
198 .IsPeriphPrivOnly = AHB_PPCEXP0_IsPeriphPrivOnly,
199 .EnableInterrupt = AHB_PPCEXP0_EnableInterrupt,
200 .DisableInterrupt = AHB_PPCEXP0_DisableInterrupt,
201 .ClearInterrupt = AHB_PPCEXP0_ClearInterrupt,
202 .InterruptState = AHB_PPCEXP0_InterruptState
203 };
204 #endif /* RTE_AHB_PPCEXP0 */
205
206 #if (RTE_AHB_PPCEXP1)
207 /* AHB PPCEXP1 Driver wrapper functions */
AHB_PPCEXP1_Initialize(void)208 static int32_t AHB_PPCEXP1_Initialize(void)
209 {
210 ppc_sse200_init(&AHB_PPCEXP1_DEV, AHB_PPC_EXP1);
211
212 return ARM_DRIVER_OK;
213 }
214
AHB_PPCEXP1_Uninitialize(void)215 static int32_t AHB_PPCEXP1_Uninitialize(void)
216 {
217 /* Nothing to be done */
218 return ARM_DRIVER_OK;
219 }
220
AHB_PPCEXP1_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)221 static int32_t AHB_PPCEXP1_ConfigPeriph(uint8_t periph,
222 ARM_PPC_SecAttr sec_attr,
223 ARM_PPC_PrivAttr priv_attr)
224 {
225 enum ppc_sse200_error_t ret;
226
227 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP1_DEV, periph,
228 (enum ppc_sse200_sec_attr_t)sec_attr,
229 (enum ppc_sse200_priv_attr_t)priv_attr);
230
231 if (ret != PPC_SSE200_ERR_NONE) {
232 return ARM_DRIVER_ERROR;
233 }
234
235 return ARM_DRIVER_OK;
236 }
237
AHB_PPCEXP1_IsPeriphSecure(uint8_t periph)238 static uint32_t AHB_PPCEXP1_IsPeriphSecure(uint8_t periph)
239 {
240 return ppc_sse200_is_periph_secure(&AHB_PPCEXP1_DEV, periph);
241 }
242
AHB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)243 static uint32_t AHB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)
244 {
245 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP1_DEV, periph);
246 }
247
AHB_PPCEXP1_EnableInterrupt(void)248 static int32_t AHB_PPCEXP1_EnableInterrupt(void)
249 {
250 enum ppc_sse200_error_t ret;
251
252 ret = ppc_sse200_irq_enable(&AHB_PPCEXP1_DEV);
253
254 if (ret != PPC_SSE200_ERR_NONE) {
255 return ARM_DRIVER_ERROR;
256 }
257
258 return ARM_DRIVER_OK;
259 }
260
AHB_PPCEXP1_DisableInterrupt(void)261 static void AHB_PPCEXP1_DisableInterrupt(void)
262 {
263 ppc_sse200_irq_disable(&AHB_PPCEXP1_DEV);
264 }
265
AHB_PPCEXP1_ClearInterrupt(void)266 static void AHB_PPCEXP1_ClearInterrupt(void)
267 {
268 ppc_sse200_clear_irq(&AHB_PPCEXP1_DEV);
269 }
270
AHB_PPCEXP1_InterruptState(void)271 static uint32_t AHB_PPCEXP1_InterruptState(void)
272 {
273 return ppc_sse200_irq_state(&AHB_PPCEXP1_DEV);
274 }
275
276 /* AHB PPCEXP1 Driver CMSIS access structure */
277 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP1;
278 ARM_DRIVER_PPC Driver_AHB_PPCEXP1 = {
279 .GetVersion = ARM_PPC_GetVersion,
280 .Initialize = AHB_PPCEXP1_Initialize,
281 .Uninitialize = AHB_PPCEXP1_Uninitialize,
282 .ConfigPeriph = AHB_PPCEXP1_ConfigPeriph,
283 .IsPeriphSecure = AHB_PPCEXP1_IsPeriphSecure,
284 .IsPeriphPrivOnly = AHB_PPCEXP1_IsPeriphPrivOnly,
285 .EnableInterrupt = AHB_PPCEXP1_EnableInterrupt,
286 .DisableInterrupt = AHB_PPCEXP1_DisableInterrupt,
287 .ClearInterrupt = AHB_PPCEXP1_ClearInterrupt,
288 .InterruptState = AHB_PPCEXP1_InterruptState
289 };
290 #endif /* RTE_AHB_PPCEXP1 */
291
292 #if (RTE_AHB_PPCEXP2)
293 /* AHB PPCEXP2 Driver wrapper functions */
AHB_PPCEXP2_Initialize(void)294 static int32_t AHB_PPCEXP2_Initialize(void)
295 {
296 ppc_sse200_init(&AHB_PPCEXP2_DEV, AHB_PPC_EXP2);
297
298 return ARM_DRIVER_OK;
299 }
300
AHB_PPCEXP2_Uninitialize(void)301 static int32_t AHB_PPCEXP2_Uninitialize(void)
302 {
303 /* Nothing to be done */
304 return ARM_DRIVER_OK;
305 }
306
AHB_PPCEXP2_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)307 static int32_t AHB_PPCEXP2_ConfigPeriph(uint8_t periph,
308 ARM_PPC_SecAttr sec_attr,
309 ARM_PPC_PrivAttr priv_attr)
310 {
311 enum ppc_sse200_error_t ret;
312
313 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP2_DEV, periph,
314 (enum ppc_sse200_sec_attr_t)sec_attr,
315 (enum ppc_sse200_priv_attr_t)priv_attr);
316
317 if (ret != PPC_SSE200_ERR_NONE) {
318 return ARM_DRIVER_ERROR;
319 }
320
321 return ARM_DRIVER_OK;
322 }
323
AHB_PPCEXP2_IsPeriphSecure(uint8_t periph)324 static uint32_t AHB_PPCEXP2_IsPeriphSecure(uint8_t periph)
325 {
326 return ppc_sse200_is_periph_secure(&AHB_PPCEXP2_DEV, periph);
327 }
328
AHB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)329 static uint32_t AHB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)
330 {
331 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP2_DEV, periph);
332 }
333
AHB_PPCEXP2_EnableInterrupt(void)334 static int32_t AHB_PPCEXP2_EnableInterrupt(void)
335 {
336 enum ppc_sse200_error_t ret;
337
338 ret = ppc_sse200_irq_enable(&AHB_PPCEXP2_DEV);
339
340 if (ret != PPC_SSE200_ERR_NONE) {
341 return ARM_DRIVER_ERROR;
342 }
343
344 return ARM_DRIVER_OK;
345 }
346
AHB_PPCEXP2_DisableInterrupt(void)347 static void AHB_PPCEXP2_DisableInterrupt(void)
348 {
349 ppc_sse200_irq_disable(&AHB_PPCEXP2_DEV);
350 }
351
AHB_PPCEXP2_ClearInterrupt(void)352 static void AHB_PPCEXP2_ClearInterrupt(void)
353 {
354 ppc_sse200_clear_irq(&AHB_PPCEXP2_DEV);
355 }
356
AHB_PPCEXP2_InterruptState(void)357 static uint32_t AHB_PPCEXP2_InterruptState(void)
358 {
359 return ppc_sse200_irq_state(&AHB_PPCEXP2_DEV);
360 }
361
362 /* AHB PPCEXP2 Driver CMSIS access structure */
363 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP2;
364 ARM_DRIVER_PPC Driver_AHB_PPCEXP2 = {
365 .GetVersion = ARM_PPC_GetVersion,
366 .Initialize = AHB_PPCEXP2_Initialize,
367 .Uninitialize = AHB_PPCEXP2_Uninitialize,
368 .ConfigPeriph = AHB_PPCEXP2_ConfigPeriph,
369 .IsPeriphSecure = AHB_PPCEXP2_IsPeriphSecure,
370 .IsPeriphPrivOnly = AHB_PPCEXP2_IsPeriphPrivOnly,
371 .EnableInterrupt = AHB_PPCEXP2_EnableInterrupt,
372 .DisableInterrupt = AHB_PPCEXP2_DisableInterrupt,
373 .ClearInterrupt = AHB_PPCEXP2_ClearInterrupt,
374 .InterruptState = AHB_PPCEXP2_InterruptState
375 };
376 #endif /* RTE_AHB_PPCEXP2 */
377
378 #if (RTE_AHB_PPCEXP3)
379 /* AHB PPCEXP3 Driver wrapper functions */
AHB_PPCEXP3_Initialize(void)380 static int32_t AHB_PPCEXP3_Initialize(void)
381 {
382 ppc_sse200_init(&AHB_PPCEXP3_DEV, AHB_PPC_EXP3);
383
384 return ARM_DRIVER_OK;
385 }
386
AHB_PPCEXP3_Uninitialize(void)387 static int32_t AHB_PPCEXP3_Uninitialize(void)
388 {
389 /* Nothing to be done */
390 return ARM_DRIVER_OK;
391 }
392
AHB_PPCEXP3_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)393 static int32_t AHB_PPCEXP3_ConfigPeriph(uint8_t periph,
394 ARM_PPC_SecAttr sec_attr,
395 ARM_PPC_PrivAttr priv_attr)
396 {
397 enum ppc_sse200_error_t ret;
398
399 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP3_DEV, periph,
400 (enum ppc_sse200_sec_attr_t)sec_attr,
401 (enum ppc_sse200_priv_attr_t)priv_attr);
402
403 if (ret != PPC_SSE200_ERR_NONE) {
404 return ARM_DRIVER_ERROR;
405 }
406
407 return ARM_DRIVER_OK;
408 }
409
AHB_PPCEXP3_IsPeriphSecure(uint8_t periph)410 static uint32_t AHB_PPCEXP3_IsPeriphSecure(uint8_t periph)
411 {
412 return ppc_sse200_is_periph_secure(&AHB_PPCEXP3_DEV, periph);
413 }
414
AHB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)415 static uint32_t AHB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)
416 {
417 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP3_DEV, periph);
418 }
419
AHB_PPCEXP3_EnableInterrupt(void)420 static int32_t AHB_PPCEXP3_EnableInterrupt(void)
421 {
422 enum ppc_sse200_error_t ret;
423
424 ret = ppc_sse200_irq_enable(&AHB_PPCEXP3_DEV);
425
426 if (ret != PPC_SSE200_ERR_NONE) {
427 return ARM_DRIVER_ERROR;
428 }
429
430 return ARM_DRIVER_OK;
431 }
432
AHB_PPCEXP3_DisableInterrupt(void)433 static void AHB_PPCEXP3_DisableInterrupt(void)
434 {
435 ppc_sse200_irq_disable(&AHB_PPCEXP3_DEV);
436 }
437
AHB_PPCEXP3_ClearInterrupt(void)438 static void AHB_PPCEXP3_ClearInterrupt(void)
439 {
440 ppc_sse200_clear_irq(&AHB_PPCEXP3_DEV);
441 }
442
AHB_PPCEXP3_InterruptState(void)443 static uint32_t AHB_PPCEXP3_InterruptState(void)
444 {
445 return ppc_sse200_irq_state(&AHB_PPCEXP3_DEV);
446 }
447
448 /* AHB PPCEXP3 Driver CMSIS access structure */
449 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP3;
450 ARM_DRIVER_PPC Driver_AHB_PPCEXP3 = {
451 .GetVersion = ARM_PPC_GetVersion,
452 .Initialize = AHB_PPCEXP3_Initialize,
453 .Uninitialize = AHB_PPCEXP3_Uninitialize,
454 .ConfigPeriph = AHB_PPCEXP3_ConfigPeriph,
455 .IsPeriphSecure = AHB_PPCEXP3_IsPeriphSecure,
456 .IsPeriphPrivOnly = AHB_PPCEXP3_IsPeriphPrivOnly,
457 .EnableInterrupt = AHB_PPCEXP3_EnableInterrupt,
458 .DisableInterrupt = AHB_PPCEXP3_DisableInterrupt,
459 .ClearInterrupt = AHB_PPCEXP3_ClearInterrupt,
460 .InterruptState = AHB_PPCEXP3_InterruptState
461 };
462 #endif /* RTE_AHB_PPCEXP3 */
463
464 #if (RTE_APB_PPC0)
465 /* APB PPC0 Driver wrapper functions */
APB_PPC0_Initialize(void)466 static int32_t APB_PPC0_Initialize(void)
467 {
468 ppc_sse200_init(&APB_PPC0_DEV, APB_PPC0);
469
470 return ARM_DRIVER_OK;
471 }
472
APB_PPC0_Uninitialize(void)473 static int32_t APB_PPC0_Uninitialize(void)
474 {
475 /* Nothing to be done*/
476 return ARM_DRIVER_OK;
477 }
478
APB_PPC0_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)479 static int32_t APB_PPC0_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr,
480 ARM_PPC_PrivAttr priv_attr)
481 {
482 enum ppc_sse200_error_t ret;
483
484 ret = ppc_sse200_config_peripheral(&APB_PPC0_DEV, periph,
485 (enum ppc_sse200_sec_attr_t)sec_attr,
486 (enum ppc_sse200_priv_attr_t)priv_attr);
487 if (ret != PPC_SSE200_ERR_NONE) {
488 return ARM_DRIVER_ERROR;
489 }
490
491 return ARM_DRIVER_OK;
492 }
493
APB_PPC0_IsPeriphSecure(uint8_t periph)494 static uint32_t APB_PPC0_IsPeriphSecure(uint8_t periph)
495 {
496 return ppc_sse200_is_periph_secure(&APB_PPC0_DEV, periph);
497 }
498
APB_PPC0_IsPeriphPrivOnly(uint8_t periph)499 static uint32_t APB_PPC0_IsPeriphPrivOnly(uint8_t periph)
500 {
501 return ppc_sse200_is_periph_priv_only(&APB_PPC0_DEV, periph);
502 }
503
APB_PPC0_EnableInterrupt(void)504 static int32_t APB_PPC0_EnableInterrupt(void)
505 {
506 enum ppc_sse200_error_t ret;
507
508 ret = ppc_sse200_irq_enable(&APB_PPC0_DEV);
509
510 if (ret != PPC_SSE200_ERR_NONE) {
511 return ARM_DRIVER_ERROR;
512 }
513
514 return ARM_DRIVER_OK;
515 }
516
APB_PPC0_DisableInterrupt(void)517 static void APB_PPC0_DisableInterrupt(void)
518 {
519 ppc_sse200_irq_disable(&APB_PPC0_DEV);
520 }
521
APB_PPC0_ClearInterrupt(void)522 static void APB_PPC0_ClearInterrupt(void)
523 {
524 ppc_sse200_clear_irq(&APB_PPC0_DEV);
525 }
526
APB_PPC0_InterruptState(void)527 static uint32_t APB_PPC0_InterruptState(void)
528 {
529 return ppc_sse200_irq_state(&APB_PPC0_DEV);
530 }
531
532 /* APB PPC0 Driver CMSIS access structure */
533 extern ARM_DRIVER_PPC Driver_APB_PPC0;
534 ARM_DRIVER_PPC Driver_APB_PPC0 = {
535 .GetVersion = ARM_PPC_GetVersion,
536 .Initialize = APB_PPC0_Initialize,
537 .Uninitialize = APB_PPC0_Uninitialize,
538 .ConfigPeriph = APB_PPC0_ConfigPeriph,
539 .IsPeriphSecure = APB_PPC0_IsPeriphSecure,
540 .IsPeriphPrivOnly = APB_PPC0_IsPeriphPrivOnly,
541 .EnableInterrupt = APB_PPC0_EnableInterrupt,
542 .DisableInterrupt = APB_PPC0_DisableInterrupt,
543 .ClearInterrupt = APB_PPC0_ClearInterrupt,
544 .InterruptState = APB_PPC0_InterruptState
545 };
546 #endif /* RTE_APB_PPC0 */
547
548 #if (RTE_APB_PPC1)
549 /* APB PPC1 Driver wrapper functions */
APB_PPC1_Initialize(void)550 static int32_t APB_PPC1_Initialize(void)
551 {
552 ppc_sse200_init(&APB_PPC1_DEV, APB_PPC1);
553
554 return ARM_DRIVER_OK;
555 }
556
APB_PPC1_Uninitialize(void)557 static int32_t APB_PPC1_Uninitialize(void)
558 {
559 /* Nothing to be done*/
560 return ARM_DRIVER_OK;
561 }
562
APB_PPC1_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)563 static int32_t APB_PPC1_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr,
564 ARM_PPC_PrivAttr priv_attr)
565 {
566 enum ppc_sse200_error_t ret;
567
568 ret = ppc_sse200_config_peripheral(&APB_PPC1_DEV, periph,
569 (enum ppc_sse200_sec_attr_t)sec_attr,
570 (enum ppc_sse200_priv_attr_t)priv_attr);
571 if (ret != PPC_SSE200_ERR_NONE) {
572 return ARM_DRIVER_ERROR;
573 }
574
575 return ARM_DRIVER_OK;
576 }
577
APB_PPC1_IsPeriphSecure(uint8_t periph)578 static uint32_t APB_PPC1_IsPeriphSecure(uint8_t periph)
579 {
580 return ppc_sse200_is_periph_secure(&APB_PPC1_DEV, periph);
581 }
582
APB_PPC1_IsPeriphPrivOnly(uint8_t periph)583 static uint32_t APB_PPC1_IsPeriphPrivOnly(uint8_t periph)
584 {
585 return ppc_sse200_is_periph_priv_only(&APB_PPC1_DEV, periph);
586 }
APB_PPC1_EnableInterrupt(void)587 static int32_t APB_PPC1_EnableInterrupt(void)
588 {
589 enum ppc_sse200_error_t ret;
590
591 ret = ppc_sse200_irq_enable(&APB_PPC1_DEV);
592
593 if (ret != PPC_SSE200_ERR_NONE) {
594 return ARM_DRIVER_ERROR;
595 }
596
597 return ARM_DRIVER_OK;
598 }
599
APB_PPC1_DisableInterrupt(void)600 static void APB_PPC1_DisableInterrupt(void)
601 {
602 ppc_sse200_irq_disable(&APB_PPC1_DEV);
603 }
604
APB_PPC1_ClearInterrupt(void)605 static void APB_PPC1_ClearInterrupt(void)
606 {
607 ppc_sse200_clear_irq(&APB_PPC1_DEV);
608 }
609
APB_PPC1_InterruptState(void)610 static uint32_t APB_PPC1_InterruptState(void)
611 {
612 return ppc_sse200_irq_state(&APB_PPC1_DEV);
613 }
614
615 /* APB PPC1 Driver CMSIS access structure */
616 extern ARM_DRIVER_PPC Driver_APB_PPC1;
617 ARM_DRIVER_PPC Driver_APB_PPC1 = {
618 .GetVersion = ARM_PPC_GetVersion,
619 .Initialize = APB_PPC1_Initialize,
620 .Uninitialize = APB_PPC1_Uninitialize,
621 .ConfigPeriph = APB_PPC1_ConfigPeriph,
622 .IsPeriphSecure = APB_PPC1_IsPeriphSecure,
623 .IsPeriphPrivOnly = APB_PPC1_IsPeriphPrivOnly,
624 .EnableInterrupt = APB_PPC1_EnableInterrupt,
625 .DisableInterrupt = APB_PPC1_DisableInterrupt,
626 .ClearInterrupt = APB_PPC1_ClearInterrupt,
627 .InterruptState = APB_PPC1_InterruptState
628 };
629 #endif /* RTE_APB_PPC1 */
630
631 #if (RTE_APB_PPCEXP0)
632 /* APB PPCEXP0 Driver wrapper functions */
APB_PPCEXP0_Initialize(void)633 static int32_t APB_PPCEXP0_Initialize(void)
634 {
635 ppc_sse200_init(&APB_PPCEXP0_DEV, APB_PPC_EXP0);
636
637 return ARM_DRIVER_OK;
638 }
639
APB_PPCEXP0_Uninitialize(void)640 static int32_t APB_PPCEXP0_Uninitialize(void)
641 {
642 /* Nothing to be done */
643 return ARM_DRIVER_OK;
644 }
645
APB_PPCEXP0_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)646 static int32_t APB_PPCEXP0_ConfigPeriph(uint8_t periph,
647 ARM_PPC_SecAttr sec_attr,
648 ARM_PPC_PrivAttr priv_attr)
649 {
650 enum ppc_sse200_error_t ret;
651
652 ret = ppc_sse200_config_peripheral(&APB_PPCEXP0_DEV, periph,
653 (enum ppc_sse200_sec_attr_t)sec_attr,
654 (enum ppc_sse200_priv_attr_t)priv_attr);
655 if (ret != PPC_SSE200_ERR_NONE) {
656 return ARM_DRIVER_ERROR;
657 }
658
659 return ARM_DRIVER_OK;
660 }
661
APB_PPCEXP0_IsPeriphSecure(uint8_t periph)662 static uint32_t APB_PPCEXP0_IsPeriphSecure(uint8_t periph)
663 {
664 return ppc_sse200_is_periph_secure(&APB_PPCEXP0_DEV, periph);
665 }
666
APB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)667 static uint32_t APB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)
668 {
669 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP0_DEV, periph);
670 }
671
APB_PPCEXP0_EnableInterrupt(void)672 static int32_t APB_PPCEXP0_EnableInterrupt(void)
673 {
674 enum ppc_sse200_error_t ret;
675
676 ret = ppc_sse200_irq_enable(&APB_PPCEXP0_DEV);
677
678 if (ret != PPC_SSE200_ERR_NONE) {
679 return ARM_DRIVER_ERROR;
680 }
681
682 return ARM_DRIVER_OK;
683 }
684
APB_PPCEXP0_DisableInterrupt(void)685 static void APB_PPCEXP0_DisableInterrupt(void)
686 {
687 ppc_sse200_irq_disable(&APB_PPCEXP0_DEV);
688 }
689
APB_PPCEXP0_ClearInterrupt(void)690 static void APB_PPCEXP0_ClearInterrupt(void)
691 {
692 ppc_sse200_clear_irq(&APB_PPCEXP0_DEV);
693 }
694
APB_PPCEXP0_InterruptState(void)695 static uint32_t APB_PPCEXP0_InterruptState(void)
696 {
697 return ppc_sse200_irq_state(&APB_PPCEXP0_DEV);
698 }
699
700 /* APB PPCEXP0 Driver CMSIS access structure */
701 extern ARM_DRIVER_PPC Driver_APB_PPCEXP0;
702 ARM_DRIVER_PPC Driver_APB_PPCEXP0 = {
703 .GetVersion = ARM_PPC_GetVersion,
704 .Initialize = APB_PPCEXP0_Initialize,
705 .Uninitialize = APB_PPCEXP0_Uninitialize,
706 .ConfigPeriph = APB_PPCEXP0_ConfigPeriph,
707 .IsPeriphSecure = APB_PPCEXP0_IsPeriphSecure,
708 .IsPeriphPrivOnly = APB_PPCEXP0_IsPeriphPrivOnly,
709 .EnableInterrupt = APB_PPCEXP0_EnableInterrupt,
710 .DisableInterrupt = APB_PPCEXP0_DisableInterrupt,
711 .ClearInterrupt = APB_PPCEXP0_ClearInterrupt,
712 .InterruptState = APB_PPCEXP0_InterruptState
713 };
714 #endif /* RTE_APB_PPCEXP0 */
715
716 #if (RTE_APB_PPCEXP1)
717 /* APB PPCEXP1 Driver wrapper functions */
APB_PPCEXP1_Initialize(void)718 static int32_t APB_PPCEXP1_Initialize(void)
719 {
720 ppc_sse200_init(&APB_PPCEXP1_DEV, APB_PPC_EXP1);
721
722 return ARM_DRIVER_OK;
723 }
724
APB_PPCEXP1_Uninitialize(void)725 static int32_t APB_PPCEXP1_Uninitialize(void)
726 {
727 /* Nothing to be done */
728 return ARM_DRIVER_OK;
729 }
730
APB_PPCEXP1_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)731 static int32_t APB_PPCEXP1_ConfigPeriph(uint8_t periph,
732 ARM_PPC_SecAttr sec_attr,
733 ARM_PPC_PrivAttr priv_attr)
734 {
735 enum ppc_sse200_error_t ret;
736
737 ret = ppc_sse200_config_peripheral(&APB_PPCEXP1_DEV, periph,
738 (enum ppc_sse200_sec_attr_t)sec_attr,
739 (enum ppc_sse200_priv_attr_t)priv_attr);
740 if (ret != PPC_SSE200_ERR_NONE) {
741 return ARM_DRIVER_ERROR;
742 }
743
744 return ARM_DRIVER_OK;
745 }
746
APB_PPCEXP1_IsPeriphSecure(uint8_t periph)747 static uint32_t APB_PPCEXP1_IsPeriphSecure(uint8_t periph)
748 {
749 return ppc_sse200_is_periph_secure(&APB_PPCEXP1_DEV, periph);
750 }
751
APB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)752 static uint32_t APB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)
753 {
754 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP1_DEV, periph);
755 }
756
APB_PPCEXP1_EnableInterrupt(void)757 static int32_t APB_PPCEXP1_EnableInterrupt(void)
758 {
759 enum ppc_sse200_error_t ret;
760
761 ret = ppc_sse200_irq_enable(&APB_PPCEXP1_DEV);
762
763 if (ret != PPC_SSE200_ERR_NONE) {
764 return ARM_DRIVER_ERROR;
765 }
766
767 return ARM_DRIVER_OK;
768 }
769
APB_PPCEXP1_DisableInterrupt(void)770 static void APB_PPCEXP1_DisableInterrupt(void)
771 {
772 ppc_sse200_irq_disable(&APB_PPCEXP1_DEV);
773 }
774
APB_PPCEXP1_ClearInterrupt(void)775 static void APB_PPCEXP1_ClearInterrupt(void)
776 {
777 ppc_sse200_clear_irq(&APB_PPCEXP1_DEV);
778 }
779
APB_PPCEXP1_InterruptState(void)780 static uint32_t APB_PPCEXP1_InterruptState(void)
781 {
782 return ppc_sse200_irq_state(&APB_PPCEXP1_DEV);
783 }
784
785 /* APB PPCEXP1 Driver CMSIS access structure */
786 extern ARM_DRIVER_PPC Driver_APB_PPCEXP1;
787 ARM_DRIVER_PPC Driver_APB_PPCEXP1 = {
788 .GetVersion = ARM_PPC_GetVersion,
789 .Initialize = APB_PPCEXP1_Initialize,
790 .Uninitialize = APB_PPCEXP1_Uninitialize,
791 .ConfigPeriph = APB_PPCEXP1_ConfigPeriph,
792 .IsPeriphSecure = APB_PPCEXP1_IsPeriphSecure,
793 .IsPeriphPrivOnly = APB_PPCEXP1_IsPeriphPrivOnly,
794 .EnableInterrupt = APB_PPCEXP1_EnableInterrupt,
795 .DisableInterrupt = APB_PPCEXP1_DisableInterrupt,
796 .ClearInterrupt = APB_PPCEXP1_ClearInterrupt,
797 .InterruptState = APB_PPCEXP1_InterruptState
798 };
799 #endif /* RTE_APB_PPCEXP1 */
800
801 #if (RTE_APB_PPCEXP2)
802 /* APB PPCEXP2 Driver wrapper functions */
APB_PPCEXP2_Initialize(void)803 static int32_t APB_PPCEXP2_Initialize(void)
804 {
805 ppc_sse200_init(&APB_PPCEXP2_DEV, APB_PPC_EXP2);
806
807 return ARM_DRIVER_OK;
808 }
809
APB_PPCEXP2_Uninitialize(void)810 static int32_t APB_PPCEXP2_Uninitialize(void)
811 {
812 /* Nothing to be done */
813 return ARM_DRIVER_OK;
814 }
815
APB_PPCEXP2_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)816 static int32_t APB_PPCEXP2_ConfigPeriph(uint8_t periph,
817 ARM_PPC_SecAttr sec_attr,
818 ARM_PPC_PrivAttr priv_attr)
819 {
820 ppc_sse200_config_peripheral(&APB_PPCEXP2_DEV, periph,
821 (enum ppc_sse200_sec_attr_t)sec_attr,
822 (enum ppc_sse200_priv_attr_t)priv_attr);
823
824 return ARM_DRIVER_OK;
825 }
826
APB_PPCEXP2_IsPeriphSecure(uint8_t periph)827 static uint32_t APB_PPCEXP2_IsPeriphSecure(uint8_t periph)
828 {
829 return ppc_sse200_is_periph_secure(&APB_PPCEXP2_DEV, periph);
830 }
831
APB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)832 static uint32_t APB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)
833 {
834 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP2_DEV, periph);
835 }
836
APB_PPCEXP2_EnableInterrupt(void)837 static int32_t APB_PPCEXP2_EnableInterrupt(void)
838 {
839 enum ppc_sse200_error_t ret;
840
841 ret = ppc_sse200_irq_enable(&APB_PPCEXP2_DEV);
842
843 if (ret != PPC_SSE200_ERR_NONE) {
844 return ARM_DRIVER_ERROR;
845 }
846
847 return ARM_DRIVER_OK;
848 }
849
APB_PPCEXP2_DisableInterrupt(void)850 static void APB_PPCEXP2_DisableInterrupt(void)
851 {
852 ppc_sse200_irq_disable(&APB_PPCEXP2_DEV);
853 }
854
APB_PPCEXP2_ClearInterrupt(void)855 static void APB_PPCEXP2_ClearInterrupt(void)
856 {
857 ppc_sse200_clear_irq(&APB_PPCEXP2_DEV);
858 }
859
APB_PPCEXP2_InterruptState(void)860 static uint32_t APB_PPCEXP2_InterruptState(void)
861 {
862 return ppc_sse200_irq_state(&APB_PPCEXP2_DEV);
863 }
864
865 /* APB PPCEXP2 Driver CMSIS access structure */
866 extern ARM_DRIVER_PPC Driver_APB_PPCEXP2;
867 ARM_DRIVER_PPC Driver_APB_PPCEXP2 = {
868 .GetVersion = ARM_PPC_GetVersion,
869 .Initialize = APB_PPCEXP2_Initialize,
870 .Uninitialize = APB_PPCEXP2_Uninitialize,
871 .ConfigPeriph = APB_PPCEXP2_ConfigPeriph,
872 .IsPeriphSecure = APB_PPCEXP2_IsPeriphSecure,
873 .IsPeriphPrivOnly = APB_PPCEXP2_IsPeriphPrivOnly,
874 .EnableInterrupt = APB_PPCEXP2_EnableInterrupt,
875 .DisableInterrupt = APB_PPCEXP2_DisableInterrupt,
876 .ClearInterrupt = APB_PPCEXP2_ClearInterrupt,
877 .InterruptState = APB_PPCEXP2_InterruptState
878 };
879 #endif /* RTE_APB_PPCEXP2 */
880
881 #if (RTE_APB_PPCEXP3)
882 /* APB PPCEXP3 Driver wrapper functions */
APB_PPCEXP3_Initialize(void)883 static int32_t APB_PPCEXP3_Initialize(void)
884 {
885 ppc_sse200_init(&APB_PPCEXP3_DEV, APB_PPC_EXP3);
886
887 return ARM_DRIVER_OK;
888 }
889
APB_PPCEXP3_Uninitialize(void)890 static int32_t APB_PPCEXP3_Uninitialize(void)
891 {
892 /* Nothing to be done */
893 return ARM_DRIVER_OK;
894 }
895
APB_PPCEXP3_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)896 static int32_t APB_PPCEXP3_ConfigPeriph(
897 uint8_t periph, ARM_PPC_SecAttr sec_attr,
898 ARM_PPC_PrivAttr priv_attr)
899 {
900 enum ppc_sse200_error_t ret;
901
902 ret = ppc_sse200_config_peripheral(&APB_PPCEXP3_DEV, periph,
903 (enum ppc_sse200_sec_attr_t)sec_attr,
904 (enum ppc_sse200_priv_attr_t)priv_attr);
905
906 if (ret != PPC_SSE200_ERR_NONE) {
907 return ARM_DRIVER_ERROR;
908 }
909
910 return ARM_DRIVER_OK;
911 }
912
APB_PPCEXP3_IsPeriphSecure(uint8_t periph)913 static uint32_t APB_PPCEXP3_IsPeriphSecure(uint8_t periph)
914 {
915 return ppc_sse200_is_periph_secure(&APB_PPCEXP3_DEV, periph);
916 }
917
APB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)918 static uint32_t APB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)
919 {
920 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP3_DEV, periph);
921 }
922
APB_PPCEXP3_EnableInterrupt(void)923 static int32_t APB_PPCEXP3_EnableInterrupt(void)
924 {
925 enum ppc_sse200_error_t ret;
926
927 ret = ppc_sse200_irq_enable(&APB_PPCEXP3_DEV);
928
929 if (ret != PPC_SSE200_ERR_NONE) {
930 return ARM_DRIVER_ERROR;
931 }
932
933 return ARM_DRIVER_OK;
934 }
935
APB_PPCEXP3_DisableInterrupt(void)936 static void APB_PPCEXP3_DisableInterrupt(void)
937 {
938 ppc_sse200_irq_disable(&APB_PPCEXP3_DEV);
939 }
940
APB_PPCEXP3_ClearInterrupt(void)941 static void APB_PPCEXP3_ClearInterrupt(void)
942 {
943 ppc_sse200_clear_irq(&APB_PPCEXP3_DEV);
944 }
945
APB_PPCEXP3_InterruptState(void)946 static uint32_t APB_PPCEXP3_InterruptState(void)
947 {
948 return ppc_sse200_irq_state(&APB_PPCEXP3_DEV);
949 }
950
951 /* APB PPCEXP3 Driver CMSIS access structure */
952 extern ARM_DRIVER_PPC Driver_APB_PPCEXP3;
953 ARM_DRIVER_PPC Driver_APB_PPCEXP3 = {
954 .GetVersion = ARM_PPC_GetVersion,
955 .Initialize = APB_PPCEXP3_Initialize,
956 .Uninitialize = APB_PPCEXP3_Uninitialize,
957 .ConfigPeriph = APB_PPCEXP3_ConfigPeriph,
958 .IsPeriphSecure = APB_PPCEXP3_IsPeriphSecure,
959 .IsPeriphPrivOnly = APB_PPCEXP3_IsPeriphPrivOnly,
960 .EnableInterrupt = APB_PPCEXP3_EnableInterrupt,
961 .DisableInterrupt = APB_PPCEXP3_DisableInterrupt,
962 .ClearInterrupt = APB_PPCEXP3_ClearInterrupt,
963 .InterruptState = APB_PPCEXP3_InterruptState
964 };
965 #endif /* RTE_APB_PPCEXP3 */
966