1 /*
2 * Copyright (c) 2016-2024, Arm Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "Driver_PPC.h"
18
19 #include "tfm_hal_device_header.h"
20 #include "platform_retarget_dev.h"
21 #include "RTE_Device.h"
22
23 /* Driver version */
24 #define ARM_PPC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0)
25
26 /* Driver Version */
27 static const ARM_DRIVER_VERSION DriverVersion = {
28 ARM_PPC_API_VERSION,
29 ARM_PPC_DRV_VERSION
30 };
31
ARM_PPC_GetVersion(void)32 static ARM_DRIVER_VERSION ARM_PPC_GetVersion(void)
33 {
34 return DriverVersion;
35 }
36
37 #if (RTE_AHB_PPCEXP0)
38 /* AHB PPCEXP0 Driver wrapper functions */
AHB_PPCEXP0_Initialize(void)39 static int32_t AHB_PPCEXP0_Initialize(void)
40 {
41 ppc_sse200_init(&AHB_PPCEXP0_DEV_S, AHB_PPC_EXP0);
42
43 return ARM_DRIVER_OK;
44 }
45
AHB_PPCEXP0_Uninitialize(void)46 static int32_t AHB_PPCEXP0_Uninitialize(void)
47 {
48 /* Nothing to be done */
49 return ARM_DRIVER_OK;
50 }
51
AHB_PPCEXP0_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)52 static int32_t AHB_PPCEXP0_ConfigPeriph(uint8_t periph,
53 ARM_PPC_SecAttr sec_attr,
54 ARM_PPC_PrivAttr priv_attr)
55 {
56 enum ppc_sse200_error_t ret;
57
58 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP0_DEV_S, periph,
59 (enum ppc_sse200_sec_attr_t)sec_attr,
60 (enum ppc_sse200_priv_attr_t)priv_attr);
61
62 if( ret != PPC_SSE200_ERR_NONE) {
63 return ARM_DRIVER_ERROR;
64 }
65
66 return ARM_DRIVER_OK;
67 }
68
AHB_PPCEXP0_IsPeriphSecure(uint8_t periph)69 static uint32_t AHB_PPCEXP0_IsPeriphSecure(uint8_t periph)
70 {
71 return ppc_sse200_is_periph_secure(&AHB_PPCEXP0_DEV_S, periph);
72 }
73
AHB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)74 static uint32_t AHB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)
75 {
76 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP0_DEV_S, periph);
77 }
78
AHB_PPCEXP0_EnableInterrupt(void)79 static int32_t AHB_PPCEXP0_EnableInterrupt(void)
80 {
81 enum ppc_sse200_error_t ret;
82
83 ret = ppc_sse200_irq_enable(&AHB_PPCEXP0_DEV_S);
84
85 if( ret != PPC_SSE200_ERR_NONE) {
86 return ARM_DRIVER_ERROR;
87 }
88
89 return ARM_DRIVER_OK;
90 }
91
AHB_PPCEXP0_DisableInterrupt(void)92 static void AHB_PPCEXP0_DisableInterrupt(void)
93 {
94 ppc_sse200_irq_disable(&AHB_PPCEXP0_DEV_S);
95 }
96
AHB_PPCEXP0_ClearInterrupt(void)97 static void AHB_PPCEXP0_ClearInterrupt(void)
98 {
99 ppc_sse200_clear_irq(&AHB_PPCEXP0_DEV_S);
100 }
101
AHB_PPCEXP0_InterruptState(void)102 static uint32_t AHB_PPCEXP0_InterruptState(void)
103 {
104 return ppc_sse200_irq_state(&AHB_PPCEXP0_DEV_S);
105 }
106
107 /* AHB PPCEXP0 Driver CMSIS access structure */
108 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP0;
109 ARM_DRIVER_PPC Driver_AHB_PPCEXP0 = {
110 .GetVersion = ARM_PPC_GetVersion,
111 .Initialize = AHB_PPCEXP0_Initialize,
112 .Uninitialize = AHB_PPCEXP0_Uninitialize,
113 .ConfigPeriph = AHB_PPCEXP0_ConfigPeriph,
114 .IsPeriphSecure = AHB_PPCEXP0_IsPeriphSecure,
115 .IsPeriphPrivOnly = AHB_PPCEXP0_IsPeriphPrivOnly,
116 .EnableInterrupt = AHB_PPCEXP0_EnableInterrupt,
117 .DisableInterrupt = AHB_PPCEXP0_DisableInterrupt,
118 .ClearInterrupt = AHB_PPCEXP0_ClearInterrupt,
119 .InterruptState = AHB_PPCEXP0_InterruptState
120 };
121 #endif /* RTE_AHB_PPCEXP0 */
122
123 #if (RTE_AHB_PPCEXP1)
124 /* AHB PPCEXP1 Driver wrapper functions */
AHB_PPCEXP1_Initialize(void)125 static int32_t AHB_PPCEXP1_Initialize(void)
126 {
127 ppc_sse200_init(&AHB_PPCEXP1_DEV_S, AHB_PPC_EXP1);
128
129 return ARM_DRIVER_OK;
130 }
131
AHB_PPCEXP1_Uninitialize(void)132 static int32_t AHB_PPCEXP1_Uninitialize(void)
133 {
134 /* Nothing to be done */
135 return ARM_DRIVER_OK;
136 }
137
AHB_PPCEXP1_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)138 static int32_t AHB_PPCEXP1_ConfigPeriph(uint8_t periph,
139 ARM_PPC_SecAttr sec_attr,
140 ARM_PPC_PrivAttr priv_attr)
141 {
142 enum ppc_sse200_error_t ret;
143
144 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP1_DEV_S, periph,
145 (enum ppc_sse200_sec_attr_t)sec_attr,
146 (enum ppc_sse200_priv_attr_t)priv_attr);
147
148 if( ret != PPC_SSE200_ERR_NONE) {
149 return ARM_DRIVER_ERROR;
150 }
151
152 return ARM_DRIVER_OK;
153 }
154
AHB_PPCEXP1_IsPeriphSecure(uint8_t periph)155 static uint32_t AHB_PPCEXP1_IsPeriphSecure(uint8_t periph)
156 {
157 return ppc_sse200_is_periph_secure(&AHB_PPCEXP1_DEV_S, periph);
158 }
159
AHB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)160 static uint32_t AHB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)
161 {
162 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP1_DEV_S, periph);
163 }
164
AHB_PPCEXP1_EnableInterrupt(void)165 static int32_t AHB_PPCEXP1_EnableInterrupt(void)
166 {
167 enum ppc_sse200_error_t ret;
168
169 ret = ppc_sse200_irq_enable(&AHB_PPCEXP1_DEV_S);
170
171 if( ret != PPC_SSE200_ERR_NONE) {
172 return ARM_DRIVER_ERROR;
173 }
174
175 return ARM_DRIVER_OK;
176 }
177
AHB_PPCEXP1_DisableInterrupt(void)178 static void AHB_PPCEXP1_DisableInterrupt(void)
179 {
180 ppc_sse200_irq_disable(&AHB_PPCEXP1_DEV_S);
181 }
182
AHB_PPCEXP1_ClearInterrupt(void)183 static void AHB_PPCEXP1_ClearInterrupt(void)
184 {
185 ppc_sse200_clear_irq(&AHB_PPCEXP1_DEV_S);
186 }
187
AHB_PPCEXP1_InterruptState(void)188 static uint32_t AHB_PPCEXP1_InterruptState(void)
189 {
190 return ppc_sse200_irq_state(&AHB_PPCEXP1_DEV_S);
191 }
192
193 /* AHB PPCEXP1 Driver CMSIS access structure */
194 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP1;
195 ARM_DRIVER_PPC Driver_AHB_PPCEXP1 = {
196 .GetVersion = ARM_PPC_GetVersion,
197 .Initialize = AHB_PPCEXP1_Initialize,
198 .Uninitialize = AHB_PPCEXP1_Uninitialize,
199 .ConfigPeriph = AHB_PPCEXP1_ConfigPeriph,
200 .IsPeriphSecure = AHB_PPCEXP1_IsPeriphSecure,
201 .IsPeriphPrivOnly = AHB_PPCEXP1_IsPeriphPrivOnly,
202 .EnableInterrupt = AHB_PPCEXP1_EnableInterrupt,
203 .DisableInterrupt = AHB_PPCEXP1_DisableInterrupt,
204 .ClearInterrupt = AHB_PPCEXP1_ClearInterrupt,
205 .InterruptState = AHB_PPCEXP1_InterruptState
206 };
207 #endif /* RTE_AHB_PPCEXP1 */
208
209 #if (RTE_AHB_PPCEXP2)
210 /* AHB PPCEXP2 Driver wrapper functions */
AHB_PPCEXP2_Initialize(void)211 static int32_t AHB_PPCEXP2_Initialize(void)
212 {
213 ppc_sse200_init(&AHB_PPCEXP2_DEV_S, AHB_PPC_EXP2);
214
215 return ARM_DRIVER_OK;
216 }
217
AHB_PPCEXP2_Uninitialize(void)218 static int32_t AHB_PPCEXP2_Uninitialize(void)
219 {
220 /* Nothing to be done */
221 return ARM_DRIVER_OK;
222 }
223
AHB_PPCEXP2_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)224 static int32_t AHB_PPCEXP2_ConfigPeriph(uint8_t periph,
225 ARM_PPC_SecAttr sec_attr,
226 ARM_PPC_PrivAttr priv_attr)
227 {
228 enum ppc_sse200_error_t ret;
229
230 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP2_DEV_S, periph,
231 (enum ppc_sse200_sec_attr_t)sec_attr,
232 (enum ppc_sse200_priv_attr_t)priv_attr);
233
234 if( ret != PPC_SSE200_ERR_NONE) {
235 return ARM_DRIVER_ERROR;
236 }
237
238 return ARM_DRIVER_OK;
239 }
240
AHB_PPCEXP2_IsPeriphSecure(uint8_t periph)241 static uint32_t AHB_PPCEXP2_IsPeriphSecure(uint8_t periph)
242 {
243 return ppc_sse200_is_periph_secure(&AHB_PPCEXP2_DEV_S, periph);
244 }
245
AHB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)246 static uint32_t AHB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)
247 {
248 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP2_DEV_S, periph);
249 }
250
AHB_PPCEXP2_EnableInterrupt(void)251 static int32_t AHB_PPCEXP2_EnableInterrupt(void)
252 {
253 enum ppc_sse200_error_t ret;
254
255 ret = ppc_sse200_irq_enable(&AHB_PPCEXP2_DEV_S);
256
257 if( ret != PPC_SSE200_ERR_NONE) {
258 return ARM_DRIVER_ERROR;
259 }
260
261 return ARM_DRIVER_OK;
262 }
263
AHB_PPCEXP2_DisableInterrupt(void)264 static void AHB_PPCEXP2_DisableInterrupt(void)
265 {
266 ppc_sse200_irq_disable(&AHB_PPCEXP2_DEV_S);
267 }
268
AHB_PPCEXP2_ClearInterrupt(void)269 static void AHB_PPCEXP2_ClearInterrupt(void)
270 {
271 ppc_sse200_clear_irq(&AHB_PPCEXP2_DEV_S);
272 }
273
AHB_PPCEXP2_InterruptState(void)274 static uint32_t AHB_PPCEXP2_InterruptState(void)
275 {
276 return ppc_sse200_irq_state(&AHB_PPCEXP2_DEV_S);
277 }
278
279 /* AHB PPCEXP2 Driver CMSIS access structure */
280 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP2;
281 ARM_DRIVER_PPC Driver_AHB_PPCEXP2 = {
282 .GetVersion = ARM_PPC_GetVersion,
283 .Initialize = AHB_PPCEXP2_Initialize,
284 .Uninitialize = AHB_PPCEXP2_Uninitialize,
285 .ConfigPeriph = AHB_PPCEXP2_ConfigPeriph,
286 .IsPeriphSecure = AHB_PPCEXP2_IsPeriphSecure,
287 .IsPeriphPrivOnly = AHB_PPCEXP2_IsPeriphPrivOnly,
288 .EnableInterrupt = AHB_PPCEXP2_EnableInterrupt,
289 .DisableInterrupt = AHB_PPCEXP2_DisableInterrupt,
290 .ClearInterrupt = AHB_PPCEXP2_ClearInterrupt,
291 .InterruptState = AHB_PPCEXP2_InterruptState
292 };
293 #endif /* RTE_AHB_PPCEXP2 */
294
295 #if (RTE_AHB_PPCEXP3)
296 /* AHB PPCEXP3 Driver wrapper functions */
AHB_PPCEXP3_Initialize(void)297 static int32_t AHB_PPCEXP3_Initialize(void)
298 {
299 ppc_sse200_init(&AHB_PPCEXP3_DEV_S, AHB_PPC_EXP3);
300
301 return ARM_DRIVER_OK;
302 }
303
AHB_PPCEXP3_Uninitialize(void)304 static int32_t AHB_PPCEXP3_Uninitialize(void)
305 {
306 /* Nothing to be done */
307 return ARM_DRIVER_OK;
308 }
309
AHB_PPCEXP3_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)310 static int32_t AHB_PPCEXP3_ConfigPeriph(uint8_t periph,
311 ARM_PPC_SecAttr sec_attr,
312 ARM_PPC_PrivAttr priv_attr)
313 {
314 enum ppc_sse200_error_t ret;
315
316 ret = ppc_sse200_config_peripheral(&AHB_PPCEXP3_DEV_S, periph,
317 (enum ppc_sse200_sec_attr_t)sec_attr,
318 (enum ppc_sse200_priv_attr_t)priv_attr);
319
320 if( ret != PPC_SSE200_ERR_NONE) {
321 return ARM_DRIVER_ERROR;
322 }
323
324 return ARM_DRIVER_OK;
325 }
326
AHB_PPCEXP3_IsPeriphSecure(uint8_t periph)327 static uint32_t AHB_PPCEXP3_IsPeriphSecure(uint8_t periph)
328 {
329 return ppc_sse200_is_periph_secure(&AHB_PPCEXP3_DEV_S, periph);
330 }
331
AHB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)332 static uint32_t AHB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)
333 {
334 return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP3_DEV_S, periph);
335 }
336
AHB_PPCEXP3_EnableInterrupt(void)337 static int32_t AHB_PPCEXP3_EnableInterrupt(void)
338 {
339 enum ppc_sse200_error_t ret;
340
341 ret = ppc_sse200_irq_enable(&AHB_PPCEXP3_DEV_S);
342
343 if( ret != PPC_SSE200_ERR_NONE) {
344 return ARM_DRIVER_ERROR;
345 }
346
347 return ARM_DRIVER_OK;
348 }
349
AHB_PPCEXP3_DisableInterrupt(void)350 static void AHB_PPCEXP3_DisableInterrupt(void)
351 {
352 ppc_sse200_irq_disable(&AHB_PPCEXP3_DEV_S);
353 }
354
AHB_PPCEXP3_ClearInterrupt(void)355 static void AHB_PPCEXP3_ClearInterrupt(void)
356 {
357 ppc_sse200_clear_irq(&AHB_PPCEXP3_DEV_S);
358 }
359
AHB_PPCEXP3_InterruptState(void)360 static uint32_t AHB_PPCEXP3_InterruptState(void)
361 {
362 return ppc_sse200_irq_state(&AHB_PPCEXP3_DEV_S);
363 }
364
365 /* AHB PPCEXP3 Driver CMSIS access structure */
366 extern ARM_DRIVER_PPC Driver_AHB_PPCEXP3;
367 ARM_DRIVER_PPC Driver_AHB_PPCEXP3 = {
368 .GetVersion = ARM_PPC_GetVersion,
369 .Initialize = AHB_PPCEXP3_Initialize,
370 .Uninitialize = AHB_PPCEXP3_Uninitialize,
371 .ConfigPeriph = AHB_PPCEXP3_ConfigPeriph,
372 .IsPeriphSecure = AHB_PPCEXP3_IsPeriphSecure,
373 .IsPeriphPrivOnly = AHB_PPCEXP3_IsPeriphPrivOnly,
374 .EnableInterrupt = AHB_PPCEXP3_EnableInterrupt,
375 .DisableInterrupt = AHB_PPCEXP3_DisableInterrupt,
376 .ClearInterrupt = AHB_PPCEXP3_ClearInterrupt,
377 .InterruptState = AHB_PPCEXP3_InterruptState
378 };
379 #endif /* RTE_AHB_PPCEXP3 */
380
381 #if (RTE_APB_PPC0)
382 /* APB PPC0 Driver wrapper functions */
APB_PPC0_Initialize(void)383 static int32_t APB_PPC0_Initialize(void)
384 {
385 ppc_sse200_init(&APB_PPC0_DEV_S, APB_PPC0);
386
387 return ARM_DRIVER_OK;
388 }
389
APB_PPC0_Uninitialize(void)390 static int32_t APB_PPC0_Uninitialize(void)
391 {
392 /* Nothing to be done*/
393 return ARM_DRIVER_OK;
394 }
395
APB_PPC0_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)396 static int32_t APB_PPC0_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr,
397 ARM_PPC_PrivAttr priv_attr)
398 {
399 enum ppc_sse200_error_t ret;
400
401 ret = ppc_sse200_config_peripheral(&APB_PPC0_DEV_S, periph,
402 (enum ppc_sse200_sec_attr_t)sec_attr,
403 (enum ppc_sse200_priv_attr_t)priv_attr);
404 if( ret != PPC_SSE200_ERR_NONE) {
405 return ARM_DRIVER_ERROR;
406 }
407
408 return ARM_DRIVER_OK;
409 }
410
APB_PPC0_IsPeriphSecure(uint8_t periph)411 static uint32_t APB_PPC0_IsPeriphSecure(uint8_t periph)
412 {
413 return ppc_sse200_is_periph_secure(&APB_PPC0_DEV_S, periph);
414 }
415
APB_PPC0_IsPeriphPrivOnly(uint8_t periph)416 static uint32_t APB_PPC0_IsPeriphPrivOnly(uint8_t periph)
417 {
418 return ppc_sse200_is_periph_priv_only(&APB_PPC0_DEV_S, periph);
419 }
420
APB_PPC0_EnableInterrupt(void)421 static int32_t APB_PPC0_EnableInterrupt(void)
422 {
423 enum ppc_sse200_error_t ret;
424
425 ret = ppc_sse200_irq_enable(&APB_PPC0_DEV_S);
426
427 if( ret != PPC_SSE200_ERR_NONE) {
428 return ARM_DRIVER_ERROR;
429 }
430
431 return ARM_DRIVER_OK;
432 }
433
APB_PPC0_DisableInterrupt(void)434 static void APB_PPC0_DisableInterrupt(void)
435 {
436 ppc_sse200_irq_disable(&APB_PPC0_DEV_S);
437 }
438
APB_PPC0_ClearInterrupt(void)439 static void APB_PPC0_ClearInterrupt(void)
440 {
441 ppc_sse200_clear_irq(&APB_PPC0_DEV_S);
442 }
443
APB_PPC0_InterruptState(void)444 static uint32_t APB_PPC0_InterruptState(void)
445 {
446 return ppc_sse200_irq_state(&APB_PPC0_DEV_S);
447 }
448
449 /* APB PPC0 Driver CMSIS access structure */
450 extern ARM_DRIVER_PPC Driver_APB_PPC0;
451 ARM_DRIVER_PPC Driver_APB_PPC0 = {
452 .GetVersion = ARM_PPC_GetVersion,
453 .Initialize = APB_PPC0_Initialize,
454 .Uninitialize = APB_PPC0_Uninitialize,
455 .ConfigPeriph = APB_PPC0_ConfigPeriph,
456 .IsPeriphSecure = APB_PPC0_IsPeriphSecure,
457 .IsPeriphPrivOnly = APB_PPC0_IsPeriphPrivOnly,
458 .EnableInterrupt = APB_PPC0_EnableInterrupt,
459 .DisableInterrupt = APB_PPC0_DisableInterrupt,
460 .ClearInterrupt = APB_PPC0_ClearInterrupt,
461 .InterruptState = APB_PPC0_InterruptState
462 };
463 #endif /* RTE_APB_PPC0 */
464
465 #if (RTE_APB_PPC1)
466 /* APB PPC1 Driver wrapper functions */
APB_PPC1_Initialize(void)467 static int32_t APB_PPC1_Initialize(void)
468 {
469 ppc_sse200_init(&APB_PPC1_DEV_S, APB_PPC1);
470
471 return ARM_DRIVER_OK;
472 }
473
APB_PPC1_Uninitialize(void)474 static int32_t APB_PPC1_Uninitialize(void)
475 {
476 /* Nothing to be done*/
477 return ARM_DRIVER_OK;
478 }
479
APB_PPC1_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)480 static int32_t APB_PPC1_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr,
481 ARM_PPC_PrivAttr priv_attr)
482 {
483 enum ppc_sse200_error_t ret;
484
485 ret = ppc_sse200_config_peripheral(&APB_PPC1_DEV_S, periph,
486 (enum ppc_sse200_sec_attr_t)sec_attr,
487 (enum ppc_sse200_priv_attr_t)priv_attr);
488 if( ret != PPC_SSE200_ERR_NONE) {
489 return ARM_DRIVER_ERROR;
490 }
491
492 return ARM_DRIVER_OK;
493 }
494
APB_PPC1_IsPeriphSecure(uint8_t periph)495 static uint32_t APB_PPC1_IsPeriphSecure(uint8_t periph)
496 {
497 return ppc_sse200_is_periph_secure(&APB_PPC1_DEV_S, periph);
498 }
499
APB_PPC1_IsPeriphPrivOnly(uint8_t periph)500 static uint32_t APB_PPC1_IsPeriphPrivOnly(uint8_t periph)
501 {
502 return ppc_sse200_is_periph_priv_only(&APB_PPC1_DEV_S, periph);
503 }
APB_PPC1_EnableInterrupt(void)504 static int32_t APB_PPC1_EnableInterrupt(void)
505 {
506 enum ppc_sse200_error_t ret;
507
508 ret = ppc_sse200_irq_enable(&APB_PPC1_DEV_S);
509
510 if( ret != PPC_SSE200_ERR_NONE) {
511 return ARM_DRIVER_ERROR;
512 }
513
514 return ARM_DRIVER_OK;
515 }
516
APB_PPC1_DisableInterrupt(void)517 static void APB_PPC1_DisableInterrupt(void)
518 {
519 ppc_sse200_irq_disable(&APB_PPC1_DEV_S);
520 }
521
APB_PPC1_ClearInterrupt(void)522 static void APB_PPC1_ClearInterrupt(void)
523 {
524 ppc_sse200_clear_irq(&APB_PPC1_DEV_S);
525 }
526
APB_PPC1_InterruptState(void)527 static uint32_t APB_PPC1_InterruptState(void)
528 {
529 return ppc_sse200_irq_state(&APB_PPC1_DEV_S);
530 }
531
532 /* APB PPC1 Driver CMSIS access structure */
533 extern ARM_DRIVER_PPC Driver_APB_PPC1;
534 ARM_DRIVER_PPC Driver_APB_PPC1 = {
535 .GetVersion = ARM_PPC_GetVersion,
536 .Initialize = APB_PPC1_Initialize,
537 .Uninitialize = APB_PPC1_Uninitialize,
538 .ConfigPeriph = APB_PPC1_ConfigPeriph,
539 .IsPeriphSecure = APB_PPC1_IsPeriphSecure,
540 .IsPeriphPrivOnly = APB_PPC1_IsPeriphPrivOnly,
541 .EnableInterrupt = APB_PPC1_EnableInterrupt,
542 .DisableInterrupt = APB_PPC1_DisableInterrupt,
543 .ClearInterrupt = APB_PPC1_ClearInterrupt,
544 .InterruptState = APB_PPC1_InterruptState
545 };
546 #endif /* RTE_APB_PPC1 */
547
548 #if (RTE_APB_PPCEXP0)
549 /* APB PPCEXP0 Driver wrapper functions */
APB_PPCEXP0_Initialize(void)550 static int32_t APB_PPCEXP0_Initialize(void)
551 {
552 ppc_sse200_init(&APB_PPCEXP0_DEV_S, APB_PPC_EXP0);
553
554 return ARM_DRIVER_OK;
555 }
556
APB_PPCEXP0_Uninitialize(void)557 static int32_t APB_PPCEXP0_Uninitialize(void)
558 {
559 /* Nothing to be done */
560 return ARM_DRIVER_OK;
561 }
562
APB_PPCEXP0_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)563 static int32_t APB_PPCEXP0_ConfigPeriph(uint8_t periph,
564 ARM_PPC_SecAttr sec_attr,
565 ARM_PPC_PrivAttr priv_attr)
566 {
567 enum ppc_sse200_error_t ret;
568
569 ret = ppc_sse200_config_peripheral(&APB_PPCEXP0_DEV_S, periph,
570 (enum ppc_sse200_sec_attr_t)sec_attr,
571 (enum ppc_sse200_priv_attr_t)priv_attr);
572 if( ret != PPC_SSE200_ERR_NONE) {
573 return ARM_DRIVER_ERROR;
574 }
575
576 return ARM_DRIVER_OK;
577 }
578
APB_PPCEXP0_IsPeriphSecure(uint8_t periph)579 static uint32_t APB_PPCEXP0_IsPeriphSecure(uint8_t periph)
580 {
581 return ppc_sse200_is_periph_secure(&APB_PPCEXP0_DEV_S, periph);
582 }
583
APB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)584 static uint32_t APB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph)
585 {
586 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP0_DEV_S, periph);
587 }
588
APB_PPCEXP0_EnableInterrupt(void)589 static int32_t APB_PPCEXP0_EnableInterrupt(void)
590 {
591 enum ppc_sse200_error_t ret;
592
593 ret = ppc_sse200_irq_enable(&APB_PPCEXP0_DEV_S);
594
595 if( ret != PPC_SSE200_ERR_NONE) {
596 return ARM_DRIVER_ERROR;
597 }
598
599 return ARM_DRIVER_OK;
600 }
601
APB_PPCEXP0_DisableInterrupt(void)602 static void APB_PPCEXP0_DisableInterrupt(void)
603 {
604 ppc_sse200_irq_disable(&APB_PPCEXP0_DEV_S);
605 }
606
APB_PPCEXP0_ClearInterrupt(void)607 static void APB_PPCEXP0_ClearInterrupt(void)
608 {
609 ppc_sse200_clear_irq(&APB_PPCEXP0_DEV_S);
610 }
611
APB_PPCEXP0_InterruptState(void)612 static uint32_t APB_PPCEXP0_InterruptState(void)
613 {
614 return ppc_sse200_irq_state(&APB_PPCEXP0_DEV_S);
615 }
616
617 /* APB PPCEXP0 Driver CMSIS access structure */
618 extern ARM_DRIVER_PPC Driver_APB_PPCEXP0;
619 ARM_DRIVER_PPC Driver_APB_PPCEXP0 = {
620 .GetVersion = ARM_PPC_GetVersion,
621 .Initialize = APB_PPCEXP0_Initialize,
622 .Uninitialize = APB_PPCEXP0_Uninitialize,
623 .ConfigPeriph = APB_PPCEXP0_ConfigPeriph,
624 .IsPeriphSecure = APB_PPCEXP0_IsPeriphSecure,
625 .IsPeriphPrivOnly = APB_PPCEXP0_IsPeriphPrivOnly,
626 .EnableInterrupt = APB_PPCEXP0_EnableInterrupt,
627 .DisableInterrupt = APB_PPCEXP0_DisableInterrupt,
628 .ClearInterrupt = APB_PPCEXP0_ClearInterrupt,
629 .InterruptState = APB_PPCEXP0_InterruptState
630 };
631 #endif /* RTE_APB_PPCEXP0 */
632
633 #if (RTE_APB_PPCEXP1)
634 /* APB PPCEXP1 Driver wrapper functions */
APB_PPCEXP1_Initialize(void)635 static int32_t APB_PPCEXP1_Initialize(void)
636 {
637 ppc_sse200_init(&APB_PPCEXP1_DEV_S, APB_PPC_EXP1);
638
639 return ARM_DRIVER_OK;
640 }
641
APB_PPCEXP1_Uninitialize(void)642 static int32_t APB_PPCEXP1_Uninitialize(void)
643 {
644 /* Nothing to be done */
645 return ARM_DRIVER_OK;
646 }
647
APB_PPCEXP1_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)648 static int32_t APB_PPCEXP1_ConfigPeriph(uint8_t periph,
649 ARM_PPC_SecAttr sec_attr,
650 ARM_PPC_PrivAttr priv_attr)
651 {
652 enum ppc_sse200_error_t ret;
653
654 ret = ppc_sse200_config_peripheral(&APB_PPCEXP1_DEV_S, periph,
655 (enum ppc_sse200_sec_attr_t)sec_attr,
656 (enum ppc_sse200_priv_attr_t)priv_attr);
657 if( ret != PPC_SSE200_ERR_NONE) {
658 return ARM_DRIVER_ERROR;
659 }
660
661 return ARM_DRIVER_OK;
662 }
663
APB_PPCEXP1_IsPeriphSecure(uint8_t periph)664 static uint32_t APB_PPCEXP1_IsPeriphSecure(uint8_t periph)
665 {
666 return ppc_sse200_is_periph_secure(&APB_PPCEXP1_DEV_S, periph);
667 }
668
APB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)669 static uint32_t APB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph)
670 {
671 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP1_DEV_S, periph);
672 }
673
APB_PPCEXP1_EnableInterrupt(void)674 static int32_t APB_PPCEXP1_EnableInterrupt(void)
675 {
676 enum ppc_sse200_error_t ret;
677
678 ret = ppc_sse200_irq_enable(&APB_PPCEXP1_DEV_S);
679
680 if( ret != PPC_SSE200_ERR_NONE) {
681 return ARM_DRIVER_ERROR;
682 }
683
684 return ARM_DRIVER_OK;
685 }
686
APB_PPCEXP1_DisableInterrupt(void)687 static void APB_PPCEXP1_DisableInterrupt(void)
688 {
689 ppc_sse200_irq_disable(&APB_PPCEXP1_DEV_S);
690 }
691
APB_PPCEXP1_ClearInterrupt(void)692 static void APB_PPCEXP1_ClearInterrupt(void)
693 {
694 ppc_sse200_clear_irq(&APB_PPCEXP1_DEV_S);
695 }
696
APB_PPCEXP1_InterruptState(void)697 static uint32_t APB_PPCEXP1_InterruptState(void)
698 {
699 return ppc_sse200_irq_state(&APB_PPCEXP1_DEV_S);
700 }
701
702 /* APB PPCEXP1 Driver CMSIS access structure */
703 extern ARM_DRIVER_PPC Driver_APB_PPCEXP1;
704 ARM_DRIVER_PPC Driver_APB_PPCEXP1 = {
705 .GetVersion = ARM_PPC_GetVersion,
706 .Initialize = APB_PPCEXP1_Initialize,
707 .Uninitialize = APB_PPCEXP1_Uninitialize,
708 .ConfigPeriph = APB_PPCEXP1_ConfigPeriph,
709 .IsPeriphSecure = APB_PPCEXP1_IsPeriphSecure,
710 .IsPeriphPrivOnly = APB_PPCEXP1_IsPeriphPrivOnly,
711 .EnableInterrupt = APB_PPCEXP1_EnableInterrupt,
712 .DisableInterrupt = APB_PPCEXP1_DisableInterrupt,
713 .ClearInterrupt = APB_PPCEXP1_ClearInterrupt,
714 .InterruptState = APB_PPCEXP1_InterruptState
715 };
716 #endif /* RTE_APB_PPCEXP1 */
717
718 #if (RTE_APB_PPCEXP2)
719 /* APB PPCEXP2 Driver wrapper functions */
APB_PPCEXP2_Initialize(void)720 static int32_t APB_PPCEXP2_Initialize(void)
721 {
722 ppc_sse200_init(&APB_PPCEXP2_DEV_S, APB_PPC_EXP2);
723
724 return ARM_DRIVER_OK;
725 }
726
APB_PPCEXP2_Uninitialize(void)727 static int32_t APB_PPCEXP2_Uninitialize(void)
728 {
729 /* Nothing to be done */
730 return ARM_DRIVER_OK;
731 }
732
APB_PPCEXP2_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)733 static int32_t APB_PPCEXP2_ConfigPeriph(uint8_t periph,
734 ARM_PPC_SecAttr sec_attr,
735 ARM_PPC_PrivAttr priv_attr)
736 {
737 ppc_sse200_config_peripheral(&APB_PPCEXP2_DEV_S, periph,
738 (enum ppc_sse200_sec_attr_t)sec_attr,
739 (enum ppc_sse200_priv_attr_t)priv_attr);
740
741 return ARM_DRIVER_OK;
742 }
743
APB_PPCEXP2_IsPeriphSecure(uint8_t periph)744 static uint32_t APB_PPCEXP2_IsPeriphSecure(uint8_t periph)
745 {
746 return ppc_sse200_is_periph_secure(&APB_PPCEXP2_DEV_S, periph);
747 }
748
APB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)749 static uint32_t APB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph)
750 {
751 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP2_DEV_S, periph);
752 }
753
APB_PPCEXP2_EnableInterrupt(void)754 static int32_t APB_PPCEXP2_EnableInterrupt(void)
755 {
756 enum ppc_sse200_error_t ret;
757
758 ret = ppc_sse200_irq_enable(&APB_PPCEXP2_DEV_S);
759
760 if( ret != PPC_SSE200_ERR_NONE) {
761 return ARM_DRIVER_ERROR;
762 }
763
764 return ARM_DRIVER_OK;
765 }
766
APB_PPCEXP2_DisableInterrupt(void)767 static void APB_PPCEXP2_DisableInterrupt(void)
768 {
769 ppc_sse200_irq_disable(&APB_PPCEXP2_DEV_S);
770 }
771
APB_PPCEXP2_ClearInterrupt(void)772 static void APB_PPCEXP2_ClearInterrupt(void)
773 {
774 ppc_sse200_clear_irq(&APB_PPCEXP2_DEV_S);
775 }
776
APB_PPCEXP2_InterruptState(void)777 static uint32_t APB_PPCEXP2_InterruptState(void)
778 {
779 return ppc_sse200_irq_state(&APB_PPCEXP2_DEV_S);
780 }
781
782 /* APB PPCEXP2 Driver CMSIS access structure */
783 extern ARM_DRIVER_PPC Driver_APB_PPCEXP2;
784 ARM_DRIVER_PPC Driver_APB_PPCEXP2 = {
785 .GetVersion = ARM_PPC_GetVersion,
786 .Initialize = APB_PPCEXP2_Initialize,
787 .Uninitialize = APB_PPCEXP2_Uninitialize,
788 .ConfigPeriph = APB_PPCEXP2_ConfigPeriph,
789 .IsPeriphSecure = APB_PPCEXP2_IsPeriphSecure,
790 .IsPeriphPrivOnly = APB_PPCEXP2_IsPeriphPrivOnly,
791 .EnableInterrupt = APB_PPCEXP2_EnableInterrupt,
792 .DisableInterrupt = APB_PPCEXP2_DisableInterrupt,
793 .ClearInterrupt = APB_PPCEXP2_ClearInterrupt,
794 .InterruptState = APB_PPCEXP2_InterruptState
795 };
796 #endif /* RTE_APB_PPCEXP2 */
797
798 #if (RTE_APB_PPCEXP3)
799 /* APB PPCEXP3 Driver wrapper functions */
APB_PPCEXP3_Initialize(void)800 static int32_t APB_PPCEXP3_Initialize(void)
801 {
802 ppc_sse200_init(&APB_PPCEXP3_DEV_S, APB_PPC_EXP3);
803
804 return ARM_DRIVER_OK;
805 }
806
APB_PPCEXP3_Uninitialize(void)807 static int32_t APB_PPCEXP3_Uninitialize(void)
808 {
809 /* Nothing to be done */
810 return ARM_DRIVER_OK;
811 }
812
APB_PPCEXP3_ConfigPeriph(uint8_t periph,ARM_PPC_SecAttr sec_attr,ARM_PPC_PrivAttr priv_attr)813 static int32_t APB_PPCEXP3_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr,
814 ARM_PPC_PrivAttr priv_attr)
815 {
816 enum ppc_sse200_error_t ret;
817
818 ret = ppc_sse200_config_peripheral(&APB_PPCEXP3_DEV_S, periph,
819 (enum ppc_sse200_sec_attr_t)sec_attr,
820 (enum ppc_sse200_priv_attr_t)priv_attr);
821
822 if( ret != PPC_SSE200_ERR_NONE) {
823 return ARM_DRIVER_ERROR;
824 }
825
826 return ARM_DRIVER_OK;
827 }
828
APB_PPCEXP3_IsPeriphSecure(uint8_t periph)829 static uint32_t APB_PPCEXP3_IsPeriphSecure(uint8_t periph)
830 {
831 return ppc_sse200_is_periph_secure(&APB_PPCEXP3_DEV_S, periph);
832 }
833
APB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)834 static uint32_t APB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph)
835 {
836 return ppc_sse200_is_periph_priv_only(&APB_PPCEXP3_DEV_S, periph);
837 }
838
APB_PPCEXP3_EnableInterrupt(void)839 static int32_t APB_PPCEXP3_EnableInterrupt(void)
840 {
841 enum ppc_sse200_error_t ret;
842
843 ret = ppc_sse200_irq_enable(&APB_PPCEXP3_DEV_S);
844
845 if( ret != PPC_SSE200_ERR_NONE) {
846 return ARM_DRIVER_ERROR;
847 }
848
849 return ARM_DRIVER_OK;
850 }
851
APB_PPCEXP3_DisableInterrupt(void)852 static void APB_PPCEXP3_DisableInterrupt(void)
853 {
854 ppc_sse200_irq_disable(&APB_PPCEXP3_DEV_S);
855 }
856
APB_PPCEXP3_ClearInterrupt(void)857 static void APB_PPCEXP3_ClearInterrupt(void)
858 {
859 ppc_sse200_clear_irq(&APB_PPCEXP3_DEV_S);
860 }
861
APB_PPCEXP3_InterruptState(void)862 static uint32_t APB_PPCEXP3_InterruptState(void)
863 {
864 return ppc_sse200_irq_state(&APB_PPCEXP3_DEV_S);
865 }
866
867 /* APB PPCEXP3 Driver CMSIS access structure */
868 extern ARM_DRIVER_PPC Driver_APB_PPCEXP3;
869 ARM_DRIVER_PPC Driver_APB_PPCEXP3 = {
870 .GetVersion = ARM_PPC_GetVersion,
871 .Initialize = APB_PPCEXP3_Initialize,
872 .Uninitialize = APB_PPCEXP3_Uninitialize,
873 .ConfigPeriph = APB_PPCEXP3_ConfigPeriph,
874 .IsPeriphSecure = APB_PPCEXP3_IsPeriphSecure,
875 .IsPeriphPrivOnly = APB_PPCEXP3_IsPeriphPrivOnly,
876 .EnableInterrupt = APB_PPCEXP3_EnableInterrupt,
877 .DisableInterrupt = APB_PPCEXP3_DisableInterrupt,
878 .ClearInterrupt = APB_PPCEXP3_ClearInterrupt,
879 .InterruptState = APB_PPCEXP3_InterruptState
880 };
881 #endif /* RTE_APB_PPCEXP3 */
882