1 /*
2  * Copyright (c) 2019-2024, Arm Limited. All rights reserved.
3  * Copyright (c) 2024 Cypress Semiconductor Corporation (an Infineon company)
4  * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  *
8  */
9 
10 #ifndef __TFM_HAL_MAILBOX_H__
11 #define __TFM_HAL_MAILBOX_H__
12 
13 #include "tfm_mailbox.h"
14 
15 /* A handle to a mailbox message in use */
16 typedef int32_t    mailbox_msg_handle_t;
17 
18 #define MAILBOX_MSG_NULL_HANDLE             ((mailbox_msg_handle_t)0)
19 
20 #ifndef MAILBOX_ENABLE_INTERRUPTS
21 #define MAILBOX_ENABLE_INTERRUPTS() \
22                         (psa_irq_enable(MAILBOX_INTERRUPT_SIGNAL))
23 #define MAILBOX_SIGNAL_IS_ACTIVE(signals) \
24                         ((signals) & MAILBOX_INTERRUPT_SIGNAL)
25 #define MAILBOX_SIGNAL_GET_ACTIVE(signals) \
26                         (MAILBOX_INTERRUPT_SIGNAL)
27 #endif /* MAILBOX_ENABLE_INTERRUPTS */
28 
29 /* A single slot structure in SPE mailbox queue */
30 struct secure_mailbox_slot_t {
31     struct mailbox_msg_t msg;
32 
33     uint8_t              ns_slot_idx;
34     mailbox_msg_handle_t msg_handle;
35 };
36 
37 struct secure_mailbox_queue_t {
38     mailbox_queue_status_t       empty_slots;      /* bitmask of empty slots */
39 
40     struct secure_mailbox_slot_t queue[NUM_MAILBOX_QUEUE_SLOT];
41     /* Shared data with fixed size */
42     struct mailbox_status_t       *ns_status;
43     /* Number of slots allocated by NS. */
44     uint32_t                     ns_slot_count;
45     /* Pointer to struct mailbox_slot_t[slot_count] allocated by NS */
46     struct mailbox_slot_t        *ns_slots;
47 };
48 
49 /**
50  * \brief Platform specific initialization of SPE mailbox.
51  *
52  * \param[in] s_queue           The base address of SPE mailbox queue.
53  *
54  * \retval MAILBOX_SUCCESS      Operation succeeded.
55  * \retval Other return code    Operation failed with an error code.
56  */
57 int32_t tfm_mailbox_hal_init(struct secure_mailbox_queue_t *s_queue);
58 
59 /**
60  * \brief Notify NSPE that a PSA client call return result is replied.
61  *        Implemented by platform specific inter-processor communication driver.
62  *
63  * \retval MAILBOX_SUCCESS      The notification is successfully sent out.
64  * \retval Other return code    Operation failed with an error code.
65  */
66 int32_t tfm_mailbox_hal_notify_peer(void);
67 
68 /**
69  * \brief Enter critical section of NSPE mailbox
70  */
71 void tfm_mailbox_hal_enter_critical(void);
72 
73 /**
74  * \brief Exit critical section of NSPE mailbox
75  */
76 void tfm_mailbox_hal_exit_critical(void);
77 
78 #endif /* __TFM_HAL_MAILBOX_H__ */
79