1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016, NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #include "fsl_common.h"
10 #include "fsl_reset.h"
11 
12 /*******************************************************************************
13  * Definitions
14  ******************************************************************************/
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.reset"
18 #endif
19 
20 /*******************************************************************************
21  * Variables
22  ******************************************************************************/
23 
24 /*******************************************************************************
25  * Prototypes
26  ******************************************************************************/
27 
28 /*******************************************************************************
29  * Code
30  ******************************************************************************/
31 
32 #if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
33 
34 /*!
35  * brief Assert reset to peripheral.
36  *
37  * Asserts reset signal to specified peripheral module.
38  *
39  * param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register
40  *                   and reset bit position in the reset register.
41  */
RESET_SetPeripheralReset(reset_ip_name_t peripheral)42 void RESET_SetPeripheralReset(reset_ip_name_t peripheral)
43 {
44     const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
45     const uint32_t bitPos   = ((uint32_t)peripheral & 0x0000FFFFu);
46     const uint32_t bitMask  = 1UL << bitPos;
47 
48     assert(bitPos < 32u);
49 
50     /* reset register is in SYSCON */
51     /* set bit */
52     SYSCON->PRESETCTRLSET[regIndex] = bitMask;
53     /* wait until it reads 0b1 */
54     while (0u == (SYSCON->PRESETCTRLX[regIndex] & bitMask))
55     {
56     }
57 }
58 
59 /*!
60  * brief Clear reset to peripheral.
61  *
62  * Clears reset signal to specified peripheral module, allows it to operate.
63  *
64  * param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register
65  *                   and reset bit position in the reset register.
66  */
RESET_ClearPeripheralReset(reset_ip_name_t peripheral)67 void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)
68 {
69     const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16;
70     const uint32_t bitPos   = ((uint32_t)peripheral & 0x0000FFFFu);
71     const uint32_t bitMask  = 1UL << bitPos;
72 
73     assert(bitPos < 32u);
74 
75     /* reset register is in SYSCON */
76 
77     /* clear bit */
78     SYSCON->PRESETCTRLCLR[regIndex] = bitMask;
79     /* wait until it reads 0b0 */
80     while (bitMask == (SYSCON->PRESETCTRLX[regIndex] & bitMask))
81     {
82     }
83 }
84 
85 /*!
86  * brief Reset peripheral module.
87  *
88  * Reset peripheral module.
89  *
90  * param peripheral Peripheral to reset. The enum argument contains encoding of reset register
91  *                   and reset bit position in the reset register.
92  */
RESET_PeripheralReset(reset_ip_name_t peripheral)93 void RESET_PeripheralReset(reset_ip_name_t peripheral)
94 {
95     RESET_SetPeripheralReset(peripheral);
96     RESET_ClearPeripheralReset(peripheral);
97 }
98 
99 #endif /* FSL_FEATURE_SOC_SYSCON_COUNT || FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT */
100