1 /* 2 * Copyright (c) 2021-2022, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef __MMIO_DEFS_H__ 9 #define __MMIO_DEFS_H__ 10 11 #ifdef __cplusplus 12 extern "C" { 13 #endif 14 15 #include <stdint.h> 16 #include "tfm_peripherals_def.h" 17 #include "tfm_peripherals_config.h" 18 19 /* Boundary handle binding macros. */ 20 #define HANDLE_ATTR_PRIV_POS 1U 21 #define HANDLE_ATTR_PRIV_MASK (0x1UL << HANDLE_ATTR_PRIV_POS) 22 #define HANDLE_ATTR_NS_POS 0U 23 #define HANDLE_ATTR_NS_MASK (0x1UL << HANDLE_ATTR_NS_POS) 24 25 /* Allowed named MMIO of this platform */ 26 const uintptr_t partition_named_mmio_list[] = { 27 #if TFM_PERIPHERAL_DCNF_SECURE 28 (uintptr_t)TFM_PERIPHERAL_DCNF, 29 #endif 30 #if TFM_PERIPHERAL_FPU_SECURE 31 (uintptr_t)TFM_PERIPHERAL_FPU, 32 #endif 33 #if TFM_PERIPHERAL_OSCILLATORS_SECURE 34 (uintptr_t)TFM_PERIPHERAL_OSCILLATORS, 35 #endif 36 #if TFM_PERIPHERAL_REGULATORS_SECURE 37 (uintptr_t)TFM_PERIPHERAL_REGULATORS, 38 #endif 39 #if TFM_PERIPHERAL_CLOCK_SECURE 40 (uintptr_t)TFM_PERIPHERAL_CLOCK, 41 #endif 42 #if TFM_PERIPHERAL_POWER_SECURE 43 (uintptr_t)TFM_PERIPHERAL_POWER, 44 #endif 45 #if TFM_PERIPHERAL_RESET_SECURE 46 (uintptr_t)TFM_PERIPHERAL_RESET, 47 #endif 48 #if TFM_PERIPHERAL_SPIM0_SECURE 49 (uintptr_t)TFM_PERIPHERAL_SPIM0, 50 #endif 51 #if TFM_PERIPHERAL_SPIS0_SECURE 52 (uintptr_t)TFM_PERIPHERAL_SPIS0, 53 #endif 54 #if TFM_PERIPHERAL_TWIM0_SECURE 55 (uintptr_t)TFM_PERIPHERAL_TWIM0, 56 #endif 57 #if TFM_PERIPHERAL_TWIS0_SECURE 58 (uintptr_t)TFM_PERIPHERAL_TWIS0, 59 #endif 60 #if TFM_PERIPHERAL_UARTE0_SECURE 61 (uintptr_t)TFM_PERIPHERAL_UARTE0, 62 #endif 63 #if TFM_PERIPHERAL_SPIM1_SECURE 64 (uintptr_t)TFM_PERIPHERAL_SPIM1, 65 #endif 66 #if TFM_PERIPHERAL_SPIS1_SECURE 67 (uintptr_t)TFM_PERIPHERAL_SPIS1, 68 #endif 69 #if TFM_PERIPHERAL_TWIM1_SECURE 70 (uintptr_t)TFM_PERIPHERAL_TWIM1, 71 #endif 72 #if TFM_PERIPHERAL_TWIS1_SECURE 73 (uintptr_t)TFM_PERIPHERAL_TWIS1, 74 #endif 75 #if TFM_PERIPHERAL_UARTE1_SECURE 76 (uintptr_t)TFM_PERIPHERAL_UARTE1, 77 #endif 78 #if TFM_PERIPHERAL_SPIM4_SECURE 79 (uintptr_t)TFM_PERIPHERAL_SPIM4, 80 #endif 81 #if TFM_PERIPHERAL_SPIM2_SECURE 82 (uintptr_t)TFM_PERIPHERAL_SPIM2, 83 #endif 84 #if TFM_PERIPHERAL_SPIS2_SECURE 85 (uintptr_t)TFM_PERIPHERAL_SPIS2, 86 #endif 87 #if TFM_PERIPHERAL_TWIM2_SECURE 88 (uintptr_t)TFM_PERIPHERAL_TWIM2, 89 #endif 90 #if TFM_PERIPHERAL_TWIS2_SECURE 91 (uintptr_t)TFM_PERIPHERAL_TWIS2, 92 #endif 93 #if TFM_PERIPHERAL_UARTE2_SECURE 94 (uintptr_t)TFM_PERIPHERAL_UARTE2, 95 #endif 96 #if TFM_PERIPHERAL_SPIM3_SECURE 97 (uintptr_t)TFM_PERIPHERAL_SPIM3, 98 #endif 99 #if TFM_PERIPHERAL_SPIS3_SECURE 100 (uintptr_t)TFM_PERIPHERAL_SPIS3, 101 #endif 102 #if TFM_PERIPHERAL_TWIM3_SECURE 103 (uintptr_t)TFM_PERIPHERAL_TWIM3, 104 #endif 105 #if TFM_PERIPHERAL_TWIS3_SECURE 106 (uintptr_t)TFM_PERIPHERAL_TWIS3, 107 #endif 108 #if TFM_PERIPHERAL_UARTE3_SECURE 109 (uintptr_t)TFM_PERIPHERAL_UARTE3, 110 #endif 111 #if TFM_PERIPHERAL_SAADC_SECURE 112 (uintptr_t)TFM_PERIPHERAL_SAADC, 113 #endif 114 #if TFM_PERIPHERAL_TIMER0_SECURE 115 (uintptr_t)TFM_PERIPHERAL_TIMER0, 116 #endif 117 #if TFM_PERIPHERAL_TIMER1_SECURE 118 (uintptr_t)TFM_PERIPHERAL_TIMER1, 119 #endif 120 #if TFM_PERIPHERAL_TIMER2_SECURE 121 (uintptr_t)TFM_PERIPHERAL_TIMER2, 122 #endif 123 #if TFM_PERIPHERAL_RTC0_SECURE 124 (uintptr_t)TFM_PERIPHERAL_RTC0, 125 #endif 126 #if TFM_PERIPHERAL_RTC1_SECURE 127 (uintptr_t)TFM_PERIPHERAL_RTC1, 128 #endif 129 #if TFM_PERIPHERAL_DPPI_SECURE 130 (uintptr_t)TFM_PERIPHERAL_DPPI, 131 #endif 132 #if TFM_PERIPHERAL_WDT0_SECURE 133 (uintptr_t)TFM_PERIPHERAL_WDT0, 134 #endif 135 #if TFM_PERIPHERAL_WDT1_SECURE 136 (uintptr_t)TFM_PERIPHERAL_WDT1, 137 #endif 138 #if TFM_PERIPHERAL_COMP_SECURE 139 (uintptr_t)TFM_PERIPHERAL_COMP, 140 #endif 141 #if TFM_PERIPHERAL_LPCOMP_SECURE 142 (uintptr_t)TFM_PERIPHERAL_LPCOMP, 143 #endif 144 #if TFM_PERIPHERAL_EGU0_SECURE 145 (uintptr_t)TFM_PERIPHERAL_EGU0, 146 #endif 147 #if TFM_PERIPHERAL_EGU1_SECURE 148 (uintptr_t)TFM_PERIPHERAL_EGU1, 149 #endif 150 #if TFM_PERIPHERAL_EGU2_SECURE 151 (uintptr_t)TFM_PERIPHERAL_EGU2, 152 #endif 153 #if TFM_PERIPHERAL_EGU3_SECURE 154 (uintptr_t)TFM_PERIPHERAL_EGU3, 155 #endif 156 #if TFM_PERIPHERAL_EGU4_SECURE 157 (uintptr_t)TFM_PERIPHERAL_EGU4, 158 #endif 159 #if TFM_PERIPHERAL_EGU5_SECURE 160 (uintptr_t)TFM_PERIPHERAL_EGU5, 161 #endif 162 #if TFM_PERIPHERAL_PWM0_SECURE 163 (uintptr_t)TFM_PERIPHERAL_PWM0, 164 #endif 165 #if TFM_PERIPHERAL_PWM1_SECURE 166 (uintptr_t)TFM_PERIPHERAL_PWM1, 167 #endif 168 #if TFM_PERIPHERAL_PWM2_SECURE 169 (uintptr_t)TFM_PERIPHERAL_PWM2, 170 #endif 171 #if TFM_PERIPHERAL_PWM3_SECURE 172 (uintptr_t)TFM_PERIPHERAL_PWM3, 173 #endif 174 #if TFM_PERIPHERAL_PDM0_SECURE 175 (uintptr_t)TFM_PERIPHERAL_PDM0, 176 #endif 177 #if TFM_PERIPHERAL_I2S0_SECURE 178 (uintptr_t)TFM_PERIPHERAL_I2S0, 179 #endif 180 #if TFM_PERIPHERAL_IPC_SECURE 181 (uintptr_t)TFM_PERIPHERAL_IPC, 182 #endif 183 #if TFM_PERIPHERAL_QSPI_SECURE 184 (uintptr_t)TFM_PERIPHERAL_QSPI, 185 #endif 186 #if TFM_PERIPHERAL_NFCT_SECURE 187 (uintptr_t)TFM_PERIPHERAL_NFCT, 188 #endif 189 #if TFM_PERIPHERAL_MUTEX_SECURE 190 (uintptr_t)TFM_PERIPHERAL_MUTEX, 191 #endif 192 #if TFM_PERIPHERAL_QDEC0_SECURE 193 (uintptr_t)TFM_PERIPHERAL_QDEC0, 194 #endif 195 #if TFM_PERIPHERAL_QDEC1_SECURE 196 (uintptr_t)TFM_PERIPHERAL_QDEC1, 197 #endif 198 #if TFM_PERIPHERAL_USBD_SECURE 199 (uintptr_t)TFM_PERIPHERAL_USBD, 200 #endif 201 #if TFM_PERIPHERAL_USBREG_SECURE 202 (uintptr_t)TFM_PERIPHERAL_USBREG, 203 #endif 204 #if TFM_PERIPHERAL_NVMC_SECURE 205 (uintptr_t)TFM_PERIPHERAL_NVMC, 206 #endif 207 #if TFM_PERIPHERAL_GPIO0_SECURE 208 (uintptr_t)TFM_PERIPHERAL_GPIO0, 209 #endif 210 #if TFM_PERIPHERAL_P1_SECURE 211 (uintptr_t)TFM_PERIPHERAL_GPIO1, 212 #endif 213 #if TFM_PERIPHERAL_VMC_SECURE 214 (uintptr_t)TFM_PERIPHERAL_VMC, 215 #endif 216 }; 217 218 #ifdef __cplusplus 219 } 220 #endif 221 222 #endif /* __MMIO_DEFS_H__ */ 223
