1 /* 2 * Copyright (c) 2017-2019 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __MUSCA_B1_CMSIS_H__ 18 #define __MUSCA_B1_CMSIS_H__ 19 20 /* Processor and Core Peripherals and Configurations */ 21 22 /* ========================================================================== */ 23 /* ============= Processor and Core Peripheral Section ============= */ 24 /* ========================================================================== */ 25 26 /* ----- Start of section using anonymous unions and disabling warnings ----- */ 27 #if defined (__CC_ARM) 28 #pragma push 29 #pragma anon_unions 30 #elif defined (__ICCARM__) 31 #pragma language=extended 32 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 33 #pragma clang diagnostic push 34 #pragma clang diagnostic ignored "-Wc11-extensions" 35 #pragma clang diagnostic ignored "-Wreserved-id-macro" 36 #elif defined (__GNUC__) 37 /* anonymous unions are enabled by default */ 38 #elif defined (__TMS470__) 39 /* anonymous unions are enabled by default */ 40 #elif defined (__TASKING__) 41 #pragma warning 586 42 #elif defined (__CSMC__) 43 /* anonymous unions are enabled by default */ 44 #else 45 #warning Not supported compiler type 46 #endif 47 48 /* ----- Configuration of the Cortex-M33 Processor and Core Peripherals ----- */ 49 /* ----- This configuration can be applied to either of the cores ----------- */ 50 #define __CM33_REV 0x0002U /* Core revision r0p2 */ 51 #define __SAUREGION_PRESENT 1U /* SAU regions present */ 52 #define __MPU_PRESENT 1U /* MPU present */ 53 #define __VTOR_PRESENT 1U /* VTOR present */ 54 #define __NVIC_PRIO_BITS 4U /* Number of Bits used for the 55 * Priority Levels */ 56 #define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick 57 * Config is used */ 58 #define __FPU_PRESENT 1U /* FPU present */ 59 #define __DSP_PRESENT 1U /* DSP extension present */ 60 61 #include "system_core_init.h" 62 #include "platform_irq.h" 63 #include <core_cm33.h> /*!< Arm Cortex-M33 processor and core peripherals */ 64 65 /* ------ End of section using anonymous unions and disabling warnings ------ */ 66 #if defined (__CC_ARM) 67 #pragma pop 68 #elif defined (__ICCARM__) 69 /* leave anonymous unions enabled */ 70 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 71 #pragma clang diagnostic pop 72 #elif defined (__GNUC__) 73 /* anonymous unions are enabled by default */ 74 #elif defined (__TMS470__) 75 /* anonymous unions are enabled by default */ 76 #elif defined (__TASKING__) 77 #pragma warning restore 78 #elif defined (__CSMC__) 79 /* anonymous unions are enabled by default */ 80 #else 81 #warning Not supported compiler type 82 #endif 83 84 #endif /*__MUSCA_B1_CMSIS_H__ */ 85
