1 /* 2 * Copyright (c) 2019 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing software 11 * distributed under the License is distributed on an "AS IS" BASIS 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __AN524_CMSIS_H__ 18 #define __AN524_CMSIS_H__ 19 20 /* ================== Start of section using anonymous unions ============ */ 21 #if defined (__CC_ARM) 22 #pragma push 23 #pragma anon_unions 24 #elif defined (__ICCARM__) 25 #pragma language = extended 26 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 27 #pragma clang diagnostic push 28 #pragma clang diagnostic ignored "-Wc11-extensions" 29 #pragma clang diagnostic ignored "-Wreserved-id-macro" 30 #elif defined (__GNUC__) 31 /* anonymous unions are enabled by default */ 32 #elif defined (__TMS470__) 33 /* anonymous unions are enabled by default */ 34 #elif defined (__TASKING__) 35 #pragma warning 586 36 #elif defined (__CSMC__) 37 /* anonymous unions are enabled by default */ 38 #else 39 #warning Not supported compiler type 40 #endif 41 42 /*Setting shared by the two cores.*/ 43 #define __CM33_REV 0x02U /* Core revision r0p2 */ 44 #define __SAUREGION_PRESENT 1U /* SAU regions present */ 45 #define __MPU_PRESENT 1U /* MPU present */ 46 #define __VTOR_PRESENT 1U /* VTOR present */ 47 #define __NVIC_PRIO_BITS 4U /* Number of Bits used for 48 * Priority Levels */ 49 #define __Vendor_SysTickConfig 0U /* Set to 1 if different 50 * SysTick Config is used */ 51 52 #ifdef DUAL_CORE 53 /* Both cores are used */ 54 #if defined CORE0 55 #define __FPU_PRESENT 0U /* no FPU present */ 56 #define __DSP_PRESENT 0U /* no DSP extension present */ 57 #elif defined CORE1 58 #define __FPU_PRESENT 1U /* FPU present */ 59 #define __DSP_PRESENT 1U /* DSP extension present */ 60 #else 61 #error "Either CORE0 or CORE1 must be defined for DUAL_CORE builds" 62 #endif /* CORE0/1 */ 63 64 #else /* DUAL_CORE */ 65 /* Single core is used */ 66 #define __FPU_PRESENT 0U /* no FPU present */ 67 #define __DSP_PRESENT 0U /* no DSP extension present */ 68 #endif /* DUAL_CORE */ 69 70 #include "system_core_init.h" 71 #include "platform_irq.h" 72 #include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */ 73 74 /* ================== End of section using anonymous unions ============= */ 75 #if defined (__CC_ARM) 76 #pragma pop 77 #elif defined (__ICCARM__) 78 /* leave anonymous unions enabled */ 79 #elif (__ARMCC_VERSION >= 6010050) 80 #pragma clang diagnostic pop 81 #elif defined (__GNUC__) 82 /* anonymous unions are enabled by default */ 83 #elif defined (__TMS470__) 84 /* anonymous unions are enabled by default */ 85 #elif defined (__TASKING__) 86 #pragma warning restore 87 #elif defined (__CSMC__) 88 /* anonymous unions are enabled by default */ 89 #else 90 #warning Not supported compiler type 91 #endif 92 93 #endif /* __AN524_CMSIS_H__ */ 94
