1 /*
2  * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #include "tfm_hal_device_header.h"
9 #include "target_cfg.h"
10 #include "tfm_hal_platform.h"
11 #include "tfm_plat_defs.h"
12 #include "uart_stdout.h"
13 
14 extern const struct memory_region_limits memory_regions;
15 
tfm_hal_platform_init(void)16 enum tfm_hal_status_t tfm_hal_platform_init(void)
17 {
18     enum tfm_plat_err_t plat_err = TFM_PLAT_ERR_SYSTEM_ERR;
19 
20     plat_err = enable_fault_handlers();
21     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
22         return TFM_HAL_ERROR_GENERIC;
23     }
24 
25     plat_err = system_reset_cfg();
26     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
27         return TFM_HAL_ERROR_GENERIC;
28     }
29 
30     plat_err = init_debug();
31     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
32         return TFM_HAL_ERROR_GENERIC;
33     }
34 
35     __enable_irq();
36     stdio_init();
37 
38     plat_err = nvic_interrupt_target_state_cfg();
39     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
40         return TFM_HAL_ERROR_GENERIC;
41     }
42 
43     plat_err = nvic_interrupt_enable();
44     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
45         return TFM_HAL_ERROR_GENERIC;
46     }
47 
48     return TFM_HAL_SUCCESS;
49 }
50 
tfm_hal_get_ns_VTOR(void)51 uint32_t tfm_hal_get_ns_VTOR(void)
52 {
53     return memory_regions.non_secure_code_start;
54 }
55 
tfm_hal_get_ns_MSP(void)56 uint32_t tfm_hal_get_ns_MSP(void)
57 {
58     return *((uint32_t *)memory_regions.non_secure_code_start);
59 }
60 
tfm_hal_get_ns_entry_point(void)61 uint32_t tfm_hal_get_ns_entry_point(void)
62 {
63     return *((uint32_t *)(memory_regions.non_secure_code_start + 4));
64 }
65