1 /*
2  * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
3  * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon
4  * company) or an affiliate of Cypress Semiconductor Corporation. All rights
5  * reserved.
6  *
7  * SPDX-License-Identifier: BSD-3-Clause
8  *
9  */
10 
11 #include "cmsis.h"
12 #include "device_definition.h"
13 #include "spm.h"
14 #include "tfm_hal_interrupt.h"
15 #include "tfm_peripherals_def.h"
16 #include "interrupt.h"
17 #include "load/interrupt_defs.h"
18 #include "platform_irq.h"
19 #include "rse_comms_hal.h"
20 
21 static struct irq_t mbox_irq_info = {0};
22 
23 /* Platform specific inter-processor communication interrupt handler. */
HSE1_RECEIVER_COMBINED_IRQHandler(void)24 void HSE1_RECEIVER_COMBINED_IRQHandler(void)
25 {
26     (void)tfm_multi_core_hal_receive(&MHU1_HOST_TO_SE_DEV,
27                                      &MHU1_SE_TO_HOST_DEV,
28                                      mbox_irq_info.p_ildi->source);
29 
30     /*
31      * SPM will send a MAILBOX_SIGNAL to the corresponding partition
32      * indicating that a message has arrived and can be processed.
33      */
34     spm_handle_interrupt(mbox_irq_info.p_pt, mbox_irq_info.p_ildi);
35 }
36 
mailbox_irq_init(void * p_pt,const struct irq_load_info_t * p_ildi)37 enum tfm_hal_status_t mailbox_irq_init(void *p_pt,
38                                        const struct irq_load_info_t *p_ildi)
39 {
40     mbox_irq_info.p_pt = p_pt;
41     mbox_irq_info.p_ildi = p_ildi;
42 
43     /* Set MHU interrupt priority to the same as PendSV (the lowest)
44      * TODO: Consider advantages/disadvantages of setting it one higher
45      */
46     NVIC_SetPriority(HSE1_RECEIVER_COMBINED_IRQn, NVIC_GetPriority(PendSV_IRQn));
47 
48     NVIC_DisableIRQ(HSE1_RECEIVER_COMBINED_IRQn);
49 
50     return TFM_HAL_SUCCESS;
51 }
52