1 /* 2 * Copyright (c) 2013-2020 ARM Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Licensed under the Apache License, Version 2.0 (the License); you may 7 * not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 * $Date: 31. March 2020 19 * $Revision: V2.4 20 * 21 * Project: USART (Universal Synchronous Asynchronous Receiver Transmitter) 22 * Driver definitions 23 */ 24 25 /* History: 26 * Version 2.4 27 * Removed volatile from ARM_USART_STATUS and ARM_USART_MODEM_STATUS 28 * Version 2.3 29 * ARM_USART_STATUS and ARM_USART_MODEM_STATUS made volatile 30 * Version 2.2 31 * Corrected ARM_USART_CPOL_Pos and ARM_USART_CPHA_Pos definitions 32 * Version 2.1 33 * Removed optional argument parameter from Signal Event 34 * Version 2.0 35 * New simplified driver: 36 * complexity moved to upper layer (especially data handling) 37 * more unified API for different communication interfaces 38 * renamed driver UART -> USART (Asynchronous & Synchronous) 39 * Added modes: 40 * Synchronous 41 * Single-wire 42 * IrDA 43 * Smart Card 44 * Changed prefix ARM_DRV -> ARM_DRIVER 45 * Version 1.10 46 * Namespace prefix ARM_ added 47 * Version 1.01 48 * Added events: 49 * ARM_UART_EVENT_TX_EMPTY, ARM_UART_EVENT_RX_TIMEOUT 50 * ARM_UART_EVENT_TX_THRESHOLD, ARM_UART_EVENT_RX_THRESHOLD 51 * Added functions: SetTxThreshold, SetRxThreshold 52 * Added "rx_timeout_event" to capabilities 53 * Version 1.00 54 * Initial release 55 */ 56 57 #ifndef DRIVER_USART_H_ 58 #define DRIVER_USART_H_ 59 60 #ifdef __cplusplus 61 extern "C" 62 { 63 #endif 64 65 #include "Driver_Common.h" 66 67 #define ARM_USART_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,4) /* API version */ 68 69 70 #define _ARM_Driver_USART_(n) Driver_USART##n 71 #define ARM_Driver_USART_(n) _ARM_Driver_USART_(n) 72 73 74 /****** USART Control Codes *****/ 75 76 #define ARM_USART_CONTROL_Pos 0 77 #define ARM_USART_CONTROL_Msk (0xFFUL << ARM_USART_CONTROL_Pos) 78 79 /*----- USART Control Codes: Mode -----*/ 80 #define ARM_USART_MODE_ASYNCHRONOUS (0x01UL << ARM_USART_CONTROL_Pos) ///< UART (Asynchronous); arg = Baudrate 81 #define ARM_USART_MODE_SYNCHRONOUS_MASTER (0x02UL << ARM_USART_CONTROL_Pos) ///< Synchronous Master (generates clock signal); arg = Baudrate 82 #define ARM_USART_MODE_SYNCHRONOUS_SLAVE (0x03UL << ARM_USART_CONTROL_Pos) ///< Synchronous Slave (external clock signal) 83 #define ARM_USART_MODE_SINGLE_WIRE (0x04UL << ARM_USART_CONTROL_Pos) ///< UART Single-wire (half-duplex); arg = Baudrate 84 #define ARM_USART_MODE_IRDA (0x05UL << ARM_USART_CONTROL_Pos) ///< UART IrDA; arg = Baudrate 85 #define ARM_USART_MODE_SMART_CARD (0x06UL << ARM_USART_CONTROL_Pos) ///< UART Smart Card; arg = Baudrate 86 87 /*----- USART Control Codes: Mode Parameters: Data Bits -----*/ 88 #define ARM_USART_DATA_BITS_Pos 8 89 #define ARM_USART_DATA_BITS_Msk (7UL << ARM_USART_DATA_BITS_Pos) 90 #define ARM_USART_DATA_BITS_5 (5UL << ARM_USART_DATA_BITS_Pos) ///< 5 Data bits 91 #define ARM_USART_DATA_BITS_6 (6UL << ARM_USART_DATA_BITS_Pos) ///< 6 Data bit 92 #define ARM_USART_DATA_BITS_7 (7UL << ARM_USART_DATA_BITS_Pos) ///< 7 Data bits 93 #define ARM_USART_DATA_BITS_8 (0UL << ARM_USART_DATA_BITS_Pos) ///< 8 Data bits (default) 94 #define ARM_USART_DATA_BITS_9 (1UL << ARM_USART_DATA_BITS_Pos) ///< 9 Data bits 95 96 /*----- USART Control Codes: Mode Parameters: Parity -----*/ 97 #define ARM_USART_PARITY_Pos 12 98 #define ARM_USART_PARITY_Msk (3UL << ARM_USART_PARITY_Pos) 99 #define ARM_USART_PARITY_NONE (0UL << ARM_USART_PARITY_Pos) ///< No Parity (default) 100 #define ARM_USART_PARITY_EVEN (1UL << ARM_USART_PARITY_Pos) ///< Even Parity 101 #define ARM_USART_PARITY_ODD (2UL << ARM_USART_PARITY_Pos) ///< Odd Parity 102 103 /*----- USART Control Codes: Mode Parameters: Stop Bits -----*/ 104 #define ARM_USART_STOP_BITS_Pos 14 105 #define ARM_USART_STOP_BITS_Msk (3UL << ARM_USART_STOP_BITS_Pos) 106 #define ARM_USART_STOP_BITS_1 (0UL << ARM_USART_STOP_BITS_Pos) ///< 1 Stop bit (default) 107 #define ARM_USART_STOP_BITS_2 (1UL << ARM_USART_STOP_BITS_Pos) ///< 2 Stop bits 108 #define ARM_USART_STOP_BITS_1_5 (2UL << ARM_USART_STOP_BITS_Pos) ///< 1.5 Stop bits 109 #define ARM_USART_STOP_BITS_0_5 (3UL << ARM_USART_STOP_BITS_Pos) ///< 0.5 Stop bits 110 111 /*----- USART Control Codes: Mode Parameters: Flow Control -----*/ 112 #define ARM_USART_FLOW_CONTROL_Pos 16 113 #define ARM_USART_FLOW_CONTROL_Msk (3UL << ARM_USART_FLOW_CONTROL_Pos) 114 #define ARM_USART_FLOW_CONTROL_NONE (0UL << ARM_USART_FLOW_CONTROL_Pos) ///< No Flow Control (default) 115 #define ARM_USART_FLOW_CONTROL_RTS (1UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS Flow Control 116 #define ARM_USART_FLOW_CONTROL_CTS (2UL << ARM_USART_FLOW_CONTROL_Pos) ///< CTS Flow Control 117 #define ARM_USART_FLOW_CONTROL_RTS_CTS (3UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS/CTS Flow Control 118 119 /*----- USART Control Codes: Mode Parameters: Clock Polarity (Synchronous mode) -----*/ 120 #define ARM_USART_CPOL_Pos 18 121 #define ARM_USART_CPOL_Msk (1UL << ARM_USART_CPOL_Pos) 122 #define ARM_USART_CPOL0 (0UL << ARM_USART_CPOL_Pos) ///< CPOL = 0 (default) 123 #define ARM_USART_CPOL1 (1UL << ARM_USART_CPOL_Pos) ///< CPOL = 1 124 125 /*----- USART Control Codes: Mode Parameters: Clock Phase (Synchronous mode) -----*/ 126 #define ARM_USART_CPHA_Pos 19 127 #define ARM_USART_CPHA_Msk (1UL << ARM_USART_CPHA_Pos) 128 #define ARM_USART_CPHA0 (0UL << ARM_USART_CPHA_Pos) ///< CPHA = 0 (default) 129 #define ARM_USART_CPHA1 (1UL << ARM_USART_CPHA_Pos) ///< CPHA = 1 130 131 132 /*----- USART Control Codes: Miscellaneous Controls -----*/ 133 #define ARM_USART_SET_DEFAULT_TX_VALUE (0x10UL << ARM_USART_CONTROL_Pos) ///< Set default Transmit value (Synchronous Receive only); arg = value 134 #define ARM_USART_SET_IRDA_PULSE (0x11UL << ARM_USART_CONTROL_Pos) ///< Set IrDA Pulse in ns; arg: 0=3/16 of bit period 135 #define ARM_USART_SET_SMART_CARD_GUARD_TIME (0x12UL << ARM_USART_CONTROL_Pos) ///< Set Smart Card Guard Time; arg = number of bit periods 136 #define ARM_USART_SET_SMART_CARD_CLOCK (0x13UL << ARM_USART_CONTROL_Pos) ///< Set Smart Card Clock in Hz; arg: 0=Clock not generated 137 #define ARM_USART_CONTROL_SMART_CARD_NACK (0x14UL << ARM_USART_CONTROL_Pos) ///< Smart Card NACK generation; arg: 0=disabled, 1=enabled 138 #define ARM_USART_CONTROL_TX (0x15UL << ARM_USART_CONTROL_Pos) ///< Transmitter; arg: 0=disabled, 1=enabled 139 #define ARM_USART_CONTROL_RX (0x16UL << ARM_USART_CONTROL_Pos) ///< Receiver; arg: 0=disabled, 1=enabled 140 #define ARM_USART_CONTROL_BREAK (0x17UL << ARM_USART_CONTROL_Pos) ///< Continuous Break transmission; arg: 0=disabled, 1=enabled 141 #define ARM_USART_ABORT_SEND (0x18UL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Send 142 #define ARM_USART_ABORT_RECEIVE (0x19UL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Receive 143 #define ARM_USART_ABORT_TRANSFER (0x1AUL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Transfer 144 145 146 147 /****** USART specific error codes *****/ 148 #define ARM_USART_ERROR_MODE (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Specified Mode not supported 149 #define ARM_USART_ERROR_BAUDRATE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Specified baudrate not supported 150 #define ARM_USART_ERROR_DATA_BITS (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Specified number of Data bits not supported 151 #define ARM_USART_ERROR_PARITY (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Specified Parity not supported 152 #define ARM_USART_ERROR_STOP_BITS (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Specified number of Stop bits not supported 153 #define ARM_USART_ERROR_FLOW_CONTROL (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< Specified Flow Control not supported 154 #define ARM_USART_ERROR_CPOL (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Specified Clock Polarity not supported 155 #define ARM_USART_ERROR_CPHA (ARM_DRIVER_ERROR_SPECIFIC - 8) ///< Specified Clock Phase not supported 156 157 158 /** 159 \brief USART Status 160 */ 161 typedef struct _ARM_USART_STATUS { 162 uint32_t tx_busy : 1; ///< Transmitter busy flag 163 uint32_t rx_busy : 1; ///< Receiver busy flag 164 uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation) 165 uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation) 166 uint32_t rx_break : 1; ///< Break detected on receive (cleared on start of next receive operation) 167 uint32_t rx_framing_error : 1; ///< Framing error detected on receive (cleared on start of next receive operation) 168 uint32_t rx_parity_error : 1; ///< Parity error detected on receive (cleared on start of next receive operation) 169 uint32_t reserved : 25; 170 } ARM_USART_STATUS; 171 172 /** 173 \brief USART Modem Control 174 */ 175 typedef enum _ARM_USART_MODEM_CONTROL { 176 ARM_USART_RTS_CLEAR, ///< Deactivate RTS 177 ARM_USART_RTS_SET, ///< Activate RTS 178 ARM_USART_DTR_CLEAR, ///< Deactivate DTR 179 ARM_USART_DTR_SET ///< Activate DTR 180 } ARM_USART_MODEM_CONTROL; 181 182 /** 183 \brief USART Modem Status 184 */ 185 typedef struct _ARM_USART_MODEM_STATUS { 186 uint32_t cts : 1; ///< CTS state: 1=Active, 0=Inactive 187 uint32_t dsr : 1; ///< DSR state: 1=Active, 0=Inactive 188 uint32_t dcd : 1; ///< DCD state: 1=Active, 0=Inactive 189 uint32_t ri : 1; ///< RI state: 1=Active, 0=Inactive 190 uint32_t reserved : 28; 191 } ARM_USART_MODEM_STATUS; 192 193 194 /****** USART Event *****/ 195 #define ARM_USART_EVENT_SEND_COMPLETE (1UL << 0) ///< Send completed; however USART may still transmit data 196 #define ARM_USART_EVENT_RECEIVE_COMPLETE (1UL << 1) ///< Receive completed 197 #define ARM_USART_EVENT_TRANSFER_COMPLETE (1UL << 2) ///< Transfer completed 198 #define ARM_USART_EVENT_TX_COMPLETE (1UL << 3) ///< Transmit completed (optional) 199 #define ARM_USART_EVENT_TX_UNDERFLOW (1UL << 4) ///< Transmit data not available (Synchronous Slave) 200 #define ARM_USART_EVENT_RX_OVERFLOW (1UL << 5) ///< Receive data overflow 201 #define ARM_USART_EVENT_RX_TIMEOUT (1UL << 6) ///< Receive character timeout (optional) 202 #define ARM_USART_EVENT_RX_BREAK (1UL << 7) ///< Break detected on receive 203 #define ARM_USART_EVENT_RX_FRAMING_ERROR (1UL << 8) ///< Framing error detected on receive 204 #define ARM_USART_EVENT_RX_PARITY_ERROR (1UL << 9) ///< Parity error detected on receive 205 #define ARM_USART_EVENT_CTS (1UL << 10) ///< CTS state changed (optional) 206 #define ARM_USART_EVENT_DSR (1UL << 11) ///< DSR state changed (optional) 207 #define ARM_USART_EVENT_DCD (1UL << 12) ///< DCD state changed (optional) 208 #define ARM_USART_EVENT_RI (1UL << 13) ///< RI state changed (optional) 209 210 211 // Function documentation 212 /** 213 \fn ARM_DRIVER_VERSION ARM_USART_GetVersion (void) 214 \brief Get driver version. 215 \return \ref ARM_DRIVER_VERSION 216 217 \fn ARM_USART_CAPABILITIES ARM_USART_GetCapabilities (void) 218 \brief Get driver capabilities. 219 \return \ref ARM_USART_CAPABILITIES 220 221 \fn int32_t ARM_USART_Initialize (ARM_USART_SignalEvent_t cb_event) 222 \brief Initialize USART Interface. 223 \param[in] cb_event Pointer to \ref ARM_USART_SignalEvent 224 \return \ref execution_status 225 226 \fn int32_t ARM_USART_Uninitialize (void) 227 \brief De-initialize USART Interface. 228 \return \ref execution_status 229 230 \fn int32_t ARM_USART_PowerControl (ARM_POWER_STATE state) 231 \brief Control USART Interface Power. 232 \param[in] state Power state 233 \return \ref execution_status 234 235 \fn int32_t ARM_USART_Send (const void *data, uint32_t num) 236 \brief Start sending data to USART transmitter. 237 \param[in] data Pointer to buffer with data to send to USART transmitter 238 \param[in] num Number of data items to send 239 \return \ref execution_status 240 241 \fn int32_t ARM_USART_Receive (void *data, uint32_t num) 242 \brief Start receiving data from USART receiver. 243 \param[out] data Pointer to buffer for data to receive from USART receiver 244 \param[in] num Number of data items to receive 245 \return \ref execution_status 246 247 \fn int32_t ARM_USART_Transfer (const void *data_out, 248 void *data_in, 249 uint32_t num) 250 \brief Start sending/receiving data to/from USART transmitter/receiver. 251 \param[in] data_out Pointer to buffer with data to send to USART transmitter 252 \param[out] data_in Pointer to buffer for data to receive from USART receiver 253 \param[in] num Number of data items to transfer 254 \return \ref execution_status 255 256 \fn uint32_t ARM_USART_GetTxCount (void) 257 \brief Get transmitted data count. 258 \return number of data items transmitted 259 260 \fn uint32_t ARM_USART_GetRxCount (void) 261 \brief Get received data count. 262 \return number of data items received 263 264 \fn int32_t ARM_USART_Control (uint32_t control, uint32_t arg) 265 \brief Control USART Interface. 266 \param[in] control Operation 267 \param[in] arg Argument of operation (optional) 268 \return common \ref execution_status and driver specific \ref usart_execution_status 269 270 \fn ARM_USART_STATUS ARM_USART_GetStatus (void) 271 \brief Get USART status. 272 \return USART status \ref ARM_USART_STATUS 273 274 \fn int32_t ARM_USART_SetModemControl (ARM_USART_MODEM_CONTROL control) 275 \brief Set USART Modem Control line state. 276 \param[in] control \ref ARM_USART_MODEM_CONTROL 277 \return \ref execution_status 278 279 \fn ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus (void) 280 \brief Get USART Modem Status lines state. 281 \return modem status \ref ARM_USART_MODEM_STATUS 282 283 \fn void ARM_USART_SignalEvent (uint32_t event) 284 \brief Signal USART Events. 285 \param[in] event \ref USART_events notification mask 286 */ 287 288 typedef void (*ARM_USART_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_USART_SignalEvent : Signal USART Event. 289 290 291 /** 292 \brief USART Device Driver Capabilities. 293 */ 294 typedef struct _ARM_USART_CAPABILITIES { 295 uint32_t asynchronous : 1; ///< supports UART (Asynchronous) mode 296 uint32_t synchronous_master : 1; ///< supports Synchronous Master mode 297 uint32_t synchronous_slave : 1; ///< supports Synchronous Slave mode 298 uint32_t single_wire : 1; ///< supports UART Single-wire mode 299 uint32_t irda : 1; ///< supports UART IrDA mode 300 uint32_t smart_card : 1; ///< supports UART Smart Card mode 301 uint32_t smart_card_clock : 1; ///< Smart Card Clock generator available 302 uint32_t flow_control_rts : 1; ///< RTS Flow Control available 303 uint32_t flow_control_cts : 1; ///< CTS Flow Control available 304 uint32_t event_tx_complete : 1; ///< Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE 305 uint32_t event_rx_timeout : 1; ///< Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT 306 uint32_t rts : 1; ///< RTS Line: 0=not available, 1=available 307 uint32_t cts : 1; ///< CTS Line: 0=not available, 1=available 308 uint32_t dtr : 1; ///< DTR Line: 0=not available, 1=available 309 uint32_t dsr : 1; ///< DSR Line: 0=not available, 1=available 310 uint32_t dcd : 1; ///< DCD Line: 0=not available, 1=available 311 uint32_t ri : 1; ///< RI Line: 0=not available, 1=available 312 uint32_t event_cts : 1; ///< Signal CTS change event: \ref ARM_USART_EVENT_CTS 313 uint32_t event_dsr : 1; ///< Signal DSR change event: \ref ARM_USART_EVENT_DSR 314 uint32_t event_dcd : 1; ///< Signal DCD change event: \ref ARM_USART_EVENT_DCD 315 uint32_t event_ri : 1; ///< Signal RI change event: \ref ARM_USART_EVENT_RI 316 uint32_t reserved : 11; ///< Reserved (must be zero) 317 } ARM_USART_CAPABILITIES; 318 319 320 /** 321 \brief Access structure of the USART Driver. 322 */ 323 typedef struct _ARM_DRIVER_USART { 324 ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USART_GetVersion : Get driver version. 325 ARM_USART_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USART_GetCapabilities : Get driver capabilities. 326 int32_t (*Initialize) (ARM_USART_SignalEvent_t cb_event); ///< Pointer to \ref ARM_USART_Initialize : Initialize USART Interface. 327 int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USART_Uninitialize : De-initialize USART Interface. 328 int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USART_PowerControl : Control USART Interface Power. 329 int32_t (*Send) (const void *data, uint32_t num); ///< Pointer to \ref ARM_USART_Send : Start sending data to USART transmitter. 330 int32_t (*Receive) ( void *data, uint32_t num); ///< Pointer to \ref ARM_USART_Receive : Start receiving data from USART receiver. 331 int32_t (*Transfer) (const void *data_out, 332 void *data_in, 333 uint32_t num); ///< Pointer to \ref ARM_USART_Transfer : Start sending/receiving data to/from USART. 334 uint32_t (*GetTxCount) (void); ///< Pointer to \ref ARM_USART_GetTxCount : Get transmitted data count. 335 uint32_t (*GetRxCount) (void); ///< Pointer to \ref ARM_USART_GetRxCount : Get received data count. 336 int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_USART_Control : Control USART Interface. 337 ARM_USART_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_USART_GetStatus : Get USART status. 338 int32_t (*SetModemControl) (ARM_USART_MODEM_CONTROL control); ///< Pointer to \ref ARM_USART_SetModemControl : Set USART Modem Control line state. 339 ARM_USART_MODEM_STATUS (*GetModemStatus) (void); ///< Pointer to \ref ARM_USART_GetModemStatus : Get USART Modem Status lines state. 340 } const ARM_DRIVER_USART; 341 342 #ifdef __cplusplus 343 } 344 #endif 345 346 #endif /* DRIVER_USART_H_ */ 347
