1# -*- Python -*-
2
3import os
4
5import lit.formats
6import lit.util
7
8DEVICES = {
9    'CM0': {
10        'arch': 'thumbv6m',
11        'triple': 'thumbv6m',
12        'abi': 'eabi',
13        'mcpu': 'cortex-m0',
14        'mfpu': 'none',
15        'mpu': False,
16        'features': ['thumbv6m'],
17        'header': 'core_cm0.h',
18        'defines': {
19            '__CM0_REV': '0x0000U',
20            '__NVIC_PRIO_BITS': '2U',
21            '__Vendor_SysTickConfig': '0U'
22        }
23    },
24    'CM0plus': {
25        'arch': 'thumbv6m',
26        'triple': 'thumbv6m',
27        'abi': 'eabi',
28        'mcpu': 'cortex-m0plus',
29        'mfpu': 'none',
30        'mpu': True,
31        'features': ['thumbv6m'],
32        'header': 'core_cm0plus.h',
33        'defines': {
34            '__CM0PLUS_REV': '0x0000U',
35            '__MPU_PRESENT': '1U',
36            '__VTOR_PRESENT': '1U',
37            '__NVIC_PRIO_BITS': '2U',
38            '__Vendor_SysTickConfig': '0U'
39        }
40    },
41    'CM3': {
42        'arch': 'thumbv7m',
43        'triple': 'thumbv7-m',
44        'abi': 'eabi',
45        'mcpu': 'cortex-m3',
46        'mfpu': 'none',
47        'mpu': True,
48        'features': ['thumbv6m', 'thumbv7m', 'thumb-2', 'sat', 'ldrex', 'clz'],
49        'header': 'core_cm3.h',
50        'defines': {
51            '__CM3_REV': '0x0000U',
52            '__MPU_PRESENT': '1U',
53            '__VTOR_PRESENT': '1U',
54            '__NVIC_PRIO_BITS': '3U',
55            '__Vendor_SysTickConfig': '0U'
56        }
57    },
58    'CM4': {
59        'arch': 'thumbv7em',
60        'triple': 'thumbv7-em',
61        'abi': 'eabi',
62        'mcpu': 'cortex-m4',
63        'mfpu': 'none',
64        'mpu': True,
65        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumb-2', 'sat', 'ldrex', 'clz'],
66        'header': 'core_cm4.h',
67        'defines': {
68            '__CM4_REV': '0x0000U',
69            '__FPU_PRESENT': '0U',
70            '__MPU_PRESENT': '1U',
71            '__VTOR_PRESENT': '1U',
72            '__NVIC_PRIO_BITS': '3U',
73            '__Vendor_SysTickConfig': '0U'
74        }
75    },
76    'CM4FP': {
77        'arch': 'thumbv7em',
78        'triple': 'thumbv7-em',
79        'abi': 'eabihf',
80        'mcpu': 'cortex-m4',
81        'mfpu': 'fpv4-sp-d16',
82        'mpu': True,
83        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumb-2', 'sat', 'ldrex', 'clz'],
84        'header': 'core_cm4.h',
85        'defines': {
86            '__CM4_REV': '0x0000U',
87            '__FPU_PRESENT': '1U',
88            '__MPU_PRESENT': '1U',
89            '__VTOR_PRESENT': '1U',
90            '__NVIC_PRIO_BITS': '3U',
91            '__Vendor_SysTickConfig': '0U'
92        }
93    },
94    'CM7': {
95        'arch': 'thumbv7em',
96        'triple': 'thumbv7-em',
97        'abi': 'eabi',
98        'mcpu': 'cortex-m7',
99        'mfpu': 'none',
100        'mpu': True,
101        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumb-2', 'sat', 'ldrex', 'clz'],
102        'header': 'core_cm7.h',
103        'defines': {
104            '__CM7_REV': '0x0000U',
105            '__FPU_PRESENT': '0U',
106            '__MPU_PRESENT': '1U',
107            '__ICACHE_PRESENT': '1U',
108            '__DCACHE_PRESENT': '1U',
109            '__DTCM_PRESENT': '1U',
110            '__VTOR_PRESENT': '1U',
111            '__NVIC_PRIO_BITS': '3U',
112            '__Vendor_SysTickConfig': '0U'
113        }
114    },
115    'CM7SP': {
116        'arch': 'thumbv7em',
117        'triple': 'thumbv7-em',
118        'abi': 'eabi',
119        'mcpu': 'cortex-m7',
120        'mfpu': 'fpv4-sp-d16',
121        'mpu': True,
122        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumb-2', 'sat', 'ldrex', 'clz'],
123        'header': 'core_cm7.h',
124        'defines': {
125            '__CM7_REV': '0x0000U',
126            '__FPU_PRESENT': '1U',
127            '__MPU_PRESENT': '1U',
128            '__ICACHE_PRESENT': '1U',
129            '__DCACHE_PRESENT': '1U',
130            '__DTCM_PRESENT': '1U',
131            '__VTOR_PRESENT': '1U',
132            '__NVIC_PRIO_BITS': '3U',
133            '__Vendor_SysTickConfig': '0U'
134        }
135    },
136    'CM7DP': {
137        'arch': 'thumbv7em',
138        'triple': 'thumbv7-em',
139        'abi': 'eabihf',
140        'mcpu': 'cortex-m7',
141        'mfpu': 'fpv5-d16',
142        'mpu': True,
143        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumb-2', 'sat', 'ldrex', 'clz'],
144        'header': 'core_cm7.h',
145        'defines': {
146            '__CM7_REV': '0x0000U',
147            '__FPU_PRESENT': '1U',
148            '__MPU_PRESENT': '1U',
149            '__ICACHE_PRESENT': '1U',
150            '__DCACHE_PRESENT': '1U',
151            '__DTCM_PRESENT': '1U',
152            '__VTOR_PRESENT': '1U',
153            '__NVIC_PRIO_BITS': '3U',
154            '__Vendor_SysTickConfig': '0U'
155        }
156    },
157    'CM23': {
158        'arch': 'thumbv8m.base',
159        'triple': 'thumbv8m',
160        'abi': 'eabi',
161        'mcpu': 'cortex-m23',
162        'mfpu': 'none',
163        'mpu': True,
164        'features': ['thumbv6m', 'thumbv7m', 'thumbv8m.base', 'ldrex'],
165        'header': 'core_cm23.h',
166        'defines': {
167            '__CM23_REV': '0x0000U',
168            '__FPU_PRESENT': '0U',
169            '__MPU_PRESENT': '1U',
170            '__SAUREGION_PRESENT': '8U',
171            '__VTOR_PRESENT': '1U',
172            '__NVIC_PRIO_BITS': '3U',
173            '__Vendor_SysTickConfig': '0U'
174        }
175    },
176    'CM23S': {
177        'arch': 'thumbv8m.base',
178        'triple': 'thumbv8m',
179        'abi': 'eabi',
180        'mcpu': 'cortex-m23',
181        'mfpu': 'none',
182        'mpu': True,
183        'features': ['thumbv6m', 'thumbv7m', 'thumbv8m.base', 'ldrex'],
184        'header': 'core_cm23.h',
185        'defines': {
186            '__CM23_REV': '0x0000U',
187            '__FPU_PRESENT': '0U',
188            '__MPU_PRESENT': '1U',
189            '__SAUREGION_PRESENT': '8U',
190            '__VTOR_PRESENT': '1U',
191            '__NVIC_PRIO_BITS': '3U',
192            '__Vendor_SysTickConfig': '0U'
193        }
194    },
195    'CM23NS': {
196        'arch': 'thumbv8m.base',
197        'triple': 'thumbv8m',
198        'abi': 'eabi',
199        'mcpu': 'cortex-m23',
200        'mfpu': 'none',
201        'mpu': True,
202        'features': ['thumbv6m', 'thumbv7m', 'thumbv8m.base', 'ldrex'],
203        'header': 'core_cm23.h',
204        'defines': {
205            '__CM23_REV': '0x0000U',
206            '__FPU_PRESENT': '0U',
207            '__MPU_PRESENT': '1U',
208            '__SAUREGION_PRESENT': '8U',
209            '__VTOR_PRESENT': '1U',
210            '__NVIC_PRIO_BITS': '3U',
211            '__Vendor_SysTickConfig': '0U'
212        }
213    },
214    'CM33': {
215        'arch': 'thumbv8m.main',
216        'triple': 'thumbv8m',
217        'abi': 'eabihf',
218        'mcpu': 'cortex-m33',
219        'mfpu': 'fpv5-d16',
220        'mpu': True,
221        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
222        'header': 'core_cm33.h',
223        'defines': {
224            '__CM33_REV': '0x0000U',
225            '__FPU_PRESENT': '1U',
226            '__MPU_PRESENT': '1U',
227            '__SAUREGION_PRESENT': '8U',
228            '__VTOR_PRESENT': '1U',
229            '__NVIC_PRIO_BITS': '3U',
230            '__Vendor_SysTickConfig': '0U'
231        }
232    },
233    'CM33S': {
234        'arch': 'thumbv8m.main',
235        'triple': 'thumbv8m',
236        'abi': 'eabihf',
237        'mcpu': 'cortex-m33',
238        'mfpu': 'fpv5-d16',
239        'mpu': True,
240        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
241        'header': 'core_cm33.h',
242        'defines': {
243            '__CM33_REV': '0x0000U',
244            '__FPU_PRESENT': '1U',
245            '__MPU_PRESENT': '1U',
246            '__SAUREGION_PRESENT': '8U',
247            '__VTOR_PRESENT': '1U',
248            '__NVIC_PRIO_BITS': '3U',
249            '__Vendor_SysTickConfig': '0U'
250        }
251    },
252    'CM33NS': {
253        'arch': 'thumbv8m.main',
254        'triple': 'thumbv8m',
255        'abi': 'eabihf',
256        'mcpu': 'cortex-m33',
257        'mfpu': 'fpv5-d16',
258        'mpu': True,
259        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
260        'header': 'core_cm33.h',
261        'defines': {
262            '__CM33_REV': '0x0000U',
263            '__FPU_PRESENT': '1U',
264            '__MPU_PRESENT': '1U',
265            '__SAUREGION_PRESENT': '8U',
266            '__VTOR_PRESENT': '1U',
267            '__NVIC_PRIO_BITS': '3U',
268            '__Vendor_SysTickConfig': '0U'
269        }
270    },
271    'CM35P': {
272        'arch': 'thumbv8m.main',
273        'triple': 'thumbv8m',
274        'abi': 'eabihf',
275        'mcpu': 'cortex-m35p',
276        'mfpu': 'fpv5-d16',
277        'mpu': True,
278        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
279        'header': 'core_cm35p.h',
280        'defines': {
281            '__CM35P_REV': '0x0000U',
282            '__FPU_PRESENT': '1U',
283            '__MPU_PRESENT': '1U',
284            '__SAUREGION_PRESENT': '8U',
285            '__VTOR_PRESENT': '1U',
286            '__NVIC_PRIO_BITS': '3U',
287            '__Vendor_SysTickConfig': '0U'
288        }
289    },
290    'CM35PS': {
291        'arch': 'thumbv8m.main',
292        'triple': 'thumbv8m',
293        'abi': 'eabihf',
294        'mcpu': 'cortex-m35p',
295        'mfpu': 'fpv5-d16',
296        'mpu': True,
297        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
298        'header': 'core_cm35p.h',
299        'defines': {
300            '__CM35P_REV': '0x0000U',
301            '__FPU_PRESENT': '1U',
302            '__MPU_PRESENT': '1U',
303            '__SAUREGION_PRESENT': '8U',
304            '__VTOR_PRESENT': '1U',
305            '__NVIC_PRIO_BITS': '3U',
306            '__Vendor_SysTickConfig': '0U'
307        }
308    },
309    'CM35PNS': {
310        'arch': 'thumbv8m.main',
311        'triple': 'thumbv8m',
312        'abi': 'eabihf',
313        'mcpu': 'cortex-m35p',
314        'mfpu': 'fpv5-d16',
315        'mpu': True,
316        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
317        'header': 'core_cm35p.h',
318        'defines': {
319            '__CM35P_REV': '0x0000U',
320            '__FPU_PRESENT': '1U',
321            '__MPU_PRESENT': '1U',
322            '__SAUREGION_PRESENT': '8U',
323            '__VTOR_PRESENT': '1U',
324            '__NVIC_PRIO_BITS': '3U',
325            '__Vendor_SysTickConfig': '0U'
326        }
327    },
328    'CM55': {
329        'arch': 'thumbv8.1m.main',
330        'triple': 'thumbv8m',
331        'abi': 'eabihf',
332        'mcpu': 'cortex-m55',
333        'mfpu': 'fpv5-d16',
334        'mpu': True,
335        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
336        'header': 'core_cm55.h',
337        'defines': {
338            '__CM55_REV': '0x0000U',
339            '__FPU_PRESENT': '1U',
340            '__FPU_DP': '1U',
341            '__MPU_PRESENT': '1U',
342            '__ICACHE_PRESENT': '1U',
343            '__DCACHE_PRESENT': '1U',
344            '__SAUREGION_PRESENT': '8U',
345            '__DSP_PRESENT': '1U',
346            '__VTOR_PRESENT': '1U',
347            '__PMU_PRESENT': '1U',
348            '__PMU_NUM_EVENTCNT': '8U',
349            '__DSP_PRESENT': '1U',
350            '__NVIC_PRIO_BITS': '3U',
351            '__Vendor_SysTickConfig': '0U'
352        }
353    },
354    'CM55S': {
355        'arch': 'thumbv8.1m.main',
356        'triple': 'thumbv8m',
357        'abi': 'eabihf',
358        'mcpu': 'cortex-m55',
359        'mfpu': 'fpv5-d16',
360        'mpu': True,
361        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
362        'header': 'core_cm55.h',
363        'defines': {
364            '__CM55_REV': '0x0000U',
365            '__FPU_PRESENT': '1U',
366            '__FPU_DP': '1U',
367            '__MPU_PRESENT': '1U',
368            '__ICACHE_PRESENT': '1U',
369            '__DCACHE_PRESENT': '1U',
370            '__SAUREGION_PRESENT': '8U',
371            '__DSP_PRESENT': '1U',
372            '__VTOR_PRESENT': '1U',
373            '__PMU_PRESENT': '1U',
374            '__PMU_NUM_EVENTCNT': '8U',
375            '__DSP_PRESENT': '1U',
376            '__NVIC_PRIO_BITS': '3U',
377            '__Vendor_SysTickConfig': '0U'
378        }
379    },
380    'CM55NS': {
381        'arch': 'thumbv8.1m.main',
382        'triple': 'thumbv8m',
383        'abi': 'eabihf',
384        'mcpu': 'cortex-m55',
385        'mfpu': 'fpv5-d16',
386        'mpu': True,
387        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
388        'header': 'core_cm55.h',
389        'defines': {
390            '__CM55_REV': '0x0000U',
391            '__FPU_PRESENT': '1U',
392            '__FPU_DP': '1U',
393            '__MPU_PRESENT': '1U',
394            '__ICACHE_PRESENT': '1U',
395            '__DCACHE_PRESENT': '1U',
396            '__SAUREGION_PRESENT': '8U',
397            '__DSP_PRESENT': '1U',
398            '__VTOR_PRESENT': '1U',
399            '__PMU_PRESENT': '1U',
400            '__PMU_NUM_EVENTCNT': '8U',
401            '__DSP_PRESENT': '1U',
402            '__NVIC_PRIO_BITS': '3U',
403            '__Vendor_SysTickConfig': '0U'
404        }
405    },
406    'CM85': {
407        'arch': 'thumbv8.1m.main',
408        'triple': 'thumbv8m',
409        'abi': 'eabihf',
410        'mcpu': 'cortex-m85',
411        'mfpu': 'fpv5-d16',
412        'mpu': True,
413        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
414        'header': 'core_cm85.h',
415        'defines': {
416            '__CM85_REV': '0x0000U',
417            '__FPU_PRESENT': '1U',
418            '__FPU_DP': '1U',
419            '__MPU_PRESENT': '1U',
420            '__ICACHE_PRESENT': '1U',
421            '__DCACHE_PRESENT': '1U',
422            '__SAUREGION_PRESENT': '8U',
423            '__DSP_PRESENT': '1U',
424            '__VTOR_PRESENT': '1U',
425            '__PMU_PRESENT': '1U',
426            '__PMU_NUM_EVENTCNT': '8U',
427            '__DSP_PRESENT': '1U',
428            '__NVIC_PRIO_BITS': '3U',
429            '__Vendor_SysTickConfig': '0U'
430        }
431    },
432    'CM85S': {
433        'arch': 'thumbv8.1m.main',
434        'triple': 'thumbv8m',
435        'abi': 'eabihf',
436        'mcpu': 'cortex-m85',
437        'mfpu': 'fpv5-d16',
438        'mpu': True,
439        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
440        'header': 'core_cm85.h',
441        'defines': {
442            '__CM85_REV': '0x0000U',
443            '__FPU_PRESENT': '1U',
444            '__FPU_DP': '1U',
445            '__MPU_PRESENT': '1U',
446            '__ICACHE_PRESENT': '1U',
447            '__DCACHE_PRESENT': '1U',
448            '__SAUREGION_PRESENT': '8U',
449            '__DSP_PRESENT': '1U',
450            '__VTOR_PRESENT': '1U',
451            '__PMU_PRESENT': '1U',
452            '__PMU_NUM_EVENTCNT': '8U',
453            '__DSP_PRESENT': '1U',
454            '__NVIC_PRIO_BITS': '3U',
455            '__Vendor_SysTickConfig': '0U'
456        }
457    },
458    'CM85NS': {
459        'arch': 'thumbv8.1m.main',
460        'triple': 'thumbv8m',
461        'abi': 'eabihf',
462        'mcpu': 'cortex-m85',
463        'mfpu': 'fpv5-d16',
464        'mpu': True,
465        'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
466        'header': 'core_cm85.h',
467        'defines': {
468            '__CM85_REV': '0x0000U',
469            '__FPU_PRESENT': '1U',
470            '__FPU_DP': '1U',
471            '__MPU_PRESENT': '1U',
472            '__ICACHE_PRESENT': '1U',
473            '__DCACHE_PRESENT': '1U',
474            '__SAUREGION_PRESENT': '8U',
475            '__DSP_PRESENT': '1U',
476            '__VTOR_PRESENT': '1U',
477            '__PMU_PRESENT': '1U',
478            '__PMU_NUM_EVENTCNT': '8U',
479            '__DSP_PRESENT': '1U',
480            '__NVIC_PRIO_BITS': '3U',
481            '__Vendor_SysTickConfig': '0U'
482        }
483    },
484    'CA5': {
485        'arch': 'armv7a',
486        'triple': 'armv7-a',
487        'abi': 'eabi',
488        'mcpu': 'cortex-a5',
489        'mfpu': 'none',
490        'mpu': True,
491        'features': ['armv7a', 'thumb-2', 'sat', 'clz'],
492        'header': 'core_ca.h',
493        'defines': {
494            '__CORTEX_A': '7',
495            '__CA_REV': '0x0000U',
496            '__FPU_PRESENT': '0U',
497            '__GIC_PRESENT': '1U',
498            '__TIM_PRESENT': '1U',
499            '__L2C_PRESENT': '1U',
500            'GIC_DISTRIBUTOR_BASE': '0x2C001000UL',
501            'GIC_INTERFACE_BASE': '0x2C000100UL',
502            'TIMER_BASE': '0x2C000600UL',
503            'L2C_310_BASE': '0x2C0F0000UL',
504            'IRQn_Type': 'int'
505        }
506    },
507    'CA5neon': {
508        'arch': 'armv7a',
509        'triple': 'armv7-a',
510        'abi': 'eabihf',
511        'mcpu': 'cortex-a5',
512        'mfpu': 'neon-vfpv4',
513        'mpu': True,
514        'features': ['armv7a', 'thumb-2', 'sat', 'dsp', 'clz'],
515        'header': 'core_ca.h',
516        'defines': {
517            '__CORTEX_A': '7',
518            '__CA_REV': '0x0000U',
519            '__FPU_PRESENT': '1U',
520            '__GIC_PRESENT': '1U',
521            '__TIM_PRESENT': '1U',
522            '__L2C_PRESENT': '1U',
523            'GIC_DISTRIBUTOR_BASE': '0x2C001000UL',
524            'GIC_INTERFACE_BASE': '0x2C000100UL',
525            'TIMER_BASE': '0x2C000600UL',
526            'L2C_310_BASE': '0x2C0F0000UL',
527            'IRQn_Type': 'int'
528        }
529    },
530    'CA7': {
531        'arch': 'armv7a',
532        'triple': 'armv7-a',
533        'abi': 'eabi',
534        'mcpu': 'cortex-a7',
535        'mfpu': 'none',
536        'mpu': True,
537        'features': ['armv7a', 'thumb-2', 'sat', 'clz'],
538        'header': 'core_ca.h',
539        'defines': {
540            '__CORTEX_A': '7',
541            '__CA_REV': '0x0000U',
542            '__FPU_PRESENT': '0U',
543            '__GIC_PRESENT': '1U',
544            '__TIM_PRESENT': '1U',
545            '__L2C_PRESENT': '1U',
546            'GIC_DISTRIBUTOR_BASE': '0x2C001000UL',
547            'GIC_INTERFACE_BASE': '0x2C000100UL',
548            'TIMER_BASE': '0x2C000600UL',
549            'L2C_310_BASE': '0x2C0F0000UL',
550            'IRQn_Type': 'int'
551        }
552    },
553    'CA7neon': {
554        'arch': 'armv7a',
555        'triple': 'armv7-a',
556        'abi': 'eabihf',
557        'mcpu': 'cortex-a7',
558        'mfpu': 'neon-vfpv4',
559        'mpu': True,
560        'features': ['armv7a', 'thumb-2', 'sat', 'dsp', 'clz'],
561        'header': 'core_ca.h',
562        'defines': {
563            '__CORTEX_A': '7',
564            '__CA_REV': '0x0000U',
565            '__FPU_PRESENT': '1U',
566            '__GIC_PRESENT': '1U',
567            '__TIM_PRESENT': '1U',
568            '__L2C_PRESENT': '1U',
569            'GIC_DISTRIBUTOR_BASE': '0x2C001000UL',
570            'GIC_INTERFACE_BASE': '0x2C000100UL',
571            'TIMER_BASE': '0x2C000600UL',
572            'L2C_310_BASE': '0x2C0F0000UL',
573            'IRQn_Type': 'int'
574        }
575    },
576    'CA9': {
577        'arch': 'armv7a',
578        'triple': 'armv7-a',
579        'abi': 'eabi',
580        'mcpu': 'cortex-a9',
581        'mfpu': 'none',
582        'mpu': True,
583        'features': ['armv7a', 'thumb-2', 'sat', 'clz'],
584        'header': 'core_ca.h',
585        'defines': {
586            '__CORTEX_A': '7',
587            '__CA_REV': '0x0000U',
588            '__FPU_PRESENT': '0U',
589            '__GIC_PRESENT': '1U',
590            '__TIM_PRESENT': '1U',
591            '__L2C_PRESENT': '1U',
592            'GIC_DISTRIBUTOR_BASE': '0x2C001000UL',
593            'GIC_INTERFACE_BASE': '0x2C000100UL',
594            'TIMER_BASE': '0x2C000600UL',
595            'L2C_310_BASE': '0x2C0F0000UL',
596            'IRQn_Type': 'int'
597        }
598    },
599    'CA9neon': {
600        'arch': 'armv7a',
601        'triple': 'armv7-a',
602        'abi': 'eabihf',
603        'mcpu': 'cortex-a9',
604        'mfpu': 'neon-vfpv3',
605        'mpu': True,
606        'features': ['armv7a', 'thumb-2', 'sat', 'dsp', 'ldrex', 'clz'],
607        'header': 'core_ca.h',
608        'defines': {
609            '__CORTEX_A': '7',
610            '__CA_REV': '0x0000U',
611            '__FPU_PRESENT': '1U',
612            '__GIC_PRESENT': '1U',
613            '__TIM_PRESENT': '1U',
614            '__L2C_PRESENT': '1U',
615            'GIC_DISTRIBUTOR_BASE': '0x2C001000UL',
616            'GIC_INTERFACE_BASE': '0x2C000100UL',
617            'TIMER_BASE': '0x2C000600UL',
618            'L2C_310_BASE': '0x2C0F0000UL',
619            'IRQn_Type': 'int'
620        }
621    }
622}
623
624# Configuration file for the 'lit' test runner.
625
626# name: The name of this test suite.
627config.name = "CMSIS-Core"
628
629# testFormat: The test format to use to interpret tests.
630#
631# For now we require '&&' between commands, until they get globally killed and
632# the test runner updated.
633config.test_format = lit.formats.ShTest()
634
635# suffixes: A list of file extensions to treat as test files.
636config.suffixes = [
637    ".c"
638]
639
640# test_source_root: The root path where tests are located.
641config.test_source_root = os.path.dirname(__file__)
642
643
644# clang_path = get_toolchain_from_env('CLANG')
645
646toolchain = lit_config.params.get("toolchain", "AC6")
647device = lit_config.params.get("device", "ARMCM3")
648optimize = lit_config.params.get("optimize", "none")
649
650class Toolchain:
651    def __init__(self, toolchain, device, optimize):
652        self._toolchain = toolchain
653        self.device = device
654        self.optimize = optimize
655
656    def get_root_from_env(self):
657        keys = sorted((k for k in os.environ.keys() if k.startswith(f'{self._toolchain}_TOOLCHAIN_')), reverse=True)
658        if not keys:
659            print(f"Toolchain '{self._toolchain}' not registered!")
660            return None
661        return os.environ.get(keys[0])
662
663    def get_root(self):
664        return self.get_root_from_env()
665
666
667class Toolchain_AC6(Toolchain):
668    OPTIMIZE = {
669        'none': '-O1',
670        'balanced': '-O3',
671        'speed': '-Os',
672        'size': '-Oz'
673    }
674
675    def __init__(self, **args):
676        super().__init__('AC6', **args)
677
678    def get_cc(self):
679        return os.path.join(self.get_root(), 'armclang')
680
681    def get_ccflags(self):
682        ccflags = [
683            '--target=arm-arm-none-eabi', f'-mcpu={DEVICES[self.device]["mcpu"]}', f'-mfpu={DEVICES[self.device]["mfpu"]}',
684            self.OPTIMIZE[self.optimize], '-I', os.path.abspath('../Include'), '-c', '-D', f'CORE_HEADER=\\"{DEVICES[device]["header"]}\\"']
685        if device.endswith('S') and not device.endswith('NS'):
686            ccflags += ["-mcmse"]
687        ccflags += list(sum([('-D', f'{define}={value}') for (define, value) in DEVICES[self.device]['defines'].items()], ()))
688        return ccflags
689
690
691class Toolchain_GCC(Toolchain):
692    OPTIMIZE = {
693        'none': '-O1',
694        'balanced': '-O3',
695        'speed': '-Os',
696        'size': '-Oz'
697    }
698
699    def __init__(self, **args):
700        super().__init__('GCC', **args)
701
702    def get_cc(self):
703        return os.path.join(self.get_root(), 'arm-none-eabi-gcc')
704
705    def get_ccflags(self):
706        floatabi='soft'
707        if DEVICES[self.device]["mfpu"] != 'none':
708            floatabi='hard'
709        ccflags = [
710            f'-mcpu={DEVICES[self.device]["mcpu"]}', f'-mfloat-abi={floatabi}',
711            self.OPTIMIZE[self.optimize], '-I', os.path.abspath('../Include'),
712            '-D', f'CORE_HEADER=\\"{DEVICES[device]["header"]}\\"', '-c']
713        if DEVICES[self.device]["mfpu"] != "none":
714            ccflags += [f'-mfpu={DEVICES[self.device]["mfpu"]}']
715        if device.endswith('S') and not device.endswith('NS'):
716            ccflags += ["-mcmse"]
717        ccflags += list(sum([('-D', f'{define}={value}') for (define, value) in DEVICES[self.device]['defines'].items()], ()))
718        return ccflags
719
720class Toolchain_Clang(Toolchain):
721    TARGET = {
722        'CM0': 'thumbv6m-none-unknown-eabi',
723        'CM0plus': 'thumbv6m-none-unknown-eabi',
724        'CM3': 'thumbv7m-none-unknown-eabi',
725        'CM4': 'thumbv7em-none-unknown-eabi',
726        'CM4FP': 'thumbv7em-none-unknown-eabihf',
727        'CM7': 'thumbv7em-none-unknown-eabi',
728        'CM7SP': 'thumbv7em-none-unknown-eabihf',
729        'CM7DP': 'thumbv7em-none-unknown-eabihf',
730        'CM23': 'thumbv8m.base-none-unknown-eabi',
731        'CM23S': 'thumbv8m.base-none-unknown-eabi',
732        'CM23NS': 'thumbv8m.base-none-unknown-eabi',
733        'CM33': 'thumbv8m.main-none-unknown-eabihf',
734        'CM33S': 'thumbv8m.main-none-unknown-eabihf',
735        'CM33NS': 'thumbv8m.main-none-unknown-eabihf',
736        'CM35P': 'thumbv8m.main-none-unknown-eabihf',
737        'CM35PS': 'thumbv8m.main-none-unknown-eabihf',
738        'CM35PNS': 'thumbv8m.main-none-unknown-eabihf',
739        'CM55': 'thumbv8.1m.main-none-unknown-eabihf',
740        'CM55S': 'thumbv8.1m.main-none-unknown-eabihf',
741        'CM55NS': 'thumbv8.1m.main-none-unknown-eabihf',
742        'CM85': 'thumbv8.1m.main-none-unknown-eabihf',
743        'CM85S': 'thumbv8.1m.main-none-unknown-eabihf',
744        'CM85NS': 'thumbv8.1m.main-none-unknown-eabihf',
745        'CA5': 'armv7-none-unknown-eabi',
746        'CA5neon': 'armv7-none-unknown-eabihf',
747        'CA7': 'armv7-none-unknown-eabi',
748        'CA7neon': 'armv7-none-unknown-eabihf',
749        'CA9': 'armv7-none-unknown-eabi',
750        'CA9neon': 'armv7-none-unknown-eabihf'
751    }
752    OPTIMIZE = {
753        'none': '-O1',
754        'balanced': '-O3',
755        'speed': '-Os',
756        'size': '-Oz'
757    }
758    def __init__(self, **args):
759        super().__init__('CLANG', **args)
760
761    def get_cc(self):
762        return os.path.join(self.get_root(), 'clang')
763
764    def get_ccflags(self):
765        ccflags = [
766            f'--target={self.TARGET[self.device]}', self.OPTIMIZE[self.optimize],
767            f'-mcpu={DEVICES[self.device]["mcpu"]}', f'-mfpu={DEVICES[self.device]["mfpu"]}',
768            '-I', os.path.abspath('../Include'), '-c', '-D', f'CORE_HEADER=\\"{DEVICES[device]["header"]}\\"']
769        if device.endswith('S') and not device.endswith('NS'):
770            ccflags += ["-mcmse"]
771        ccflags += list(sum([('-D', f'{define}={value}') for (define, value) in DEVICES[self.device]['defines'].items()], ()))
772
773        return ccflags
774
775tc = None
776if toolchain == 'AC6':
777    tc = Toolchain_AC6(device=device, optimize=optimize)
778elif toolchain == 'GCC':
779    tc = Toolchain_GCC(device=device, optimize=optimize)
780elif toolchain == 'Clang':
781    tc = Toolchain_Clang(device=device, optimize=optimize)
782
783prefixes = ['CHECK']
784if device.endswith('NS'):
785    prefixes += ['CHECK-NS']
786elif device.endswith('S'):
787    prefixes += ['CHECK-S']
788if DEVICES[device]['arch'].startswith('thumb'):
789    prefixes += ['CHECK-THUMB']
790elif DEVICES[device]['arch'].startswith('arm'):
791    prefixes += ['CHECK-ARM']
792
793if DEVICES[device]["mfpu"] != 'none':
794    config.available_features.add('fpu')
795for feature in DEVICES[device]['features']:
796    config.available_features.add(feature)
797
798objdump = os.path.join(Toolchain("CLANG", "none", "none").get_root(), 'llvm-objdump')
799config.substitutions.append(("llvm-objdump", objdump))
800
801config.substitutions.append(("%ccout%", "-o"))
802config.substitutions.append(("%cc%", tc.get_cc()))
803config.substitutions.append(("%ccflags%", ' '.join(tc.get_ccflags())))
804config.substitutions.append(("%prefixes%", ','.join(prefixes)))
805config.substitutions.append(("%triple%", DEVICES[device]['triple']))
806config.substitutions.append(("%mcpu%", DEVICES[device]['mcpu']))
807