1 /*
2 * Copyright (c) 2022-2023, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #include "flash_map/flash_map.h"
9 #include "target.h"
10 #include "Driver_Flash.h"
11 #include "host_base_address.h"
12 #include "bl2_image_id.h"
13
14 #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof((arr)[0]))
15
16 /* Flash device names must be specified by target */
17 extern ARM_DRIVER_FLASH FLASH_DEV_NAME;
18
19 /* Default Drivers list */
20 const ARM_DRIVER_FLASH *flash_driver[] = {
21 &FLASH_DEV_NAME,
22 };
23 const int flash_driver_entry_num = ARRAY_SIZE(flash_driver);
24
25 struct flash_area flash_map[] = {
26 #ifdef RSS_XIP
27 {
28 .fa_id = FLASH_AREA_10_ID,
29 .fa_device_id = FLASH_DEVICE_ID,
30 .fa_driver = &FLASH_DEV_NAME,
31 .fa_off = FLASH_AREA_10_OFFSET,
32 .fa_size = FLASH_AREA_10_SIZE,
33 },
34 {
35 .fa_id = FLASH_AREA_11_ID,
36 .fa_device_id = FLASH_DEVICE_ID,
37 .fa_driver = &FLASH_DEV_NAME,
38 .fa_off = FLASH_AREA_11_OFFSET,
39 .fa_size = FLASH_AREA_11_SIZE,
40 },
41 {
42 .fa_id = FLASH_AREA_12_ID,
43 .fa_device_id = FLASH_DEVICE_ID,
44 .fa_driver = &FLASH_DEV_NAME,
45 .fa_off = FLASH_AREA_12_OFFSET,
46 .fa_size = FLASH_AREA_12_SIZE,
47 },
48 {
49 .fa_id = FLASH_AREA_13_ID,
50 .fa_device_id = FLASH_DEVICE_ID,
51 .fa_driver = &FLASH_DEV_NAME,
52 .fa_off = FLASH_AREA_13_OFFSET,
53 .fa_size = FLASH_AREA_13_SIZE,
54 },
55 #else
56 {
57 .fa_id = FLASH_AREA_2_ID,
58 .fa_device_id = FLASH_DEVICE_ID,
59 .fa_driver = &FLASH_DEV_NAME,
60 .fa_off = FLASH_AREA_2_OFFSET,
61 .fa_size = FLASH_AREA_2_SIZE,
62 },
63 {
64 .fa_id = FLASH_AREA_3_ID,
65 .fa_device_id = FLASH_DEVICE_ID,
66 .fa_driver = &FLASH_DEV_NAME,
67 .fa_off = FLASH_AREA_3_OFFSET,
68 .fa_size = FLASH_AREA_3_SIZE,
69 },
70 {
71 .fa_id = FLASH_AREA_4_ID,
72 .fa_device_id = FLASH_DEVICE_ID,
73 .fa_driver = &FLASH_DEV_NAME,
74 .fa_off = FLASH_AREA_4_OFFSET,
75 .fa_size = FLASH_AREA_4_SIZE,
76 },
77 {
78 .fa_id = FLASH_AREA_5_ID,
79 .fa_device_id = FLASH_DEVICE_ID,
80 .fa_driver = &FLASH_DEV_NAME,
81 .fa_off = FLASH_AREA_5_OFFSET,
82 .fa_size = FLASH_AREA_5_SIZE,
83 },
84 #endif /* RSS_XIP */
85 {
86 .fa_id = FLASH_AREA_6_ID,
87 .fa_device_id = FLASH_DEVICE_ID,
88 .fa_driver = &FLASH_DEV_NAME,
89 .fa_off = FLASH_AREA_6_OFFSET,
90 .fa_size = FLASH_AREA_6_SIZE,
91 },
92 {
93 .fa_id = FLASH_AREA_7_ID,
94 .fa_device_id = FLASH_DEVICE_ID,
95 .fa_driver = &FLASH_DEV_NAME,
96 .fa_off = FLASH_AREA_7_OFFSET,
97 .fa_size = FLASH_AREA_7_SIZE,
98 },
99 {
100 .fa_id = FLASH_AREA_8_ID,
101 .fa_device_id = FLASH_DEVICE_ID,
102 .fa_driver = &FLASH_DEV_NAME,
103 .fa_off = FLASH_AREA_8_OFFSET,
104 .fa_size = FLASH_AREA_8_SIZE,
105 },
106 {
107 .fa_id = FLASH_AREA_9_ID,
108 .fa_device_id = FLASH_DEVICE_ID,
109 .fa_driver = &FLASH_DEV_NAME,
110 .fa_off = FLASH_AREA_9_OFFSET,
111 .fa_size = FLASH_AREA_9_SIZE,
112 },
113 };
114
115 const int flash_map_entry_num = ARRAY_SIZE(flash_map);
116
boot_get_image_exec_ram_info(uint32_t image_id,uint32_t * exec_ram_start,uint32_t * exec_ram_size)117 int boot_get_image_exec_ram_info(uint32_t image_id,
118 uint32_t *exec_ram_start,
119 uint32_t *exec_ram_size)
120 {
121 int rc = -1;
122
123 if (image_id == RSS_BL2_IMAGE_S) {
124 *exec_ram_start = S_IMAGE_LOAD_ADDRESS;
125 *exec_ram_size = SECURE_IMAGE_MAX_SIZE;
126 rc = 0;
127 } else if (image_id == RSS_BL2_IMAGE_NS) {
128 *exec_ram_start = NS_IMAGE_LOAD_ADDRESS;
129 *exec_ram_size = NON_SECURE_IMAGE_MAX_SIZE;
130 rc = 0;
131 } else if (image_id == RSS_BL2_IMAGE_AP) {
132 *exec_ram_start = HOST_BOOT_IMAGE0_LOAD_BASE_S;
133 *exec_ram_size = AP_BOOT_SRAM_SIZE;
134 rc = 0;
135 } else if (image_id == RSS_BL2_IMAGE_SCP) {
136 *exec_ram_start = HOST_BOOT_IMAGE1_LOAD_BASE_S;
137 *exec_ram_size = SCP_BOOT_SRAM_SIZE;
138 rc = 0;
139 }
140
141 return rc;
142 }
143
