1 /*
2  * Copyright (c) 2021-2023, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #include "cmsis.h"
9 #include "target_cfg.h"
10 #include "tfm_hal_platform.h"
11 #include "tfm_plat_defs.h"
12 #include "uart_stdout.h"
13 
14 extern const struct memory_region_limits memory_regions;
15 
tfm_hal_platform_init(void)16 FIH_RET_TYPE(enum tfm_hal_status_t) tfm_hal_platform_init(void)
17 {
18     enum tfm_plat_err_t plat_err = TFM_PLAT_ERR_SYSTEM_ERR;
19     fih_int fih_rc = FIH_FAILURE;
20 
21     plat_err = enable_fault_handlers();
22     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
23         FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
24     }
25 
26     plat_err = system_reset_cfg();
27     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
28         FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
29     }
30 
31     FIH_CALL(init_debug, fih_rc);
32     if (fih_not_eq(fih_rc, fih_int_encode(TFM_PLAT_ERR_SUCCESS))) {
33         FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
34     }
35 
36     __enable_irq();
37     stdio_init();
38 
39     plat_err = nvic_interrupt_target_state_cfg();
40     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
41         FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
42     }
43 
44     plat_err = nvic_interrupt_enable();
45     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
46         FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
47     }
48 
49 #if defined(TEST_S_FPU) || defined(TEST_NS_FPU)
50     /* Set IRQn in secure mode */
51     NVIC_ClearTargetState(TFM_FPU_S_TEST_IRQ);
52 
53     /* Enable FPU secure test interrupt */
54     NVIC_EnableIRQ(TFM_FPU_S_TEST_IRQ);
55 #endif
56 
57 #if defined(TEST_NS_FPU)
58     /* Set IRQn in non-secure mode */
59     NVIC_SetTargetState(TFM_FPU_NS_TEST_IRQ);
60 #if (TFM_ISOLATION_LEVEL >= 2)
61     /* On isolation level 2, FPU test ARoT service runs in unprivileged mode.
62      * Set SCB.CCR.USERSETMPEND as 1 to enable FPU test service to access STIR
63      * register.
64      */
65     SCB->CCR |= SCB_CCR_USERSETMPEND_Msk;
66 #endif
67 #endif
68 
69     FIH_RET(fih_int_encode(TFM_HAL_SUCCESS));
70 }
71 
tfm_hal_get_ns_VTOR(void)72 uint32_t tfm_hal_get_ns_VTOR(void)
73 {
74     return memory_regions.non_secure_code_start;
75 }
76 
tfm_hal_get_ns_MSP(void)77 uint32_t tfm_hal_get_ns_MSP(void)
78 {
79     return *((uint32_t *)memory_regions.non_secure_code_start);
80 }
81 
tfm_hal_get_ns_entry_point(void)82 uint32_t tfm_hal_get_ns_entry_point(void)
83 {
84     return *((uint32_t *)(memory_regions.non_secure_code_start + 4));
85 }
86