1 /**************************************************************************//** 2 * @file gpio.h 3 * @version V3.0 4 * @brief M2354 series General Purpose I/O (GPIO) driver header file 5 * 6 * @copyright SPDX-License-Identifier: Apache-2.0 7 * @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. 8 ******************************************************************************/ 9 #ifndef __GPIO_H__ 10 #define __GPIO_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup GPIO_Driver GPIO Driver 23 @{ 24 */ 25 26 /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants 27 @{ 28 */ 29 30 #define GPIO_PIN_MAX 16UL /*!< Specify Maximum Pins of Each GPIO Port */ 31 32 33 /*---------------------------------------------------------------------------------------------------------*/ 34 /* GPIO_MODE Constant Definitions */ 35 /*---------------------------------------------------------------------------------------------------------*/ 36 #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode */ 37 #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode */ 38 #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode */ 39 #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode */ 40 41 42 /*---------------------------------------------------------------------------------------------------------*/ 43 /* GPIO Interrupt Type Constant Definitions */ 44 /*---------------------------------------------------------------------------------------------------------*/ 45 #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge */ 46 #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge */ 47 #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge */ 48 #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High */ 49 #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level */ 50 51 52 /*---------------------------------------------------------------------------------------------------------*/ 53 /* GPIO_INTTYPE Constant Definitions */ 54 /*---------------------------------------------------------------------------------------------------------*/ 55 #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode */ 56 #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Edge Level Mode */ 57 58 59 /*---------------------------------------------------------------------------------------------------------*/ 60 /* GPIO Slew Rate Type Constant Definitions */ 61 /*---------------------------------------------------------------------------------------------------------*/ 62 #define GPIO_SLEWCTL_NORMAL 0x0UL /*!< GPIO slew setting for normal Mode */ 63 #define GPIO_SLEWCTL_HIGH 0x1UL /*!< GPIO slew setting for high Mode */ 64 #define GPIO_SLEWCTL_FAST 0x2UL /*!< GPIO slew setting for fast Mode */ 65 66 67 /*---------------------------------------------------------------------------------------------------------*/ 68 /* GPIO Pull-up And Pull-down Type Constant Definitions */ 69 /*---------------------------------------------------------------------------------------------------------*/ 70 #define GPIO_PUSEL_DISABLE 0x0UL /*!< GPIO PUSEL setting for Disable Mode */ 71 #define GPIO_PUSEL_PULL_UP 0x1UL /*!< GPIO PUSEL setting for Pull-up Mode */ 72 #define GPIO_PUSEL_PULL_DOWN 0x2UL /*!< GPIO PUSEL setting for Pull-down Mode */ 73 74 75 /*---------------------------------------------------------------------------------------------------------*/ 76 /* GPIO_DBCTL Constant Definitions */ 77 /*---------------------------------------------------------------------------------------------------------*/ 78 #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset */ 79 #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 */ 80 81 #define GPIO_DBCTL_DBCLKSRC_LIRC 0x00000010UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the internal 10 kHz */ 82 #define GPIO_DBCTL_DBCLKSRC_HCLK 0x00000000UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the HCLK */ 83 84 #define GPIO_DBCTL_DBCLKSEL_1 0x00000000UL /*!< GPIO_DBCTL setting for sampling cycle = 1 clocks */ 85 #define GPIO_DBCTL_DBCLKSEL_2 0x00000001UL /*!< GPIO_DBCTL setting for sampling cycle = 2 clocks */ 86 #define GPIO_DBCTL_DBCLKSEL_4 0x00000002UL /*!< GPIO_DBCTL setting for sampling cycle = 4 clocks */ 87 #define GPIO_DBCTL_DBCLKSEL_8 0x00000003UL /*!< GPIO_DBCTL setting for sampling cycle = 8 clocks */ 88 #define GPIO_DBCTL_DBCLKSEL_16 0x00000004UL /*!< GPIO_DBCTL setting for sampling cycle = 16 clocks */ 89 #define GPIO_DBCTL_DBCLKSEL_32 0x00000005UL /*!< GPIO_DBCTL setting for sampling cycle = 32 clocks */ 90 #define GPIO_DBCTL_DBCLKSEL_64 0x00000006UL /*!< GPIO_DBCTL setting for sampling cycle = 64 clocks */ 91 #define GPIO_DBCTL_DBCLKSEL_128 0x00000007UL /*!< GPIO_DBCTL setting for sampling cycle = 128 clocks */ 92 #define GPIO_DBCTL_DBCLKSEL_256 0x00000008UL /*!< GPIO_DBCTL setting for sampling cycle = 256 clocks */ 93 #define GPIO_DBCTL_DBCLKSEL_512 0x00000009UL /*!< GPIO_DBCTL setting for sampling cycle = 512 clocks */ 94 #define GPIO_DBCTL_DBCLKSEL_1024 0x0000000AUL /*!< GPIO_DBCTL setting for sampling cycle = 1024 clocks */ 95 #define GPIO_DBCTL_DBCLKSEL_2048 0x0000000BUL /*!< GPIO_DBCTL setting for sampling cycle = 2048 clocks */ 96 #define GPIO_DBCTL_DBCLKSEL_4096 0x0000000CUL /*!< GPIO_DBCTL setting for sampling cycle = 4096 clocks */ 97 #define GPIO_DBCTL_DBCLKSEL_8192 0x0000000DUL /*!< GPIO_DBCTL setting for sampling cycle = 8192 clocks */ 98 #define GPIO_DBCTL_DBCLKSEL_16384 0x0000000EUL /*!< GPIO_DBCTL setting for sampling cycle = 16384 clocks */ 99 #define GPIO_DBCTL_DBCLKSEL_32768 0x0000000FUL /*!< GPIO_DBCTL setting for sampling cycle = 32768 clocks */ 100 101 102 /** Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping. 103 * Example 1: 104 * 105 * PA0 = 1; 106 * 107 * It is used to set PA.0 to high; 108 * 109 * Example 2: 110 * 111 * if (PA0) 112 * PA0 = 0; 113 * 114 * If PA.0 pin status is high, then set PA.0 data output to low. 115 */ 116 117 118 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT0 ) 119 #define PA0 PA0_NS /*!< Specify PA.0 Pin Data Input/Output */ 120 #else 121 #define PA0 PA0_S /*!< Specify PA.0 Pin Data Input/Output */ 122 #endif 123 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT1 ) 124 #define PA1 PA1_NS /*!< Specify PA.1 Pin Data Input/Output */ 125 #else 126 #define PA1 PA1_S /*!< Specify PA.1 Pin Data Input/Output */ 127 #endif 128 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT2 ) 129 #define PA2 PA2_NS /*!< Specify PA.2 Pin Data Input/Output */ 130 #else 131 #define PA2 PA2_S /*!< Specify PA.2 Pin Data Input/Output */ 132 #endif 133 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT3 ) 134 #define PA3 PA3_NS /*!< Specify PA.3 Pin Data Input/Output */ 135 #else 136 #define PA3 PA3_S /*!< Specify PA.3 Pin Data Input/Output */ 137 #endif 138 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT4 ) 139 #define PA4 PA4_NS /*!< Specify PA.4 Pin Data Input/Output */ 140 #else 141 #define PA4 PA4_S /*!< Specify PA.4 Pin Data Input/Output */ 142 #endif 143 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT5 ) 144 #define PA5 PA5_NS /*!< Specify PA.5 Pin Data Input/Output */ 145 #else 146 #define PA5 PA5_S /*!< Specify PA.5 Pin Data Input/Output */ 147 #endif 148 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT6 ) 149 #define PA6 PA6_NS /*!< Specify PA.6 Pin Data Input/Output */ 150 #else 151 #define PA6 PA6_S /*!< Specify PA.6 Pin Data Input/Output */ 152 #endif 153 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT7 ) 154 #define PA7 PA7_NS /*!< Specify PA.7 Pin Data Input/Output */ 155 #else 156 #define PA7 PA7_S /*!< Specify PA.7 Pin Data Input/Output */ 157 #endif 158 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT8 ) 159 #define PA8 PA8_NS /*!< Specify PA.8 Pin Data Input/Output */ 160 #else 161 #define PA8 PA8_S /*!< Specify PA.8 Pin Data Input/Output */ 162 #endif 163 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT9 ) 164 #define PA9 PA9_NS /*!< Specify PA.9 Pin Data Input/Output */ 165 #else 166 #define PA9 PA9_S /*!< Specify PA.9 Pin Data Input/Output */ 167 #endif 168 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT10 ) 169 #define PA10 PA10_NS /*!< Specify PA.10 Pin Data Input/Output */ 170 #else 171 #define PA10 PA10_S /*!< Specify PA.10 Pin Data Input/Output */ 172 #endif 173 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT11 ) 174 #define PA11 PA11_NS /*!< Specify PA.11 Pin Data Input/Output */ 175 #else 176 #define PA11 PA11_S /*!< Specify PA.11 Pin Data Input/Output */ 177 #endif 178 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT12 ) 179 #define PA12 PA12_NS /*!< Specify PA.12 Pin Data Input/Output */ 180 #else 181 #define PA12 PA12_S /*!< Specify PA.12 Pin Data Input/Output */ 182 #endif 183 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT13 ) 184 #define PA13 PA13_NS /*!< Specify PA.13 Pin Data Input/Output */ 185 #else 186 #define PA13 PA13_S /*!< Specify PA.13 Pin Data Input/Output */ 187 #endif 188 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT14 ) 189 #define PA14 PA14_NS /*!< Specify PA.14 Pin Data Input/Output */ 190 #else 191 #define PA14 PA14_S /*!< Specify PA.14 Pin Data Input/Output */ 192 #endif 193 #if defined (SCU_INIT_IONSSET0_VAL) && (SCU_INIT_IONSSET0_VAL & BIT15 ) 194 #define PA15 PA15_NS /*!< Specify PA.15 Pin Data Input/Output */ 195 #else 196 #define PA15 PA15_S /*!< Specify PA.15 Pin Data Input/Output */ 197 #endif 198 199 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT0 ) 200 #define PB0 PB0_NS /*!< Specify PB.0 Pin Data Input/Output */ 201 #else 202 #define PB0 PB0_S /*!< Specify PB.0 Pin Data Input/Output */ 203 #endif 204 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT1 ) 205 #define PB1 PB1_NS /*!< Specify PB.1 Pin Data Input/Output */ 206 #else 207 #define PB1 PB1_S /*!< Specify PB.1 Pin Data Input/Output */ 208 #endif 209 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT2 ) 210 #define PB2 PB2_NS /*!< Specify PB.2 Pin Data Input/Output */ 211 #else 212 #define PB2 PB2_S /*!< Specify PB.2 Pin Data Input/Output */ 213 #endif 214 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT3 ) 215 #define PB3 PB3_NS /*!< Specify PB.3 Pin Data Input/Output */ 216 #else 217 #define PB3 PB3_S /*!< Specify PB.3 Pin Data Input/Output */ 218 #endif 219 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT4 ) 220 #define PB4 PB4_NS /*!< Specify PB.4 Pin Data Input/Output */ 221 #else 222 #define PB4 PB4_S /*!< Specify PB.4 Pin Data Input/Output */ 223 #endif 224 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT5 ) 225 #define PB5 PB5_NS /*!< Specify PB.5 Pin Data Input/Output */ 226 #else 227 #define PB5 PB5_S /*!< Specify PB.5 Pin Data Input/Output */ 228 #endif 229 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT6 ) 230 #define PB6 PB6_NS /*!< Specify PB.6 Pin Data Input/Output */ 231 #else 232 #define PB6 PB6_S /*!< Specify PB.6 Pin Data Input/Output */ 233 #endif 234 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT7 ) 235 #define PB7 PB7_NS /*!< Specify PB.7 Pin Data Input/Output */ 236 #else 237 #define PB7 PB7_S /*!< Specify PB.7 Pin Data Input/Output */ 238 #endif 239 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT8 ) 240 #define PB8 PB8_NS /*!< Specify PB.8 Pin Data Input/Output */ 241 #else 242 #define PB8 PB8_S /*!< Specify PB.8 Pin Data Input/Output */ 243 #endif 244 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT9 ) 245 #define PB9 PB9_NS /*!< Specify PB.9 Pin Data Input/Output */ 246 #else 247 #define PB9 PB9_S /*!< Specify PB.9 Pin Data Input/Output */ 248 #endif 249 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT10 ) 250 #define PB10 PB10_NS /*!< Specify PB.10 Pin Data Input/Output */ 251 #else 252 #define PB10 PB10_S /*!< Specify PB.10 Pin Data Input/Output */ 253 #endif 254 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT11 ) 255 #define PB11 PB11_NS /*!< Specify PB.11 Pin Data Input/Output */ 256 #else 257 #define PB11 PB11_S /*!< Specify PB.11 Pin Data Input/Output */ 258 #endif 259 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT12 ) 260 #define PB12 PB12_NS /*!< Specify PB.12 Pin Data Input/Output */ 261 #else 262 #define PB12 PB12_S /*!< Specify PB.12 Pin Data Input/Output */ 263 #endif 264 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT13 ) 265 #define PB13 PB13_NS /*!< Specify PB.13 Pin Data Input/Output */ 266 #else 267 #define PB13 PB13_S /*!< Specify PB.13 Pin Data Input/Output */ 268 #endif 269 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT14 ) 270 #define PB14 PB14_NS /*!< Specify PB.14 Pin Data Input/Output */ 271 #else 272 #define PB14 PB14_S /*!< Specify PB.14 Pin Data Input/Output */ 273 #endif 274 #if defined (SCU_INIT_IONSSET1_VAL) && (SCU_INIT_IONSSET1_VAL & BIT15 ) 275 #define PB15 PB15_NS /*!< Specify PB.15 Pin Data Input/Output */ 276 #else 277 #define PB15 PB15_S /*!< Specify PB.15 Pin Data Input/Output */ 278 #endif 279 280 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT0 ) 281 #define PC0 PC0_NS /*!< Specify PC.0 Pin Data Input/Output */ 282 #else 283 #define PC0 PC0_S /*!< Specify PC.0 Pin Data Input/Output */ 284 #endif 285 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT1 ) 286 #define PC1 PC1_NS /*!< Specify PC.1 Pin Data Input/Output */ 287 #else 288 #define PC1 PC1_S /*!< Specify PC.1 Pin Data Input/Output */ 289 #endif 290 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT2 ) 291 #define PC2 PC2_NS /*!< Specify PC.2 Pin Data Input/Output */ 292 #else 293 #define PC2 PC2_S /*!< Specify PC.2 Pin Data Input/Output */ 294 #endif 295 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT3 ) 296 #define PC3 PC3_NS /*!< Specify PC.3 Pin Data Input/Output */ 297 #else 298 #define PC3 PC3_S /*!< Specify PC.3 Pin Data Input/Output */ 299 #endif 300 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT4 ) 301 #define PC4 PC4_NS /*!< Specify PC.4 Pin Data Input/Output */ 302 #else 303 #define PC4 PC4_S /*!< Specify PC.4 Pin Data Input/Output */ 304 #endif 305 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT5 ) 306 #define PC5 PC5_NS /*!< Specify PC.5 Pin Data Input/Output */ 307 #else 308 #define PC5 PC5_S /*!< Specify PC.5 Pin Data Input/Output */ 309 #endif 310 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT6 ) 311 #define PC6 PC6_NS /*!< Specify PC.6 Pin Data Input/Output */ 312 #else 313 #define PC6 PC6_S /*!< Specify PC.6 Pin Data Input/Output */ 314 #endif 315 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT7 ) 316 #define PC7 PC7_NS /*!< Specify PC.7 Pin Data Input/Output */ 317 #else 318 #define PC7 PC7_S /*!< Specify PC.7 Pin Data Input/Output */ 319 #endif 320 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT8 ) 321 #define PC8 PC8_NS /*!< Specify PC.8 Pin Data Input/Output */ 322 #else 323 #define PC8 PC8_S /*!< Specify PC.8 Pin Data Input/Output */ 324 #endif 325 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT9 ) 326 #define PC9 PC9_NS /*!< Specify PC.9 Pin Data Input/Output */ 327 #else 328 #define PC9 PC9_S /*!< Specify PC.9 Pin Data Input/Output */ 329 #endif 330 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT10 ) 331 #define PC10 PC10_NS /*!< Specify PC.10 Pin Data Input/Output */ 332 #else 333 #define PC10 PC10_S /*!< Specify PC.10 Pin Data Input/Output */ 334 #endif 335 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT11 ) 336 #define PC11 PC11_NS /*!< Specify PC.11 Pin Data Input/Output */ 337 #else 338 #define PC11 PC11_S /*!< Specify PC.11 Pin Data Input/Output */ 339 #endif 340 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT12 ) 341 #define PC12 PC12_NS /*!< Specify PC.12 Pin Data Input/Output */ 342 #else 343 #define PC12 PC12_S /*!< Specify PC.12 Pin Data Input/Output */ 344 #endif 345 #if defined (SCU_INIT_IONSSET2_VAL) && (SCU_INIT_IONSSET2_VAL & BIT13 ) 346 #define PC13 PC13_NS /*!< Specify PC.13 Pin Data Input/Output */ 347 #else 348 #define PC13 PC13_S /*!< Specify PC.13 Pin Data Input/Output */ 349 #endif 350 351 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT0 ) 352 #define PD0 PD0_NS /*!< Specify PD.0 Pin Data Input/Output */ 353 #else 354 #define PD0 PD0_S /*!< Specify PD.0 Pin Data Input/Output */ 355 #endif 356 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT1 ) 357 #define PD1 PD1_NS /*!< Specify PD.1 Pin Data Input/Output */ 358 #else 359 #define PD1 PD1_S /*!< Specify PD.1 Pin Data Input/Output */ 360 #endif 361 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT2 ) 362 #define PD2 PD2_NS /*!< Specify PD.2 Pin Data Input/Output */ 363 #else 364 #define PD2 PD2_S /*!< Specify PD.2 Pin Data Input/Output */ 365 #endif 366 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT3 ) 367 #define PD3 PD3_NS /*!< Specify PD.3 Pin Data Input/Output */ 368 #else 369 #define PD3 PD3_S /*!< Specify PD.3 Pin Data Input/Output */ 370 #endif 371 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT4 ) 372 #define PD4 PD4_NS /*!< Specify PD.4 Pin Data Input/Output */ 373 #else 374 #define PD4 PD4_S /*!< Specify PD.4 Pin Data Input/Output */ 375 #endif 376 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT5 ) 377 #define PD5 PD5_NS /*!< Specify PD.5 Pin Data Input/Output */ 378 #else 379 #define PD5 PD5_S /*!< Specify PD.5 Pin Data Input/Output */ 380 #endif 381 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT6 ) 382 #define PD6 PD6_NS /*!< Specify PD.6 Pin Data Input/Output */ 383 #else 384 #define PD6 PD6_S /*!< Specify PD.6 Pin Data Input/Output */ 385 #endif 386 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT7 ) 387 #define PD7 PD7_NS /*!< Specify PD.7 Pin Data Input/Output */ 388 #else 389 #define PD7 PD7_S /*!< Specify PD.7 Pin Data Input/Output */ 390 #endif 391 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT8 ) 392 #define PD8 PD8_NS /*!< Specify PD.8 Pin Data Input/Output */ 393 #else 394 #define PD8 PD8_S /*!< Specify PD.8 Pin Data Input/Output */ 395 #endif 396 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT9 ) 397 #define PD9 PD9_NS /*!< Specify PD.9 Pin Data Input/Output */ 398 #else 399 #define PD9 PD9_S /*!< Specify PD.9 Pin Data Input/Output */ 400 #endif 401 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT10 ) 402 #define PD10 PD10_NS /*!< Specify PD.10 Pin Data Input/Output */ 403 #else 404 #define PD10 PD10_S /*!< Specify PD.10 Pin Data Input/Output */ 405 #endif 406 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT11 ) 407 #define PD11 PD11_NS /*!< Specify PD.11 Pin Data Input/Output */ 408 #else 409 #define PD11 PD11_S /*!< Specify PD.11 Pin Data Input/Output */ 410 #endif 411 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT12 ) 412 #define PD12 PD12_NS /*!< Specify PD.12 Pin Data Input/Output */ 413 #else 414 #define PD12 PD12_S /*!< Specify PD.12 Pin Data Input/Output */ 415 #endif 416 #if defined (SCU_INIT_IONSSET3_VAL) && (SCU_INIT_IONSSET3_VAL & BIT14 ) 417 #define PD14 PD14_NS /*!< Specify PD.14 Pin Data Input/Output */ 418 #else 419 #define PD14 PD14_S /*!< Specify PD.14 Pin Data Input/Output */ 420 #endif 421 422 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT0 ) 423 #define PE0 PE0_NS /*!< Specify PE.0 Pin Data Input/Output */ 424 #else 425 #define PE0 PE0_S /*!< Specify PE.0 Pin Data Input/Output */ 426 #endif 427 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT1 ) 428 #define PE1 PE1_NS /*!< Specify PE.1 Pin Data Input/Output */ 429 #else 430 #define PE1 PE1_S /*!< Specify PE.1 Pin Data Input/Output */ 431 #endif 432 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT2 ) 433 #define PE2 PE2_NS /*!< Specify PE.2 Pin Data Input/Output */ 434 #else 435 #define PE2 PE2_S /*!< Specify PE.2 Pin Data Input/Output */ 436 #endif 437 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT3 ) 438 #define PE3 PE3_NS /*!< Specify PE.3 Pin Data Input/Output */ 439 #else 440 #define PE3 PE3_S /*!< Specify PE.3 Pin Data Input/Output */ 441 #endif 442 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT4 ) 443 #define PE4 PE4_NS /*!< Specify PE.4 Pin Data Input/Output */ 444 #else 445 #define PE4 PE4_S /*!< Specify PE.4 Pin Data Input/Output */ 446 #endif 447 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT5 ) 448 #define PE5 PE5_NS /*!< Specify PE.5 Pin Data Input/Output */ 449 #else 450 #define PE5 PE5_S /*!< Specify PE.5 Pin Data Input/Output */ 451 #endif 452 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT6 ) 453 #define PE6 PE6_NS /*!< Specify PE.6 Pin Data Input/Output */ 454 #else 455 #define PE6 PE6_S /*!< Specify PE.6 Pin Data Input/Output */ 456 #endif 457 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT7 ) 458 #define PE7 PE7_NS /*!< Specify PE.7 Pin Data Input/Output */ 459 #else 460 #define PE7 PE7_S /*!< Specify PE.7 Pin Data Input/Output */ 461 #endif 462 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT8 ) 463 #define PE8 PE8_NS /*!< Specify PE.8 Pin Data Input/Output */ 464 #else 465 #define PE8 PE8_S /*!< Specify PE.8 Pin Data Input/Output */ 466 #endif 467 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT9 ) 468 #define PE9 PE9_NS /*!< Specify PE.9 Pin Data Input/Output */ 469 #else 470 #define PE9 PE9_S /*!< Specify PE.9 Pin Data Input/Output */ 471 #endif 472 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT10 ) 473 #define PE10 PE10_NS /*!< Specify PE.10 Pin Data Input/Output */ 474 #else 475 #define PE10 PE10_S /*!< Specify PE.10 Pin Data Input/Output */ 476 #endif 477 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT11 ) 478 #define PE11 PE11_NS /*!< Specify PE.11 Pin Data Input/Output */ 479 #else 480 #define PE11 PE11_S /*!< Specify PE.11 Pin Data Input/Output */ 481 #endif 482 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT12 ) 483 #define PE12 PE12_NS /*!< Specify PE.12 Pin Data Input/Output */ 484 #else 485 #define PE12 PE12_S /*!< Specify PE.12 Pin Data Input/Output */ 486 #endif 487 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT13 ) 488 #define PE13 PE13_NS /*!< Specify PE.13 Pin Data Input/Output */ 489 #else 490 #define PE13 PE13_S /*!< Specify PE.13 Pin Data Input/Output */ 491 #endif 492 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT14 ) 493 #define PE14 PE14_NS /*!< Specify PE.14 Pin Data Input/Output */ 494 #else 495 #define PE14 PE14_S /*!< Specify PE.14 Pin Data Input/Output */ 496 #endif 497 #if defined (SCU_INIT_IONSSET4_VAL) && (SCU_INIT_IONSSET4_VAL & BIT15 ) 498 #define PE15 PE15_NS /*!< Specify PE.15 Pin Data Input/Output */ 499 #else 500 #define PE15 PE15_S /*!< Specify PE.15 Pin Data Input/Output */ 501 #endif 502 503 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT0 ) 504 #define PF0 PF0_NS /*!< Specify PF.0 Pin Data Input/Output */ 505 #else 506 #define PF0 PF0_S /*!< Specify PF.0 Pin Data Input/Output */ 507 #endif 508 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT1 ) 509 #define PF1 PF1_NS /*!< Specify PF.1 Pin Data Input/Output */ 510 #else 511 #define PF1 PF1_S /*!< Specify PF.1 Pin Data Input/Output */ 512 #endif 513 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT2 ) 514 #define PF2 PF2_NS /*!< Specify PF.2 Pin Data Input/Output */ 515 #else 516 #define PF2 PF2_S /*!< Specify PF.2 Pin Data Input/Output */ 517 #endif 518 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT3 ) 519 #define PF3 PF3_NS /*!< Specify PF.3 Pin Data Input/Output */ 520 #else 521 #define PF3 PF3_S /*!< Specify PF.3 Pin Data Input/Output */ 522 #endif 523 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT4 ) 524 #define PF4 PF4_NS /*!< Specify PF.4 Pin Data Input/Output */ 525 #else 526 #define PF4 PF4_S /*!< Specify PF.4 Pin Data Input/Output */ 527 #endif 528 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT5 ) 529 #define PF5 PF5_NS /*!< Specify PF.5 Pin Data Input/Output */ 530 #else 531 #define PF5 PF5_S /*!< Specify PF.5 Pin Data Input/Output */ 532 #endif 533 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT6 ) 534 #define PF6 PF6_NS /*!< Specify PF.6 Pin Data Input/Output */ 535 #else 536 #define PF6 PF6_S /*!< Specify PF.6 Pin Data Input/Output */ 537 #endif 538 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT7 ) 539 #define PF7 PF7_NS /*!< Specify PF.7 Pin Data Input/Output */ 540 #else 541 #define PF7 PF7_S /*!< Specify PF.7 Pin Data Input/Output */ 542 #endif 543 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT8 ) 544 #define PF8 PF8_NS /*!< Specify PF.8 Pin Data Input/Output */ 545 #else 546 #define PF8 PF8_S /*!< Specify PF.8 Pin Data Input/Output */ 547 #endif 548 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT9 ) 549 #define PF9 PF9_NS /*!< Specify PF.9 Pin Data Input/Output */ 550 #else 551 #define PF9 PF9_S /*!< Specify PF.9 Pin Data Input/Output */ 552 #endif 553 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT10 ) 554 #define PF10 PF10_NS /*!< Specify PF.10 Pin Data Input/Output */ 555 #else 556 #define PF10 PF10_S /*!< Specify PF.10 Pin Data Input/Output */ 557 #endif 558 #if defined (SCU_INIT_IONSSET5_VAL) && (SCU_INIT_IONSSET5_VAL & BIT11 ) 559 #define PF11 PF11_NS /*!< Specify PF.11 Pin Data Input/Output */ 560 #else 561 #define PF11 PF11_S /*!< Specify PF.11 Pin Data Input/Output */ 562 #endif 563 564 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT2 ) 565 #define PG2 PG2_NS /*!< Specify PG.2 Pin Data Input/Output */ 566 #else 567 #define PG2 PG2_S /*!< Specify PG.2 Pin Data Input/Output */ 568 #endif 569 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT3 ) 570 #define PG3 PG3_NS /*!< Specify PG.3 Pin Data Input/Output */ 571 #else 572 #define PG3 PG3_S /*!< Specify PG.3 Pin Data Input/Output */ 573 #endif 574 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT4 ) 575 #define PG4 PG4_NS /*!< Specify PG.4 Pin Data Input/Output */ 576 #else 577 #define PG4 PG4_S /*!< Specify PG.4 Pin Data Input/Output */ 578 #endif 579 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT9 ) 580 #define PG9 PG9_NS /*!< Specify PG.9 Pin Data Input/Output */ 581 #else 582 #define PG9 PG9_S /*!< Specify PG.9 Pin Data Input/Output */ 583 #endif 584 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT10 ) 585 #define PG10 PG10_NS /*!< Specify PG.10 Pin Data Input/Output */ 586 #else 587 #define PG10 PG10_S /*!< Specify PG.10 Pin Data Input/Output */ 588 #endif 589 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT11 ) 590 #define PG11 PG11_NS /*!< Specify PG.11 Pin Data Input/Output */ 591 #else 592 #define PG11 PG11_S /*!< Specify PG.11 Pin Data Input/Output */ 593 #endif 594 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT12 ) 595 #define PG12 PG12_NS /*!< Specify PG.12 Pin Data Input/Output */ 596 #else 597 #define PG12 PG12_S /*!< Specify PG.12 Pin Data Input/Output */ 598 #endif 599 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT13 ) 600 #define PG13 PG13_NS /*!< Specify PG.13 Pin Data Input/Output */ 601 #else 602 #define PG13 PG13_S /*!< Specify PG.13 Pin Data Input/Output */ 603 #endif 604 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT14 ) 605 #define PG14 PG14_NS /*!< Specify PG.14 Pin Data Input/Output */ 606 #else 607 #define PG14 PG14_S /*!< Specify PG.14 Pin Data Input/Output */ 608 #endif 609 #if defined (SCU_INIT_IONSSET6_VAL) && (SCU_INIT_IONSSET6_VAL & BIT15 ) 610 #define PG15 PG15_NS /*!< Specify PG.15 Pin Data Input/Output */ 611 #else 612 #define PG15 PG15_S /*!< Specify PG.15 Pin Data Input/Output */ 613 #endif 614 615 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT4 ) 616 #define PH4 PH4_NS /*!< Specify PH.4 Pin Data Input/Output */ 617 #else 618 #define PH4 PH4_S /*!< Specify PH.4 Pin Data Input/Output */ 619 #endif 620 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT5 ) 621 #define PH5 PH5_NS /*!< Specify PH.5 Pin Data Input/Output */ 622 #else 623 #define PH5 PH5_S /*!< Specify PH.5 Pin Data Input/Output */ 624 #endif 625 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT6 ) 626 #define PH6 PH6_NS /*!< Specify PH.6 Pin Data Input/Output */ 627 #else 628 #define PH6 PH6_S /*!< Specify PH.6 Pin Data Input/Output */ 629 #endif 630 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT7 ) 631 #define PH7 PH7_NS /*!< Specify PH.7 Pin Data Input/Output */ 632 #else 633 #define PH7 PH7_S /*!< Specify PH.7 Pin Data Input/Output */ 634 #endif 635 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT8 ) 636 #define PH8 PH8_NS /*!< Specify PH.8 Pin Data Input/Output */ 637 #else 638 #define PH8 PH8_S /*!< Specify PH.8 Pin Data Input/Output */ 639 #endif 640 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT9 ) 641 #define PH9 PH9_NS /*!< Specify PH.9 Pin Data Input/Output */ 642 #else 643 #define PH9 PH9_S /*!< Specify PH.9 Pin Data Input/Output */ 644 #endif 645 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT10 ) 646 #define PH10 PH10_NS /*!< Specify PH.10 Pin Data Input/Output */ 647 #else 648 #define PH10 PH10_S /*!< Specify PH.10 Pin Data Input/Output */ 649 #endif 650 #if defined (SCU_INIT_IONSSET7_VAL) && (SCU_INIT_IONSSET7_VAL & BIT11 ) 651 #define PH11 PH11_NS /*!< Specify PH.11 Pin Data Input/Output */ 652 #else 653 #define PH11 PH11_S /*!< Specify PH.11 Pin Data Input/Output */ 654 #endif 655 656 657 /* GPIO bit definitions for secure */ 658 #define GPIO_PIN_DATA_S(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2)))) 659 #define PA0_S GPIO_PIN_DATA_S(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output */ 660 #define PA1_S GPIO_PIN_DATA_S(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output */ 661 #define PA2_S GPIO_PIN_DATA_S(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output */ 662 #define PA3_S GPIO_PIN_DATA_S(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output */ 663 #define PA4_S GPIO_PIN_DATA_S(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output */ 664 #define PA5_S GPIO_PIN_DATA_S(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output */ 665 #define PA6_S GPIO_PIN_DATA_S(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output */ 666 #define PA7_S GPIO_PIN_DATA_S(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output */ 667 #define PA8_S GPIO_PIN_DATA_S(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output */ 668 #define PA9_S GPIO_PIN_DATA_S(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output */ 669 #define PA10_S GPIO_PIN_DATA_S(0, 10) /*!< Specify PA.10 Pin Data Input/Output */ 670 #define PA11_S GPIO_PIN_DATA_S(0, 11) /*!< Specify PA.11 Pin Data Input/Output */ 671 #define PA12_S GPIO_PIN_DATA_S(0, 12) /*!< Specify PA.12 Pin Data Input/Output */ 672 #define PA13_S GPIO_PIN_DATA_S(0, 13) /*!< Specify PA.13 Pin Data Input/Output */ 673 #define PA14_S GPIO_PIN_DATA_S(0, 14) /*!< Specify PA.14 Pin Data Input/Output */ 674 #define PA15_S GPIO_PIN_DATA_S(0, 15) /*!< Specify PA.15 Pin Data Input/Output */ 675 #define PB0_S GPIO_PIN_DATA_S(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output */ 676 #define PB1_S GPIO_PIN_DATA_S(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output */ 677 #define PB2_S GPIO_PIN_DATA_S(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output */ 678 #define PB3_S GPIO_PIN_DATA_S(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output */ 679 #define PB4_S GPIO_PIN_DATA_S(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output */ 680 #define PB5_S GPIO_PIN_DATA_S(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output */ 681 #define PB6_S GPIO_PIN_DATA_S(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output */ 682 #define PB7_S GPIO_PIN_DATA_S(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output */ 683 #define PB8_S GPIO_PIN_DATA_S(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output */ 684 #define PB9_S GPIO_PIN_DATA_S(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output */ 685 #define PB10_S GPIO_PIN_DATA_S(1, 10) /*!< Specify PB.10 Pin Data Input/Output */ 686 #define PB11_S GPIO_PIN_DATA_S(1, 11) /*!< Specify PB.11 Pin Data Input/Output */ 687 #define PB12_S GPIO_PIN_DATA_S(1, 12) /*!< Specify PB.12 Pin Data Input/Output */ 688 #define PB13_S GPIO_PIN_DATA_S(1, 13) /*!< Specify PB.13 Pin Data Input/Output */ 689 #define PB14_S GPIO_PIN_DATA_S(1, 14) /*!< Specify PB.14 Pin Data Input/Output */ 690 #define PB15_S GPIO_PIN_DATA_S(1, 15) /*!< Specify PB.15 Pin Data Input/Output */ 691 #define PC0_S GPIO_PIN_DATA_S(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output */ 692 #define PC1_S GPIO_PIN_DATA_S(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output */ 693 #define PC2_S GPIO_PIN_DATA_S(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output */ 694 #define PC3_S GPIO_PIN_DATA_S(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output */ 695 #define PC4_S GPIO_PIN_DATA_S(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output */ 696 #define PC5_S GPIO_PIN_DATA_S(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output */ 697 #define PC6_S GPIO_PIN_DATA_S(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output */ 698 #define PC7_S GPIO_PIN_DATA_S(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output */ 699 #define PC8_S GPIO_PIN_DATA_S(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output */ 700 #define PC9_S GPIO_PIN_DATA_S(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output */ 701 #define PC10_S GPIO_PIN_DATA_S(2, 10) /*!< Specify PC.10 Pin Data Input/Output */ 702 #define PC11_S GPIO_PIN_DATA_S(2, 11) /*!< Specify PC.11 Pin Data Input/Output */ 703 #define PC12_S GPIO_PIN_DATA_S(2, 12) /*!< Specify PC.12 Pin Data Input/Output */ 704 #define PC13_S GPIO_PIN_DATA_S(2, 13) /*!< Specify PC.13 Pin Data Input/Output */ 705 #define PD0_S GPIO_PIN_DATA_S(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output */ 706 #define PD1_S GPIO_PIN_DATA_S(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output */ 707 #define PD2_S GPIO_PIN_DATA_S(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output */ 708 #define PD3_S GPIO_PIN_DATA_S(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output */ 709 #define PD4_S GPIO_PIN_DATA_S(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output */ 710 #define PD5_S GPIO_PIN_DATA_S(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output */ 711 #define PD6_S GPIO_PIN_DATA_S(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output */ 712 #define PD7_S GPIO_PIN_DATA_S(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output */ 713 #define PD8_S GPIO_PIN_DATA_S(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output */ 714 #define PD9_S GPIO_PIN_DATA_S(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output */ 715 #define PD10_S GPIO_PIN_DATA_S(3, 10) /*!< Specify PD.10 Pin Data Input/Output */ 716 #define PD11_S GPIO_PIN_DATA_S(3, 11) /*!< Specify PD.11 Pin Data Input/Output */ 717 #define PD12_S GPIO_PIN_DATA_S(3, 12) /*!< Specify PD.12 Pin Data Input/Output */ 718 #define PD14_S GPIO_PIN_DATA_S(3, 14) /*!< Specify PD.14 Pin Data Input/Output */ 719 #define PE0_S GPIO_PIN_DATA_S(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output */ 720 #define PE1_S GPIO_PIN_DATA_S(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output */ 721 #define PE2_S GPIO_PIN_DATA_S(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output */ 722 #define PE3_S GPIO_PIN_DATA_S(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output */ 723 #define PE4_S GPIO_PIN_DATA_S(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output */ 724 #define PE5_S GPIO_PIN_DATA_S(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output */ 725 #define PE6_S GPIO_PIN_DATA_S(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output */ 726 #define PE7_S GPIO_PIN_DATA_S(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output */ 727 #define PE8_S GPIO_PIN_DATA_S(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output */ 728 #define PE9_S GPIO_PIN_DATA_S(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output */ 729 #define PE10_S GPIO_PIN_DATA_S(4, 10) /*!< Specify PE.10 Pin Data Input/Output */ 730 #define PE11_S GPIO_PIN_DATA_S(4, 11) /*!< Specify PE.11 Pin Data Input/Output */ 731 #define PE12_S GPIO_PIN_DATA_S(4, 12) /*!< Specify PE.12 Pin Data Input/Output */ 732 #define PE13_S GPIO_PIN_DATA_S(4, 13) /*!< Specify PE.13 Pin Data Input/Output */ 733 #define PE14_S GPIO_PIN_DATA_S(4, 14) /*!< Specify PE.14 Pin Data Input/Output */ 734 #define PE15_S GPIO_PIN_DATA_S(4, 15) /*!< Specify PE.15 Pin Data Input/Output */ 735 #define PF0_S GPIO_PIN_DATA_S(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output */ 736 #define PF1_S GPIO_PIN_DATA_S(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output */ 737 #define PF2_S GPIO_PIN_DATA_S(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output */ 738 #define PF3_S GPIO_PIN_DATA_S(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output */ 739 #define PF4_S GPIO_PIN_DATA_S(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output */ 740 #define PF5_S GPIO_PIN_DATA_S(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output */ 741 #define PF6_S GPIO_PIN_DATA_S(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output */ 742 #define PF7_S GPIO_PIN_DATA_S(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output */ 743 #define PF8_S GPIO_PIN_DATA_S(5, 8 ) /*!< Specify PF.8 Pin Data Input/Output */ 744 #define PF9_S GPIO_PIN_DATA_S(5, 9 ) /*!< Specify PF.9 Pin Data Input/Output */ 745 #define PF10_S GPIO_PIN_DATA_S(5, 10) /*!< Specify PF.10 Pin Data Input/Output */ 746 #define PF11_S GPIO_PIN_DATA_S(5, 11) /*!< Specify PF.11 Pin Data Input/Output */ 747 #define PG2_S GPIO_PIN_DATA_S(6, 2 ) /*!< Specify PG.2 Pin Data Input/Output */ 748 #define PG3_S GPIO_PIN_DATA_S(6, 3 ) /*!< Specify PG.3 Pin Data Input/Output */ 749 #define PG4_S GPIO_PIN_DATA_S(6, 4 ) /*!< Specify PG.4 Pin Data Input/Output */ 750 #define PG9_S GPIO_PIN_DATA_S(6, 9 ) /*!< Specify PG.9 Pin Data Input/Output */ 751 #define PG10_S GPIO_PIN_DATA_S(6, 10) /*!< Specify PG.10 Pin Data Input/Output */ 752 #define PG11_S GPIO_PIN_DATA_S(6, 11) /*!< Specify PG.11 Pin Data Input/Output */ 753 #define PG12_S GPIO_PIN_DATA_S(6, 12) /*!< Specify PG.12 Pin Data Input/Output */ 754 #define PG13_S GPIO_PIN_DATA_S(6, 13) /*!< Specify PG.13 Pin Data Input/Output */ 755 #define PG14_S GPIO_PIN_DATA_S(6, 14) /*!< Specify PG.14 Pin Data Input/Output */ 756 #define PG15_S GPIO_PIN_DATA_S(6, 15) /*!< Specify PG.15 Pin Data Input/Output */ 757 #define PH4_S GPIO_PIN_DATA_S(7, 4 ) /*!< Specify PH.4 Pin Data Input/Output */ 758 #define PH5_S GPIO_PIN_DATA_S(7, 5 ) /*!< Specify PH.5 Pin Data Input/Output */ 759 #define PH6_S GPIO_PIN_DATA_S(7, 6 ) /*!< Specify PH.6 Pin Data Input/Output */ 760 #define PH7_S GPIO_PIN_DATA_S(7, 7 ) /*!< Specify PH.7 Pin Data Input/Output */ 761 #define PH8_S GPIO_PIN_DATA_S(7, 8 ) /*!< Specify PH.8 Pin Data Input/Output */ 762 #define PH9_S GPIO_PIN_DATA_S(7, 9 ) /*!< Specify PH.9 Pin Data Input/Output */ 763 #define PH10_S GPIO_PIN_DATA_S(7, 10) /*!< Specify PH.10 Pin Data Input/Output */ 764 #define PH11_S GPIO_PIN_DATA_S(7, 11) /*!< Specify PH.11 Pin Data Input/Output */ 765 766 /* GPIO bit definitions for non-secure */ 767 #define GPIO_PIN_DATA_NS(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+NS_OFFSET+(0x40*(port))) + ((pin)<<2)))) 768 #define PA0_NS GPIO_PIN_DATA_NS(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output */ 769 #define PA1_NS GPIO_PIN_DATA_NS(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output */ 770 #define PA2_NS GPIO_PIN_DATA_NS(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output */ 771 #define PA3_NS GPIO_PIN_DATA_NS(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output */ 772 #define PA4_NS GPIO_PIN_DATA_NS(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output */ 773 #define PA5_NS GPIO_PIN_DATA_NS(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output */ 774 #define PA6_NS GPIO_PIN_DATA_NS(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output */ 775 #define PA7_NS GPIO_PIN_DATA_NS(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output */ 776 #define PA8_NS GPIO_PIN_DATA_NS(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output */ 777 #define PA9_NS GPIO_PIN_DATA_NS(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output */ 778 #define PA10_NS GPIO_PIN_DATA_NS(0, 10) /*!< Specify PA.10 Pin Data Input/Output */ 779 #define PA11_NS GPIO_PIN_DATA_NS(0, 11) /*!< Specify PA.11 Pin Data Input/Output */ 780 #define PA12_NS GPIO_PIN_DATA_NS(0, 12) /*!< Specify PA.12 Pin Data Input/Output */ 781 #define PA13_NS GPIO_PIN_DATA_NS(0, 13) /*!< Specify PA.13 Pin Data Input/Output */ 782 #define PA14_NS GPIO_PIN_DATA_NS(0, 14) /*!< Specify PA.14 Pin Data Input/Output */ 783 #define PA15_NS GPIO_PIN_DATA_NS(0, 15) /*!< Specify PA.15 Pin Data Input/Output */ 784 #define PB0_NS GPIO_PIN_DATA_NS(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output */ 785 #define PB1_NS GPIO_PIN_DATA_NS(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output */ 786 #define PB2_NS GPIO_PIN_DATA_NS(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output */ 787 #define PB3_NS GPIO_PIN_DATA_NS(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output */ 788 #define PB4_NS GPIO_PIN_DATA_NS(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output */ 789 #define PB5_NS GPIO_PIN_DATA_NS(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output */ 790 #define PB6_NS GPIO_PIN_DATA_NS(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output */ 791 #define PB7_NS GPIO_PIN_DATA_NS(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output */ 792 #define PB8_NS GPIO_PIN_DATA_NS(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output */ 793 #define PB9_NS GPIO_PIN_DATA_NS(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output */ 794 #define PB10_NS GPIO_PIN_DATA_NS(1, 10) /*!< Specify PB.10 Pin Data Input/Output */ 795 #define PB11_NS GPIO_PIN_DATA_NS(1, 11) /*!< Specify PB.11 Pin Data Input/Output */ 796 #define PB12_NS GPIO_PIN_DATA_NS(1, 12) /*!< Specify PB.12 Pin Data Input/Output */ 797 #define PB13_NS GPIO_PIN_DATA_NS(1, 13) /*!< Specify PB.13 Pin Data Input/Output */ 798 #define PB14_NS GPIO_PIN_DATA_NS(1, 14) /*!< Specify PB.14 Pin Data Input/Output */ 799 #define PB15_NS GPIO_PIN_DATA_NS(1, 15) /*!< Specify PB.15 Pin Data Input/Output */ 800 #define PC0_NS GPIO_PIN_DATA_NS(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output */ 801 #define PC1_NS GPIO_PIN_DATA_NS(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output */ 802 #define PC2_NS GPIO_PIN_DATA_NS(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output */ 803 #define PC3_NS GPIO_PIN_DATA_NS(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output */ 804 #define PC4_NS GPIO_PIN_DATA_NS(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output */ 805 #define PC5_NS GPIO_PIN_DATA_NS(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output */ 806 #define PC6_NS GPIO_PIN_DATA_NS(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output */ 807 #define PC7_NS GPIO_PIN_DATA_NS(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output */ 808 #define PC8_NS GPIO_PIN_DATA_NS(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output */ 809 #define PC9_NS GPIO_PIN_DATA_NS(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output */ 810 #define PC10_NS GPIO_PIN_DATA_NS(2, 10) /*!< Specify PC.10 Pin Data Input/Output */ 811 #define PC11_NS GPIO_PIN_DATA_NS(2, 11) /*!< Specify PC.11 Pin Data Input/Output */ 812 #define PC12_NS GPIO_PIN_DATA_NS(2, 12) /*!< Specify PC.12 Pin Data Input/Output */ 813 #define PC13_NS GPIO_PIN_DATA_NS(2, 13) /*!< Specify PC.13 Pin Data Input/Output */ 814 #define PD0_NS GPIO_PIN_DATA_NS(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output */ 815 #define PD1_NS GPIO_PIN_DATA_NS(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output */ 816 #define PD2_NS GPIO_PIN_DATA_NS(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output */ 817 #define PD3_NS GPIO_PIN_DATA_NS(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output */ 818 #define PD4_NS GPIO_PIN_DATA_NS(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output */ 819 #define PD5_NS GPIO_PIN_DATA_NS(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output */ 820 #define PD6_NS GPIO_PIN_DATA_NS(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output */ 821 #define PD7_NS GPIO_PIN_DATA_NS(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output */ 822 #define PD8_NS GPIO_PIN_DATA_NS(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output */ 823 #define PD9_NS GPIO_PIN_DATA_NS(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output */ 824 #define PD10_NS GPIO_PIN_DATA_NS(3, 10) /*!< Specify PD.10 Pin Data Input/Output */ 825 #define PD11_NS GPIO_PIN_DATA_NS(3, 11) /*!< Specify PD.11 Pin Data Input/Output */ 826 #define PD12_NS GPIO_PIN_DATA_NS(3, 12) /*!< Specify PD.12 Pin Data Input/Output */ 827 #define PD14_NS GPIO_PIN_DATA_NS(3, 14) /*!< Specify PD.14 Pin Data Input/Output */ 828 #define PE0_NS GPIO_PIN_DATA_NS(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output */ 829 #define PE1_NS GPIO_PIN_DATA_NS(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output */ 830 #define PE2_NS GPIO_PIN_DATA_NS(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output */ 831 #define PE3_NS GPIO_PIN_DATA_NS(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output */ 832 #define PE4_NS GPIO_PIN_DATA_NS(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output */ 833 #define PE5_NS GPIO_PIN_DATA_NS(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output */ 834 #define PE6_NS GPIO_PIN_DATA_NS(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output */ 835 #define PE7_NS GPIO_PIN_DATA_NS(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output */ 836 #define PE8_NS GPIO_PIN_DATA_NS(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output */ 837 #define PE9_NS GPIO_PIN_DATA_NS(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output */ 838 #define PE10_NS GPIO_PIN_DATA_NS(4, 10) /*!< Specify PE.10 Pin Data Input/Output */ 839 #define PE11_NS GPIO_PIN_DATA_NS(4, 11) /*!< Specify PE.11 Pin Data Input/Output */ 840 #define PE12_NS GPIO_PIN_DATA_NS(4, 12) /*!< Specify PE.12 Pin Data Input/Output */ 841 #define PE13_NS GPIO_PIN_DATA_NS(4, 13) /*!< Specify PE.13 Pin Data Input/Output */ 842 #define PE14_NS GPIO_PIN_DATA_NS(4, 14) /*!< Specify PE.14 Pin Data Input/Output */ 843 #define PE15_NS GPIO_PIN_DATA_NS(4, 15) /*!< Specify PE.15 Pin Data Input/Output */ 844 #define PF0_NS GPIO_PIN_DATA_NS(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output */ 845 #define PF1_NS GPIO_PIN_DATA_NS(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output */ 846 #define PF2_NS GPIO_PIN_DATA_NS(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output */ 847 #define PF3_NS GPIO_PIN_DATA_NS(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output */ 848 #define PF4_NS GPIO_PIN_DATA_NS(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output */ 849 #define PF5_NS GPIO_PIN_DATA_NS(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output */ 850 #define PF6_NS GPIO_PIN_DATA_NS(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output */ 851 #define PF7_NS GPIO_PIN_DATA_NS(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output */ 852 #define PF8_NS GPIO_PIN_DATA_NS(5, 8 ) /*!< Specify PF.8 Pin Data Input/Output */ 853 #define PF9_NS GPIO_PIN_DATA_NS(5, 9 ) /*!< Specify PF.9 Pin Data Input/Output */ 854 #define PF10_NS GPIO_PIN_DATA_NS(5, 10) /*!< Specify PF.10 Pin Data Input/Output */ 855 #define PF11_NS GPIO_PIN_DATA_NS(5, 11) /*!< Specify PF.11 Pin Data Input/Output */ 856 #define PG2_NS GPIO_PIN_DATA_NS(6, 2 ) /*!< Specify PG.2 Pin Data Input/Output */ 857 #define PG3_NS GPIO_PIN_DATA_NS(6, 3 ) /*!< Specify PG.3 Pin Data Input/Output */ 858 #define PG4_NS GPIO_PIN_DATA_NS(6, 4 ) /*!< Specify PG.4 Pin Data Input/Output */ 859 #define PG9_NS GPIO_PIN_DATA_NS(6, 9 ) /*!< Specify PG.9 Pin Data Input/Output */ 860 #define PG10_NS GPIO_PIN_DATA_NS(6, 10) /*!< Specify PG.10 Pin Data Input/Output */ 861 #define PG11_NS GPIO_PIN_DATA_NS(6, 11) /*!< Specify PG.11 Pin Data Input/Output */ 862 #define PG12_NS GPIO_PIN_DATA_NS(6, 12) /*!< Specify PG.12 Pin Data Input/Output */ 863 #define PG13_NS GPIO_PIN_DATA_NS(6, 13) /*!< Specify PG.13 Pin Data Input/Output */ 864 #define PG14_NS GPIO_PIN_DATA_NS(6, 14) /*!< Specify PG.14 Pin Data Input/Output */ 865 #define PG15_NS GPIO_PIN_DATA_NS(6, 15) /*!< Specify PG.15 Pin Data Input/Output */ 866 #define PH4_NS GPIO_PIN_DATA_NS(7, 4 ) /*!< Specify PH.4 Pin Data Input/Output */ 867 #define PH5_NS GPIO_PIN_DATA_NS(7, 5 ) /*!< Specify PH.5 Pin Data Input/Output */ 868 #define PH6_NS GPIO_PIN_DATA_NS(7, 6 ) /*!< Specify PH.6 Pin Data Input/Output */ 869 #define PH7_NS GPIO_PIN_DATA_NS(7, 7 ) /*!< Specify PH.7 Pin Data Input/Output */ 870 #define PH8_NS GPIO_PIN_DATA_NS(7, 8 ) /*!< Specify PH.8 Pin Data Input/Output */ 871 #define PH9_NS GPIO_PIN_DATA_NS(7, 9 ) /*!< Specify PH.9 Pin Data Input/Output */ 872 #define PH10_NS GPIO_PIN_DATA_NS(7, 10) /*!< Specify PH.10 Pin Data Input/Output */ 873 #define PH11_NS GPIO_PIN_DATA_NS(7, 11) /*!< Specify PH.11 Pin Data Input/Output */ 874 875 876 /**@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */ 877 878 879 /** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions 880 @{ 881 */ 882 883 /** 884 * @brief Clear GPIO Pin Interrupt Flag 885 * 886 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 887 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 888 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 889 * It could be BIT0 ~ BIT13 for PC. \n 890 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 891 * It could be BIT0 ~ BIT11 for PF. \n 892 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 893 * It could be BIT4 ~ BIT11 for PH. 894 * 895 * @return None 896 * 897 * @details Clear the interrupt status of specified GPIO pin. 898 */ 899 #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->INTSRC = (u32PinMask)) 900 901 /** 902 * @brief Disable Pin De-bounce Function 903 * 904 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 905 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 906 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 907 * It could be BIT0 ~ BIT13 for PC. \n 908 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 909 * It could be BIT0 ~ BIT11 for PF. \n 910 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 911 * It could be BIT4 ~ BIT11 for PH. 912 * 913 * @return None 914 * 915 * @details Disable the interrupt de-bounce function of specified GPIO pin. 916 */ 917 #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask)) 918 919 /** 920 * @brief Enable Pin De-bounce Function 921 * 922 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 923 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 924 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 925 * It could be BIT0 ~ BIT13 for PC. \n 926 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 927 * It could be BIT0 ~ BIT11 for PF. \n 928 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 929 * It could be BIT4 ~ BIT11 for PH. 930 * @return None 931 * 932 * @details Enable the interrupt de-bounce function of specified GPIO pin. 933 */ 934 #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask)) 935 936 /** 937 * @brief Disable I/O Digital Input Path 938 * 939 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 940 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 941 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 942 * It could be BIT0 ~ BIT13 for PC. \n 943 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 944 * It could be BIT0 ~ BIT11 for PF. \n 945 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 946 * It could be BIT4 ~ BIT11 for PH. 947 * 948 * @return None 949 * 950 * @details Disable I/O digital input path of specified GPIO pin. 951 */ 952 #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16)) 953 954 /** 955 * @brief Enable I/O Digital Input Path 956 * 957 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 958 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 959 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 960 * It could be BIT0 ~ BIT13 for PC. \n 961 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 962 * It could be BIT0 ~ BIT11 for PF. \n 963 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 964 * It could be BIT4 ~ BIT11 for PH. 965 * 966 * @return None 967 * 968 * @details Enable I/O digital input path of specified GPIO pin. 969 */ 970 #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16)) 971 972 /** 973 * @brief Disable I/O DOUT mask 974 * 975 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 976 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 977 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 978 * It could be BIT0 ~ BIT13 for PC. \n 979 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 980 * It could be BIT0 ~ BIT11 for PF. \n 981 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 982 * It could be BIT4 ~ BIT11 for PH. 983 * 984 * @return None 985 * 986 * @details Disable I/O DOUT mask of specified GPIO pin. 987 */ 988 #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask)) 989 990 /** 991 * @brief Enable I/O DOUT mask 992 * 993 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 994 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 995 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 996 * It could be BIT0 ~ BIT13 for PC. \n 997 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 998 * It could be BIT0 ~ BIT11 for PF. \n 999 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 1000 * It could be BIT4 ~ BIT11 for PH. 1001 * 1002 * @return None 1003 * 1004 * @details Enable I/O DOUT mask of specified GPIO pin. 1005 */ 1006 #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask)) 1007 1008 /** 1009 * @brief Get GPIO Pin Interrupt Flag 1010 * 1011 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 1012 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. \n 1013 * It could be BIT0 ~ BIT15 for PA, PB and PE. \n 1014 * It could be BIT0 ~ BIT13 for PC. \n 1015 * It could be BIT0 ~ BIT12, BIT14 for PD. \n 1016 * It could be BIT0 ~ BIT11 for PF. \n 1017 * It could be BIT2 ~ BIT3, BIT9 ~ BIT15 for PG. \n 1018 * It could be BIT4 ~ BIT11 for PH. 1019 * 1020 * @retval 0 No interrupt at specified GPIO pin 1021 * @retval 1 The specified GPIO pin generate an interrupt 1022 * 1023 * @details Get the interrupt status of specified GPIO pin. 1024 */ 1025 #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask)) 1026 1027 /** 1028 * @brief Set De-bounce Sampling Cycle Time 1029 * 1030 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 1031 * @param[in] u32ClkSrc The de-bounce counter clock source. It could be GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC. 1032 * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be 1033 * - \ref GPIO_DBCTL_DBCLKSEL_1 1034 * - \ref GPIO_DBCTL_DBCLKSEL_2 1035 * - \ref GPIO_DBCTL_DBCLKSEL_4 1036 * - \ref GPIO_DBCTL_DBCLKSEL_8 1037 * - \ref GPIO_DBCTL_DBCLKSEL_16 1038 * - \ref GPIO_DBCTL_DBCLKSEL_32 1039 * - \ref GPIO_DBCTL_DBCLKSEL_64 1040 * - \ref GPIO_DBCTL_DBCLKSEL_128 1041 * - \ref GPIO_DBCTL_DBCLKSEL_256 1042 * - \ref GPIO_DBCTL_DBCLKSEL_512 1043 * - \ref GPIO_DBCTL_DBCLKSEL_1024 1044 * - \ref GPIO_DBCTL_DBCLKSEL_2048 1045 * - \ref GPIO_DBCTL_DBCLKSEL_4096 1046 * - \ref GPIO_DBCTL_DBCLKSEL_8192 1047 * - \ref GPIO_DBCTL_DBCLKSEL_16384 1048 * - \ref GPIO_DBCTL_DBCLKSEL_32768 1049 * 1050 * @return None 1051 * 1052 * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n 1053 * Example: _GPIO_SET_DEBOUNCE_TIME(PA, GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n 1054 * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n 1055 * Then the target de-bounce sampling cycle time is (4)*(1/(10*1000)) s = 4*0.0001 s = 400 us, 1056 * and system will sampling interrupt input once per 400 us. 1057 */ 1058 #define GPIO_SET_DEBOUNCE_TIME(port, u32ClkSrc, u32ClkSel) ((port)->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel))) 1059 1060 /** 1061 * @brief Get GPIO Port IN Data 1062 * 1063 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 1064 * 1065 * @return The specified port data 1066 * 1067 * @details Get the PIN register of specified GPIO port. 1068 */ 1069 #define GPIO_GET_IN_DATA(port) ((port)->PIN) 1070 1071 /** 1072 * @brief Set GPIO Port OUT Data 1073 * 1074 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 1075 * @param[in] u32Data GPIO port data. 1076 * 1077 * @return None 1078 * 1079 * @details Set the Data into specified GPIO port. 1080 */ 1081 #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data)) 1082 1083 /** 1084 * @brief Toggle Specified GPIO pin 1085 * 1086 * @param[in] u32Pin Pxy 1087 * 1088 * @return None 1089 * 1090 * @details Toggle the specified GPIO pint. 1091 */ 1092 #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1) 1093 1094 1095 /** 1096 * @brief Enable External GPIO interrupt 1097 * 1098 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 1099 * @param[in] u32Pin The pin of specified GPIO port. \n 1100 * It could be 0 ~ 15 for PA, PB and PE. \n 1101 * It could be 0 ~ 13 for PC GPIO port. \n 1102 * It could be 0 ~ 12, 14 for PD GPIO port. \n 1103 * It could be 0 ~ 11 for PF GPIO port. \n 1104 * It could be 2 ~ 4, 9 ~ 15 for PG GPIO port. \n 1105 * It could be 4 ~ 11 for PH GPIO port. 1106 * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be 1107 * - \ref GPIO_INT_RISING 1108 * - \ref GPIO_INT_FALLING 1109 * - \ref GPIO_INT_BOTH_EDGE 1110 * - \ref GPIO_INT_HIGH 1111 * - \ref GPIO_INT_LOW 1112 * 1113 * @return None 1114 * 1115 * @details This function is used to enable specified GPIO pin interrupt. 1116 */ 1117 #define GPIO_EnableEINT GPIO_EnableInt 1118 1119 /** 1120 * @brief Disable External GPIO interrupt 1121 * 1122 * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE, PF, PG or PH. 1123 * @param[in] u32Pin The pin of specified GPIO port. \n 1124 * It could be 0 ~ 15 for PA, PB and PE. \n 1125 * It could be 0 ~ 13 for PC GPIO port. \n 1126 * It could be 0 ~ 12, 14 for PD GPIO port. \n 1127 * It could be 0 ~ 11 for PF GPIO port. \n 1128 * It could be 2 ~ 4, 9 ~ 15 for PG GPIO port. \n 1129 * It could be 4 ~ 11 for PH GPIO port. 1130 * 1131 * @return None 1132 * 1133 * @details This function is used to enable specified GPIO pin interrupt. 1134 */ 1135 #define GPIO_DisableEINT GPIO_DisableInt 1136 1137 1138 void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); 1139 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs); 1140 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin); 1141 void GPIO_SetSlewCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); 1142 void GPIO_SetPullCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); 1143 1144 1145 /**@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */ 1146 1147 /**@}*/ /* end of group GPIO_Driver */ 1148 1149 /**@}*/ /* end of group Standard_Driver */ 1150 1151 #ifdef __cplusplus 1152 } 1153 #endif 1154 1155 #endif /* __GPIO_H__ */ 1156
