1 /*
2  * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #include "cache_drv.h"
9 #include "cmsis.h"
10 #include "cmsis_driver_config.h"
11 #include "musca_s1_scc_drv.h"
12 #include "target_cfg.h"
13 #include "tfm_hal_platform.h"
14 #include "tfm_plat_defs.h"
15 #include "uart_stdout.h"
16 #if defined(TEST_NS_FPU) || defined(TEST_S_FPU)
17 #include "test_interrupt.h"
18 #endif
19 
20 extern const struct memory_region_limits memory_regions;
21 
tfm_hal_platform_init(void)22 enum tfm_hal_status_t tfm_hal_platform_init(void)
23 {
24     enum tfm_plat_err_t plat_err = TFM_PLAT_ERR_SYSTEM_ERR;
25 
26     musca_s1_scc_mram_fast_read_enable(&MUSCA_S1_SCC_DEV);
27 
28     arm_cache_enable_blocking(&SSE_200_CACHE_DEV);
29 
30     plat_err = enable_fault_handlers();
31     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
32         return TFM_HAL_ERROR_GENERIC;
33     }
34 
35     plat_err = system_reset_cfg();
36     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
37         return TFM_HAL_ERROR_GENERIC;
38     }
39 
40     plat_err = init_debug();
41     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
42         return TFM_HAL_ERROR_GENERIC;
43     }
44 
45     __enable_irq();
46     stdio_init();
47 
48     plat_err = nvic_interrupt_target_state_cfg();
49     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
50         return TFM_HAL_ERROR_GENERIC;
51     }
52 
53     plat_err = nvic_interrupt_enable();
54     if (plat_err != TFM_PLAT_ERR_SUCCESS) {
55         return TFM_HAL_ERROR_GENERIC;
56     }
57 
58 #if defined(TEST_S_FPU) || defined(TEST_NS_FPU)
59     /* Enable FPU secure test interrupt */
60     NVIC_EnableIRQ(TFM_FPU_S_TEST_IRQ);
61 
62     /* Set IRQn in secure mode */
63     NVIC_ClearTargetState(TFM_FPU_S_TEST_IRQ);
64 #endif
65 
66 #if defined(TEST_NS_FPU)
67     NVIC_EnableIRQ(TFM_FPU_NS_TEST_IRQ);
68 
69     /* Set IRQn in non-secure mode */
70     NVIC_SetTargetState(TFM_FPU_NS_TEST_IRQ);
71 
72 #endif
73 
74     return TFM_HAL_SUCCESS;
75 }
76 
tfm_hal_get_ns_VTOR(void)77 uint32_t tfm_hal_get_ns_VTOR(void)
78 {
79     return memory_regions.non_secure_code_start;
80 }
81 
tfm_hal_get_ns_MSP(void)82 uint32_t tfm_hal_get_ns_MSP(void)
83 {
84     return *((uint32_t *)memory_regions.non_secure_code_start);
85 }
86 
tfm_hal_get_ns_entry_point(void)87 uint32_t tfm_hal_get_ns_entry_point(void)
88 {
89     return *((uint32_t *)(memory_regions.non_secure_code_start + 4));
90 }
91