1 /*
2  * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 /**
18  * \file device_definition.h
19  * \brief The structure definitions in this file are exported based
20  * on the peripheral definitions from device_cfg.h.
21  * This file is meant to be used as a helper for baremetal
22  * applications and/or as an example of how to configure the generic
23  * driver structures.
24  */
25 
26 #ifndef __DEVICE_DEFINITION_H__
27 #define __DEVICE_DEFINITION_H__
28 
29 #include "device_cfg.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
35 /* ======= Peripheral configuration structure declarations ======= */
36 
37 /* ARM GPIO driver structures */
38 #ifdef GPIO0_CMSDK_S
39 #include "gpio_cmsdk_drv.h"
40 extern struct gpio_cmsdk_dev_t GPIO0_CMSDK_DEV_S;
41 #endif
42 
43 /* ARM MPC SIE 200 driver structures */
44 #ifdef MPC_ISRAM0_S
45 #include "mpc_sie200_drv.h"
46 extern struct mpc_sie200_dev_t MPC_ISRAM0_DEV_S;
47 #endif
48 #ifdef MPC_ISRAM1_S
49 #include "mpc_sie200_drv.h"
50 extern struct mpc_sie200_dev_t MPC_ISRAM1_DEV_S;
51 #endif
52 #ifdef MPC_ISRAM2_S
53 #include "mpc_sie200_drv.h"
54 extern struct mpc_sie200_dev_t MPC_ISRAM2_DEV_S;
55 #endif
56 #ifdef MPC_ISRAM3_S
57 #include "mpc_sie200_drv.h"
58 extern struct mpc_sie200_dev_t MPC_ISRAM3_DEV_S;
59 #endif
60 #ifdef MPC_CODE_SRAM_S
61 #include "mpc_sie200_drv.h"
62 extern struct mpc_sie200_dev_t MPC_CODE_SRAM_DEV_S;
63 #endif
64 #ifdef MPC_CODE_SRAM_NS
65 #include "mpc_sie200_drv.h"
66 extern struct mpc_sie200_dev_t MPC_CODE_SRAM_DEV_NS;
67 #endif
68 #ifdef MPC_MRAM_S
69 #include "mpc_sie200_drv.h"
70 extern struct mpc_sie200_dev_t MPC_MRAM_DEV_S;
71 #endif
72 #ifdef MPC_MRAM_NS
73 #include "mpc_sie200_drv.h"
74 extern struct mpc_sie200_dev_t MPC_MRAM_DEV_NS;
75 #endif
76 
77 /* ARM MHU driver structures */
78 #ifdef ARM_MHU0_S
79 #include "mhu_sse_200_drv.h"
80 extern struct arm_mhu_sse_200_dev_t ARM_MHU0_DEV_S;
81 #endif
82 #ifdef ARM_MHU0_NS
83 #include "mhu_sse_200_drv.h"
84 extern struct arm_mhu_sse_200_dev_t ARM_MHU0_DEV_NS;
85 #endif
86 #ifdef ARM_MHU1_S
87 #include "mhu_sse_200_drv.h"
88 extern struct arm_mhu_sse_200_dev_t ARM_MHU1_DEV_S;
89 #endif
90 #ifdef ARM_MHU1_NS
91 #include "mhu_sse_200_drv.h"
92 extern struct arm_mhu_sse_200_dev_t ARM_MHU1_DEV_NS;
93 #endif
94 
95 /* ARM UART PL011 driver structures */
96 #ifdef UART0_PL011_S
97 #include "uart_pl011_drv.h"
98 extern struct uart_pl011_dev_t UART0_PL011_DEV_S;
99 #endif
100 #ifdef UART0_PL011_NS
101 #include "uart_pl011_drv.h"
102 extern struct uart_pl011_dev_t UART0_PL011_DEV_NS;
103 #endif
104 #ifdef UART1_PL011_S
105 #include "uart_pl011_drv.h"
106 extern struct uart_pl011_dev_t UART1_PL011_DEV_S;
107 #endif
108 #ifdef UART1_PL011_NS
109 #include "uart_pl011_drv.h"
110 extern struct uart_pl011_dev_t UART1_PL011_DEV_NS;
111 #endif
112 
113 /* I2C IP6510 driver structures */
114 #ifdef I2C0_IP6510_S
115 #include "i2c_ip6510_drv.h"
116 extern struct i2c_ip6510_dev_t I2C0_IP6510_DEV_S;
117 #endif
118 #ifdef I2C0_IP6510_NS
119 #include "i2c_ip6510_drv.h"
120 extern struct i2c_ip6510_dev_t I2C0_IP6510_DEV_NS;
121 #endif
122 #ifdef I2C1_IP6510_S
123 #include "i2c_ip6510_drv.h"
124 extern struct i2c_ip6510_dev_t I2C1_IP6510_DEV_S;
125 #endif
126 #ifdef I2C1_IP6510_NS
127 #include "i2c_ip6510_drv.h"
128 extern struct i2c_ip6510_dev_t I2C1_IP6510_DEV_NS;
129 #endif
130 
131 /* CMSDK Dualtimer driver structures */
132 #ifdef CMSDK_DUALTIMER_S
133 #include "dualtimer_cmsdk_drv.h"
134 extern struct dualtimer_cmsdk_dev_t CMSDK_DUALTIMER_DEV_S;
135 #endif
136 #ifdef CMSDK_DUALTIMER_NS
137 #include "dualtimer_cmsdk_drv.h"
138 extern struct dualtimer_cmsdk_dev_t CMSDK_DUALTIMER_DEV_NS;
139 #endif
140 
141 /* CMSDK Timer driver structures */
142 #ifdef CMSDK_TIMER0_S
143 #include "timer_cmsdk_drv.h"
144 extern struct timer_cmsdk_dev_t CMSDK_TIMER0_DEV_S;
145 #endif
146 #ifdef CMSDK_TIMER0_NS
147 #include "timer_cmsdk_drv.h"
148 extern struct timer_cmsdk_dev_t CMSDK_TIMER0_DEV_NS;
149 #endif
150 
151 #ifdef CMSDK_TIMER1_S
152 #include "timer_cmsdk_drv.h"
153 extern struct timer_cmsdk_dev_t CMSDK_TIMER1_DEV_S;
154 #endif
155 #ifdef CMSDK_TIMER1_NS
156 #include "timer_cmsdk_drv.h"
157 extern struct timer_cmsdk_dev_t CMSDK_TIMER1_DEV_NS;
158 #endif
159 
160 /* General-Purpose Timer driver structures */
161 #ifdef GP_TIMER_S
162 #include "timer_gp_drv.h"
163 extern struct timer_gp_dev_t GP_TIMER_DEV_S;
164 #endif
165 #ifdef GP_TIMER_NS
166 #include "timer_gp_drv.h"
167 extern struct timer_gp_dev_t GP_TIMER_DEV_NS;
168 #endif
169 
170 /* RTC PL031 */
171 #ifdef RTC_PL031_S
172 #include "rtc_pl031_drv.h"
173 extern struct rtc_pl031_dev_t RTC_PL031_DEV_S;
174 #endif
175 
176 #ifdef RTC_PL031_NS
177 #include "rtc_pl031_drv.h"
178 extern struct rtc_pl031_dev_t RTC_PL031_DEV_NS;
179 #endif
180 
181 /* Cadence SPI IP6524 driver structures */
182 #ifdef SPI0_IP6524_S
183 #include "spi_ip6524_drv.h"
184 extern struct spi_ip6524_dev_t SPI0_DEV_S;
185 #endif
186 #ifdef SPI0_IP6524_NS
187 #include "spi_ip6524_drv.h"
188 extern struct spi_ip6524_dev_t SPI0_DEV_NS;
189 #endif
190 
191 /* QSPI Flash Controller driver structures  */
192 #ifdef QSPI_IP6514E_S
193 #include "qspi_ip6514e_drv.h"
194 extern struct qspi_ip6514e_dev_t QSPI_DEV_S;
195 #endif
196 
197 #ifdef QSPI_IP6514E_NS
198 #include "qspi_ip6514e_drv.h"
199 extern struct qspi_ip6514e_dev_t QSPI_DEV_NS;
200 #endif
201 
202 /* ARM PPC driver structures */
203 #ifdef AHB_PPC0_S
204 #include "ppc_sse200_drv.h"
205 extern struct ppc_sse200_dev_t AHB_PPC0_DEV_S;
206 #endif
207 
208 #ifdef AHB_PPCEXP0_S
209 #include "ppc_sse200_drv.h"
210 extern struct ppc_sse200_dev_t AHB_PPCEXP0_DEV_S;
211 #endif
212 
213 #ifdef APB_PPC0_S
214 #include "ppc_sse200_drv.h"
215 extern struct ppc_sse200_dev_t APB_PPC0_DEV_S;
216 #endif
217 
218 #ifdef APB_PPC1_S
219 #include "ppc_sse200_drv.h"
220 extern struct ppc_sse200_dev_t APB_PPC1_DEV_S;
221 #endif
222 
223 #ifdef APB_PPCEXP0_S
224 #include "ppc_sse200_drv.h"
225 extern struct ppc_sse200_dev_t APB_PPCEXP0_DEV_S;
226 #endif
227 
228 #ifdef APB_PPCEXP1_S
229 #include "ppc_sse200_drv.h"
230 extern struct ppc_sse200_dev_t APB_PPCEXP1_DEV_S;
231 #endif
232 
233 /* ARM SCC driver structures */
234 #ifdef MUSCA_S1_SCC_S
235 #include "musca_s1_scc_drv.h"
236 extern struct musca_s1_scc_dev_t MUSCA_S1_SCC_DEV_S;
237 #endif
238 #ifdef MUSCA_S1_SCC_NS
239 #include "musca_s1_scc_drv.h"
240 extern struct musca_s1_scc_dev_t MUSCA_S1_SCC_DEV_NS;
241 #endif
242 
243 /* SSE-200 Cache driver structure */
244 #ifdef SSE_200_CACHE_S
245 #include "cache_drv.h"
246 extern struct arm_cache_dev_t SSE_200_CACHE_DEV_S;
247 #endif
248 
249 /* ======= External peripheral configuration structure declarations ======= */
250 
251 /* MT25QL Flash memory library structures */
252 #if (defined(MT25QL_NS) && defined(QSPI_IP6514E_NS))
253 #include "mt25ql_flash_lib.h"
254 extern struct mt25ql_dev_t MT25QL_DEV_NS;
255 #endif
256 
257 #if (defined(MT25QL_S) && defined(QSPI_IP6514E_S))
258 #include "mt25ql_flash_lib.h"
259 extern struct mt25ql_dev_t MT25QL_DEV_S;
260 #endif
261 
262 #ifdef __cplusplus
263 }
264 #endif
265 
266 #endif  /* __DEVICE_DEFINITION_H__ */
267