1 /**************************************************************************//** 2 * @file qspi.h 3 * @version V3.00 4 * @brief M2351 series QSPI driver header file 5 * 6 * @copyright SPDX-License-Identifier: Apache-2.0 7 * @copyright Copyright (C) 2017-2020 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __QSPI_H__ 10 #define __QSPI_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup QSPI_Driver QSPI Driver 23 @{ 24 */ 25 26 /** @addtogroup QSPI_EXPORTED_CONSTANTS QSPI Exported Constants 27 @{ 28 */ 29 30 #define QSPI_MODE_0 (QSPI_CTL_TXNEG_Msk) /*!< CLKPOL=0; RXNEG=0; TXNEG=1 */ 31 #define QSPI_MODE_1 (QSPI_CTL_RXNEG_Msk) /*!< CLKPOL=0; RXNEG=1; TXNEG=0 */ 32 #define QSPI_MODE_2 (QSPI_CTL_CLKPOL_Msk | QSPI_CTL_RXNEG_Msk) /*!< CLKPOL=1; RXNEG=1; TXNEG=0 */ 33 #define QSPI_MODE_3 (QSPI_CTL_CLKPOL_Msk | QSPI_CTL_TXNEG_Msk) /*!< CLKPOL=1; RXNEG=0; TXNEG=1 */ 34 35 #define QSPI_SLAVE (QSPI_CTL_SLAVE_Msk) /*!< Set as slave */ 36 #define QSPI_MASTER (0x0UL) /*!< Set as master */ 37 38 #define QSPI_SS (QSPI_SSCTL_SS_Msk) /*!< Set SS */ 39 #define QSPI_SS_ACTIVE_HIGH (QSPI_SSCTL_SSACTPOL_Msk) /*!< SS active high */ 40 #define QSPI_SS_ACTIVE_LOW (0x0UL) /*!< SS active low */ 41 42 /* QSPI Interrupt Mask */ 43 #define QSPI_UNIT_INT_MASK (0x001UL) /*!< Unit transfer interrupt mask */ 44 #define QSPI_SSACT_INT_MASK (0x002UL) /*!< Slave selection signal active interrupt mask */ 45 #define QSPI_SSINACT_INT_MASK (0x004UL) /*!< Slave selection signal inactive interrupt mask */ 46 #define QSPI_SLVUR_INT_MASK (0x008UL) /*!< Slave under run interrupt mask */ 47 #define QSPI_SLVBE_INT_MASK (0x010UL) /*!< Slave bit count error interrupt mask */ 48 #define QSPI_SLVTO_INT_MASK (0x020UL) /*!< Slave Mode Time-out interrupt mask */ 49 #define QSPI_TXUF_INT_MASK (0x040UL) /*!< Slave TX underflow interrupt mask */ 50 #define QSPI_FIFO_TXTH_INT_MASK (0x080UL) /*!< FIFO TX threshold interrupt mask */ 51 #define QSPI_FIFO_RXTH_INT_MASK (0x100UL) /*!< FIFO RX threshold interrupt mask */ 52 #define QSPI_FIFO_RXOV_INT_MASK (0x200UL) /*!< FIFO RX overrun interrupt mask */ 53 #define QSPI_FIFO_RXTO_INT_MASK (0x400UL) /*!< FIFO RX time-out interrupt mask */ 54 55 /* QSPI Status Mask */ 56 #define QSPI_BUSY_MASK (0x01UL) /*!< Busy status mask */ 57 #define QSPI_RX_EMPTY_MASK (0x02UL) /*!< RX empty status mask */ 58 #define QSPI_RX_FULL_MASK (0x04UL) /*!< RX full status mask */ 59 #define QSPI_TX_EMPTY_MASK (0x08UL) /*!< TX empty status mask */ 60 #define QSPI_TX_FULL_MASK (0x10UL) /*!< TX full status mask */ 61 #define QSPI_TXRX_RESET_MASK (0x20UL) /*!< TX or RX reset status mask */ 62 #define QSPI_SPIEN_STS_MASK (0x40UL) /*!< SPIEN status mask */ 63 #define QSPI_SSLINE_STS_MASK (0x80UL) /*!< QSPIx_SS line status mask */ 64 65 /*@}*/ /* end of group QSPI_EXPORTED_CONSTANTS */ 66 67 68 /** @addtogroup QSPI_EXPORTED_FUNCTIONS QSPI Exported Functions 69 @{ 70 */ 71 72 /** 73 * @brief Clear the unit transfer interrupt flag. 74 * @param[in] qspi The pointer of the specified QSPI module. 75 * @return None. 76 * @details Write 1 to UNITIF bit of QSPI_STATUS register to clear the unit transfer interrupt flag. 77 */ 78 #define QSPI_CLR_UNIT_TRANS_INT_FLAG(qspi) ( (qspi)->STATUS = QSPI_STATUS_UNITIF_Msk ) 79 80 /** 81 * @brief Disable 2-bit Transfer mode. 82 * @param[in] qspi The pointer of the specified QSPI module. 83 * @return None. 84 * @details Clear TWOBIT bit of QSPI_CTL register to disable 2-bit Transfer mode. 85 */ 86 #define QSPI_DISABLE_2BIT_MODE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_TWOBIT_Msk ) 87 88 /** 89 * @brief Disable Slave 3-wire mode. 90 * @param[in] qspi The pointer of the specified QSPI module. 91 * @return None. 92 * @details Clear SLV3WIRE bit of QSPI_SSCTL register to disable Slave 3-wire mode. 93 */ 94 #define QSPI_DISABLE_3WIRE_MODE(qspi) ( (qspi)->SSCTL &= ~QSPI_SSCTL_SLV3WIRE_Msk ) 95 96 /** 97 * @brief Disable Dual I/O mode. 98 * @param[in] qspi The pointer of the specified QSPI module. 99 * @return None. 100 * @details Clear DUALIOEN bit of QSPI_CTL register to disable Dual I/O mode. 101 */ 102 #define QSPI_DISABLE_DUAL_MODE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_DUALIOEN_Msk ) 103 104 /** 105 * @brief Disable Quad I/O mode. 106 * @param[in] qspi The pointer of the specified QSPI module. 107 * @return None. 108 * @details Clear QUADIOEN bit of QSPI_CTL register to disable Quad I/O mode. 109 */ 110 #define QSPI_DISABLE_QUAD_MODE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_QUADIOEN_Msk ) 111 112 /** 113 * @brief Enable 2-bit Transfer mode. 114 * @param[in] qspi The pointer of the specified QSPI module. 115 * @return None. 116 * @details Set TWOBIT bit of QSPI_CTL register to enable 2-bit Transfer mode. 117 */ 118 #define QSPI_ENABLE_2BIT_MODE(qspi) ( (qspi)->CTL |= QSPI_CTL_TWOBIT_Msk ) 119 120 /** 121 * @brief Enable Slave 3-wire mode. 122 * @param[in] qspi The pointer of the specified QSPI module. 123 * @return None. 124 * @details Set SLV3WIRE bit of QSPI_SSCTL register to enable Slave 3-wire mode. 125 */ 126 #define QSPI_ENABLE_3WIRE_MODE(qspi) ( (qspi)->SSCTL |= QSPI_SSCTL_SLV3WIRE_Msk ) 127 128 /** 129 * @brief Enable Dual input mode. 130 * @param[in] qspi The pointer of the specified QSPI module. 131 * @return None. 132 * @details Clear DATDIR bit and set DUALIOEN bit of QSPI_CTL register to enable Dual input mode. 133 */ 134 #define QSPI_ENABLE_DUAL_INPUT_MODE(qspi) ( (qspi)->CTL = ((qspi)->CTL & (~QSPI_CTL_DATDIR_Msk)) | QSPI_CTL_DUALIOEN_Msk ) 135 136 /** 137 * @brief Enable Dual output mode. 138 * @param[in] qspi The pointer of the specified QSPI module. 139 * @return None. 140 * @details Set DATDIR bit and DUALIOEN bit of QSPI_CTL register to enable Dual output mode. 141 */ 142 #define QSPI_ENABLE_DUAL_OUTPUT_MODE(qspi) ( (qspi)->CTL |= (QSPI_CTL_DATDIR_Msk | QSPI_CTL_DUALIOEN_Msk) ) 143 144 /** 145 * @brief Enable Quad input mode. 146 * @param[in] qspi The pointer of the specified QSPI module. 147 * @return None. 148 * @details Clear DATDIR bit and set QUADIOEN bit of QSPI_CTL register to enable Quad input mode. 149 */ 150 #define QSPI_ENABLE_QUAD_INPUT_MODE(qspi) ( (qspi)->CTL = ((qspi)->CTL & (~QSPI_CTL_DATDIR_Msk)) | QSPI_CTL_QUADIOEN_Msk ) 151 152 /** 153 * @brief Enable Quad output mode. 154 * @param[in] qspi The pointer of the specified QSPI module. 155 * @return None. 156 * @details Set DATDIR bit and QUADIOEN bit of QSPI_CTL register to enable Quad output mode. 157 */ 158 #define QSPI_ENABLE_QUAD_OUTPUT_MODE(qspi) ( (qspi)->CTL |= (QSPI_CTL_DATDIR_Msk | QSPI_CTL_QUADIOEN_Msk) ) 159 160 /** 161 * @brief Trigger RX PDMA function. 162 * @param[in] qspi The pointer of the specified QSPI module. 163 * @return None. 164 * @details Set RXPDMAEN bit of QSPI_PDMACTL register to enable RX PDMA transfer function. 165 */ 166 #define QSPI_TRIGGER_RX_PDMA(qspi) ( (qspi)->PDMACTL |= QSPI_PDMACTL_RXPDMAEN_Msk ) 167 168 /** 169 * @brief Trigger TX PDMA function. 170 * @param[in] qspi The pointer of the specified QSPI module. 171 * @return None. 172 * @details Set TXPDMAEN bit of QSPI_PDMACTL register to enable TX PDMA transfer function. 173 */ 174 #define QSPI_TRIGGER_TX_PDMA(qspi) ( (qspi)->PDMACTL |= QSPI_PDMACTL_TXPDMAEN_Msk ) 175 176 /** 177 * @brief Trigger TX and RX PDMA function. 178 * @param[in] qspi The pointer of the specified QSPI module. 179 * @return None. 180 * @details Set TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to enable TX and RX PDMA transfer function. 181 */ 182 #define QSPI_TRIGGER_TX_RX_PDMA(qspi) ( (qspi)->PDMACTL |= (QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk) ) 183 184 /** 185 * @brief Disable RX PDMA transfer. 186 * @param[in] qspi The pointer of the specified QSPI module. 187 * @return None. 188 * @details Clear RXPDMAEN bit of QSPI_PDMACTL register to disable RX PDMA transfer function. 189 */ 190 #define QSPI_DISABLE_RX_PDMA(qspi) ( (qspi)->PDMACTL &= ~QSPI_PDMACTL_RXPDMAEN_Msk ) 191 192 /** 193 * @brief Disable TX PDMA transfer. 194 * @param[in] qspi The pointer of the specified QSPI module. 195 * @return None. 196 * @details Clear TXPDMAEN bit of QSPI_PDMACTL register to disable TX PDMA transfer function. 197 */ 198 #define QSPI_DISABLE_TX_PDMA(qspi) ( (qspi)->PDMACTL &= ~QSPI_PDMACTL_TXPDMAEN_Msk ) 199 200 /** 201 * @brief Disable TX and RX PDMA transfer. 202 * @param[in] qspi The pointer of the specified QSPI module. 203 * @return None. 204 * @details Clear TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to disable TX and RX PDMA transfer function. 205 */ 206 #define QSPI_DISABLE_TX_RX_PDMA(qspi) ( (qspi)->PDMACTL &= ~(QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk) ) 207 208 /** 209 * @brief Get the count of available data in RX FIFO. 210 * @param[in] qspi The pointer of the specified QSPI module. 211 * @return The count of available data in RX FIFO. 212 * @details Read RXCNT (QSPI_STATUS[27:24]) to get the count of available data in RX FIFO. 213 */ 214 #define QSPI_GET_RX_FIFO_COUNT(qspi) ( ((qspi)->STATUS & QSPI_STATUS_RXCNT_Msk) >> QSPI_STATUS_RXCNT_Pos ) 215 216 /** 217 * @brief Get the RX FIFO empty flag. 218 * @param[in] qspi The pointer of the specified QSPI module. 219 * @retval 0 RX FIFO is not empty. 220 * @retval 1 RX FIFO is empty. 221 * @details Read RXEMPTY bit of QSPI_STATUS register to get the RX FIFO empty flag. 222 */ 223 #define QSPI_GET_RX_FIFO_EMPTY_FLAG(qspi) ( ((qspi)->STATUS & QSPI_STATUS_RXEMPTY_Msk) >> QSPI_STATUS_RXEMPTY_Pos ) 224 225 /** 226 * @brief Get the TX FIFO empty flag. 227 * @param[in] qspi The pointer of the specified QSPI module. 228 * @retval 0 TX FIFO is not empty. 229 * @retval 1 TX FIFO is empty. 230 * @details Read TXEMPTY bit of QSPI_STATUS register to get the TX FIFO empty flag. 231 */ 232 #define QSPI_GET_TX_FIFO_EMPTY_FLAG(qspi) ( ((qspi)->STATUS & QSPI_STATUS_TXEMPTY_Msk) >> QSPI_STATUS_TXEMPTY_Pos ) 233 234 /** 235 * @brief Get the TX FIFO full flag. 236 * @param[in] qspi The pointer of the specified QSPI module. 237 * @retval 0 TX FIFO is not full. 238 * @retval 1 TX FIFO is full. 239 * @details Read TXFULL bit of QSPI_STATUS register to get the TX FIFO full flag. 240 */ 241 #define QSPI_GET_TX_FIFO_FULL_FLAG(qspi) ( ((qspi)->STATUS & QSPI_STATUS_TXFULL_Msk) >> QSPI_STATUS_TXFULL_Pos ) 242 243 /** 244 * @brief Get the datum read from RX register. 245 * @param[in] qspi The pointer of the specified QSPI module. 246 * @return Data in RX register. 247 * @details Read QSPI_RX register to get the received datum. 248 */ 249 #define QSPI_READ_RX(qspi) ( (qspi)->RX ) 250 251 /** 252 * @brief Write datum to TX register. 253 * @param[in] qspi The pointer of the specified QSPI module. 254 * @param[in] u32TxData The datum which user attempt to transfer through QSPI bus. 255 * @return None. 256 * @details Write u32TxData to QSPI_TX register. 257 */ 258 #define QSPI_WRITE_TX(qspi, u32TxData) ( (qspi)->TX = (u32TxData) ) 259 260 /** 261 * @brief Set QSPIx_SS pin to high state. 262 * @param[in] qspi The pointer of the specified QSPI module. 263 * @return None. 264 * @details Disable automatic slave selection function and set QSPIx_SS pin to high state. 265 */ 266 #define QSPI_SET_SS_HIGH(qspi) ( (qspi)->SSCTL = ((qspi)->SSCTL & (~QSPI_SSCTL_AUTOSS_Msk)) | (QSPI_SSCTL_SSACTPOL_Msk | QSPI_SSCTL_SS_Msk) ) 267 268 /** 269 * @brief Set QSPIx_SS pin to low state. 270 * @param[in] qspi The pointer of the specified QSPI module. 271 * @return None. 272 * @details Disable automatic slave selection function and set QSPIx_SS pin to low state. 273 */ 274 #define QSPI_SET_SS_LOW(qspi) ( (qspi)->SSCTL = ((qspi)->SSCTL & (~(QSPI_SSCTL_AUTOSS_Msk | QSPI_SSCTL_SSACTPOL_Msk))) | QSPI_SSCTL_SS_Msk ) 275 276 /** 277 * @brief Enable Byte Reorder function. 278 * @param[in] qspi The pointer of the specified QSPI module. 279 * @return None. 280 * @details Enable Byte Reorder function. The suspend interval depends on the setting of SUSPITV (QSPI_CTL[7:4]). 281 */ 282 #define QSPI_ENABLE_BYTE_REORDER(qspi) ( (qspi)->CTL |= QSPI_CTL_REORDER_Msk ) 283 284 /** 285 * @brief Disable Byte Reorder function. 286 * @param[in] qspi The pointer of the specified QSPI module. 287 * @return None. 288 * @details Clear REORDER bit field of QSPI_CTL register to disable Byte Reorder function. 289 */ 290 #define QSPI_DISABLE_BYTE_REORDER(qspi) ( (qspi)->CTL &= ~QSPI_CTL_REORDER_Msk ) 291 292 /** 293 * @brief Set the length of suspend interval. 294 * @param[in] qspi The pointer of the specified QSPI module. 295 * @param[in] u32SuspCycle Decides the length of suspend interval. It could be 0 ~ 15. 296 * @return None. 297 * @details Set the length of suspend interval according to u32SuspCycle. 298 * The length of suspend interval is ((u32SuspCycle + 0.5) * the length of one QSPI bus clock cycle). 299 */ 300 #define QSPI_SET_SUSPEND_CYCLE(qspi, u32SuspCycle) ( (qspi)->CTL = ((qspi)->CTL & ~QSPI_CTL_SUSPITV_Msk) | ((u32SuspCycle) << QSPI_CTL_SUSPITV_Pos) ) 301 302 /** 303 * @brief Set the QSPI transfer sequence with LSB first. 304 * @param[in] qspi The pointer of the specified QSPI module. 305 * @return None. 306 * @details Set LSB bit of QSPI_CTL register to set the QSPI transfer sequence with LSB first. 307 */ 308 #define QSPI_SET_LSB_FIRST(qspi) ( (qspi)->CTL |= QSPI_CTL_LSB_Msk ) 309 310 /** 311 * @brief Set the QSPI transfer sequence with MSB first. 312 * @param[in] qspi The pointer of the specified QSPI module. 313 * @return None. 314 * @details Clear LSB bit of QSPI_CTL register to set the QSPI transfer sequence with MSB first. 315 */ 316 #define QSPI_SET_MSB_FIRST(qspi) ( (qspi)->CTL &= ~QSPI_CTL_LSB_Msk ) 317 318 /** 319 * @brief Set the data width of a QSPI transaction. 320 * @param[in] qspi The pointer of the specified QSPI module. 321 * @param[in] u32Width The bit width of one transaction. 322 * @return None. 323 * @details The data width can be 8 ~ 32 bits. 324 */ 325 #define QSPI_SET_DATA_WIDTH(qspi, u32Width) ( (qspi)->CTL = ((qspi)->CTL & ~QSPI_CTL_DWIDTH_Msk) | (((u32Width) & 0x1F) << QSPI_CTL_DWIDTH_Pos) ) 326 327 /** 328 * @brief Get the QSPI busy state. 329 * @param[in] qspi The pointer of the specified QSPI module. 330 * @retval 0 QSPI controller is not busy. 331 * @retval 1 QSPI controller is busy. 332 * @details This macro will return the busy state of QSPI controller. 333 */ 334 #define QSPI_IS_BUSY(qspi) ( ((qspi)->STATUS & QSPI_STATUS_BUSY_Msk) >> QSPI_STATUS_BUSY_Pos ) 335 336 /** 337 * @brief Enable QSPI controller. 338 * @param[in] qspi The pointer of the specified QSPI module. 339 * @return None. 340 * @details Set SPIEN (QSPI_CTL[0]) to enable QSPI controller. 341 */ 342 #define QSPI_ENABLE(qspi) ( (qspi)->CTL |= QSPI_CTL_SPIEN_Msk ) 343 344 /** 345 * @brief Disable QSPI controller. 346 * @param[in] qspi The pointer of the specified QSPI module. 347 * @return None. 348 * @details Clear SPIEN (QSPI_CTL[0]) to disable QSPI controller. 349 */ 350 #define QSPI_DISABLE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_SPIEN_Msk ) 351 352 /* Function prototype declaration */ 353 uint32_t QSPI_Open(QSPI_T *qspi, uint32_t u32MasterSlave, uint32_t u32QSPIMode, uint32_t u32DataWidth, uint32_t u32BusClock); 354 void QSPI_Close(QSPI_T *qspi); 355 void QSPI_ClearRxFIFO(QSPI_T *qspi); 356 void QSPI_ClearTxFIFO(QSPI_T *qspi); 357 void QSPI_DisableAutoSS(QSPI_T *qspi); 358 void QSPI_EnableAutoSS(QSPI_T *qspi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel); 359 uint32_t QSPI_SetBusClock(QSPI_T *qspi, uint32_t u32BusClock); 360 void QSPI_SetFIFO(QSPI_T *qspi, uint32_t u32TxThreshold, uint32_t u32RxThreshold); 361 uint32_t QSPI_GetBusClock(QSPI_T *qspi); 362 void QSPI_EnableInt(QSPI_T *qspi, uint32_t u32Mask); 363 void QSPI_DisableInt(QSPI_T *qspi, uint32_t u32Mask); 364 uint32_t QSPI_GetIntFlag(QSPI_T *qspi, uint32_t u32Mask); 365 void QSPI_ClearIntFlag(QSPI_T *qspi, uint32_t u32Mask); 366 uint32_t QSPI_GetStatus(QSPI_T *qspi, uint32_t u32Mask); 367 368 369 /*@}*/ /* end of group QSPI_EXPORTED_FUNCTIONS */ 370 371 /*@}*/ /* end of group QSPI_Driver */ 372 373 /*@}*/ /* end of group Standard_Driver */ 374 375 #ifdef __cplusplus 376 } 377 #endif 378 379 #endif /* __QSPI_H__ */ 380 381
