1 /* 2 * Copyright (c) 2019-2022 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing software 11 * distributed under the License is distributed on an "AS IS" BASIS 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /** 18 * \file device_definition.h 19 * \brief The structure definitions in this file are exported based on the 20 * peripheral definitions from device_cfg.h. 21 * This file is meant to be used as a helper for baremetal 22 * applications and/or as an example of how to configure the generic 23 * driver structures. 24 */ 25 26 #ifndef __DEVICE_DEFINITION_H__ 27 #define __DEVICE_DEFINITION_H__ 28 29 #include "device_cfg.h" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 /* ======= Defines peripheral configuration structures ======= */ 36 /* ATU driver structures */ 37 #ifdef ATU_S 38 #include "atu_rss_drv.h" 39 extern struct atu_dev_t ATU_DEV_S; 40 #endif 41 42 /* UART PL011 driver structures */ 43 #ifdef UART0_PL011_S 44 #include "uart_pl011_drv.h" 45 extern struct uart_pl011_dev_t UART0_PL011_DEV_S; 46 #endif 47 #ifdef UART0_PL011_NS 48 #include "uart_pl011_drv.h" 49 extern struct uart_pl011_dev_t UART0_PL011_DEV_NS; 50 #endif 51 52 /* ARM PPC driver structures */ 53 #ifdef PPC_RSS_MAIN0_S 54 #include "ppc_rss_drv.h" 55 extern struct ppc_rss_dev_t PPC_RSS_MAIN0_DEV_S; 56 #endif 57 58 #ifdef PPC_RSS_MAIN_EXP0_S 59 #include "ppc_rss_drv.h" 60 extern struct ppc_rss_dev_t PPC_RSS_MAIN_EXP0_DEV_S; 61 #endif 62 63 #ifdef PPC_RSS_MAIN_EXP1_S 64 #include "ppc_rss_drv.h" 65 extern struct ppc_rss_dev_t PPC_RSS_MAIN_EXP1_DEV_S; 66 #endif 67 68 #ifdef PPC_RSS_MAIN_EXP2_S 69 #include "ppc_rss_drv.h" 70 extern struct ppc_rss_dev_t PPC_RSS_MAIN_EXP2_DEV_S; 71 #endif 72 73 #ifdef PPC_RSS_MAIN_EXP3_S 74 #include "ppc_rss_drv.h" 75 extern struct ppc_rss_dev_t PPC_RSS_MAIN_EXP3_DEV_S; 76 #endif 77 78 #ifdef PPC_RSS_PERIPH0_S 79 #include "ppc_rss_drv.h" 80 extern struct ppc_rss_dev_t PPC_RSS_PERIPH0_DEV_S; 81 #endif 82 83 #ifdef PPC_RSS_PERIPH1_S 84 #include "ppc_rss_drv.h" 85 extern struct ppc_rss_dev_t PPC_RSS_PERIPH1_DEV_S; 86 #endif 87 88 #ifdef PPC_RSS_PERIPH_EXP0_S 89 #include "ppc_rss_drv.h" 90 extern struct ppc_rss_dev_t PPC_RSS_PERIPH_EXP0_DEV_S; 91 #endif 92 93 #ifdef PPC_RSS_PERIPH_EXP1_S 94 #include "ppc_rss_drv.h" 95 extern struct ppc_rss_dev_t PPC_RSS_PERIPH_EXP1_DEV_S; 96 #endif 97 98 #ifdef PPC_RSS_PERIPH_EXP2_S 99 #include "ppc_rss_drv.h" 100 extern struct ppc_rss_dev_t PPC_RSS_PERIPH_EXP2_DEV_S; 101 #endif 102 103 #ifdef PPC_RSS_PERIPH_EXP3_S 104 #include "ppc_rss_drv.h" 105 extern struct ppc_rss_dev_t PPC_RSS_PERIPH_EXP3_DEV_S; 106 #endif 107 108 /* System counters */ 109 #ifdef SYSCOUNTER_CNTRL_ARMV8_M_S 110 #include "syscounter_armv8-m_cntrl_drv.h" 111 extern struct syscounter_armv8_m_cntrl_dev_t SYSCOUNTER_CNTRL_ARMV8_M_DEV_S; 112 #endif 113 114 #ifdef SYSCOUNTER_READ_ARMV8_M_S 115 #include "syscounter_armv8-m_read_drv.h" 116 extern struct syscounter_armv8_m_read_dev_t SYSCOUNTER_READ_ARMV8_M_DEV_S; 117 #endif 118 119 /* System timers */ 120 #ifdef SYSTIMER0_ARMV8_M_S 121 #include "systimer_armv8-m_drv.h" 122 extern struct systimer_armv8_m_dev_t SYSTIMER0_ARMV8_M_DEV_S; 123 #endif 124 #ifdef SYSTIMER0_ARMV8_M_NS 125 #include "systimer_armv8-m_drv.h" 126 extern struct systimer_armv8_m_dev_t SYSTIMER0_ARMV8_M_DEV_NS; 127 #endif 128 129 #ifdef SYSTIMER1_ARMV8_M_S 130 #include "systimer_armv8-m_drv.h" 131 extern struct systimer_armv8_m_dev_t SYSTIMER1_ARMV8_M_DEV_S; 132 #endif 133 #ifdef SYSTIMER1_ARMV8_M_NS 134 #include "systimer_armv8-m_drv.h" 135 extern struct systimer_armv8_m_dev_t SYSTIMER1_ARMV8_M_DEV_NS; 136 #endif 137 138 #ifdef SYSTIMER2_ARMV8_M_S 139 #include "systimer_armv8-m_drv.h" 140 extern struct systimer_armv8_m_dev_t SYSTIMER2_ARMV8_M_DEV_S; 141 #endif 142 #ifdef SYSTIMER2_ARMV8_M_NS 143 #include "systimer_armv8-m_drv.h" 144 extern struct systimer_armv8_m_dev_t SYSTIMER2_ARMV8_M_DEV_NS; 145 #endif 146 147 #ifdef SYSTIMER3_ARMV8_M_S 148 #include "systimer_armv8-m_drv.h" 149 extern struct systimer_armv8_m_dev_t SYSTIMER3_ARMV8_M_DEV_S; 150 #endif 151 #ifdef SYSTIMER3_ARMV8_M_NS 152 #include "systimer_armv8-m_drv.h" 153 extern struct systimer_armv8_m_dev_t SYSTIMER3_ARMV8_M_DEV_NS; 154 #endif 155 156 /* System Watchdogs */ 157 #ifdef SYSWDOG_ARMV8_M_S 158 #include "syswdog_armv8-m_drv.h" 159 extern struct syswdog_armv8_m_dev_t SYSWDOG_ARMV8_M_DEV_S; 160 #endif 161 #ifdef SYSWDOG_ARMV8_M_NS 162 #include "syswdog_armv8-m_drv.h" 163 extern struct syswdog_armv8_m_dev_t SYSWDOG_ARMV8_M_DEV_NS; 164 #endif 165 166 /* ARM MPC SIE 300 driver structures */ 167 #ifdef MPC_VM0_S 168 #include "mpc_sie_drv.h" 169 extern struct mpc_sie_dev_t MPC_VM0_DEV_S; 170 #endif 171 172 #ifdef MPC_VM1_S 173 #include "mpc_sie_drv.h" 174 extern struct mpc_sie_dev_t MPC_VM1_DEV_S; 175 #endif 176 177 /* Message Handling Units (MHU) */ 178 #ifdef MHU_AP_TO_RSS 179 #include "mhu_v2_x.h" 180 extern struct mhu_v2_x_dev_t MHU_AP_TO_RSS_DEV; 181 #endif 182 183 #ifdef MHU_RSS_TO_AP 184 #include "mhu_v2_x.h" 185 extern struct mhu_v2_x_dev_t MHU_RSS_TO_AP_DEV; 186 #endif 187 188 #ifdef MHU_SCP_TO_RSS 189 #include "mhu_v2_x.h" 190 extern struct mhu_v2_x_dev_t MHU_SCP_TO_RSS_DEV; 191 #endif 192 193 #ifdef MHU_RSS_TO_SCP 194 #include "mhu_v2_x.h" 195 extern struct mhu_v2_x_dev_t MHU_RSS_TO_SCP_DEV; 196 #endif 197 198 #ifdef KMU_S 199 #include "kmu_drv.h" 200 extern struct kmu_dev_t KMU_DEV_S; 201 #endif 202 203 #ifdef LCM_S 204 #include "lcm_drv.h" 205 extern struct lcm_dev_t LCM_DEV_S; 206 #endif 207 208 #ifdef DMA350_DMA0_S 209 #include "dma350_drv.h" 210 #include "dma350_ch_drv.h" 211 extern struct dma350_dev_t DMA350_DMA0_DEV_S; 212 #endif 213 214 #ifdef DMA350_DMA0_CH0_S 215 extern struct dma350_ch_dev_t DMA350_DMA0_CH0_DEV_S; 216 #endif 217 218 #ifdef DMA350_DMA0_CH1_S 219 extern struct dma350_ch_dev_t DMA350_DMA0_CH1_DEV_S; 220 #endif 221 222 #ifdef DMA350_DMA0_CH2_S 223 extern struct dma350_ch_dev_t DMA350_DMA0_CH2_DEV_S; 224 #endif 225 226 #ifdef DMA350_DMA0_CH3_S 227 extern struct dma350_ch_dev_t DMA350_DMA0_CH3_DEV_S; 228 #endif 229 230 #ifdef __cplusplus 231 } 232 #endif 233 234 #endif /* __DEVICE_DEFINITION_H__ */ 235
