1 /* 2 * Copyright (c) 2018-2020 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __TARGET_CFG_H__ 18 #define __TARGET_CFG_H__ 19 20 #include "uart_stdout.h" 21 #include "tfm_peripherals_def.h" 22 #include "uart_pl011_drv.h" 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 #define TFM_DRIVER_STDIO Driver_USART1 29 #define NS_DRIVER_STDIO Driver_USART1 30 31 /** 32 * \brief Defines the word offsets of Slave Peripheral Protection Controller 33 * Registers 34 */ 35 enum ppc_bank_e 36 { 37 PPC_SP_DO_NOT_CONFIGURE = -1, 38 PPC_SP_AHB_PPC0 = 0, 39 PPC_SP_RES0, 40 PPC_SP_RES1, 41 PPC_SP_RES2, 42 PPC_SP_AHB_PPC_EXP0, 43 PPC_SP_AHB_PPC_EXP1, 44 PPC_SP_AHB_PPC_EXP2, 45 PPC_SP_AHB_PPC_EXP3, 46 PPC_SP_APB_PPC0, 47 PPC_SP_APB_PPC1, 48 PPC_SP_RES3, 49 PPC_SP_RES4, 50 PPC_SP_APB_PPC_EXP0, 51 PPC_SP_APB_PPC_EXP1, 52 PPC_SP_APB_PPC_EXP2, 53 PPC_SP_APB_PPC_EXP3, 54 }; 55 56 /** 57 * \brief Store the addresses of memory regions 58 */ 59 struct memory_region_limits { 60 uint32_t non_secure_code_start; 61 uint32_t non_secure_partition_base; 62 uint32_t non_secure_partition_limit; 63 uint32_t veneer_base; 64 uint32_t veneer_limit; 65 }; 66 67 /** 68 * \brief Holds the data necessary to do isolation for a specific peripheral. 69 */ 70 struct platform_data_t 71 { 72 uint32_t periph_start; 73 uint32_t periph_limit; 74 enum ppc_bank_e periph_ppc_bank; 75 int16_t periph_ppc_loc; 76 }; 77 78 /** 79 * \brief Configures the Memory Protection Controller. 80 */ 81 int32_t mpc_init_cfg(void); 82 83 /** 84 * \brief Set to secure the initialized non-secure regions of 85 * the Memory Protection Controller. 86 */ 87 void mpc_revert_non_secure_to_secure_cfg(void); 88 89 /** 90 * \brief Configures the Peripheral Protection Controller. 91 */ 92 int32_t ppc_init_cfg(void); 93 94 /** 95 * \brief Restict access to peripheral to secure 96 */ 97 void ppc_configure_to_secure(enum ppc_bank_e bank, uint16_t loc); 98 99 /** 100 * \brief Allow non-secure access to peripheral 101 */ 102 void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint16_t loc); 103 104 /** 105 * \brief Enable secure unprivileged access to peripheral 106 */ 107 void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); 108 109 /** 110 * \brief Clear secure unprivileged access to peripheral 111 */ 112 void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); 113 114 /** 115 * \brief Clears PPC interrupt. 116 */ 117 void ppc_clear_irq(void); 118 119 /** 120 * \brief Configures SAU and IDAU. 121 */ 122 void sau_and_idau_cfg(void); 123 124 /** 125 * \brief Enables the fault handlers and sets priorities. 126 * 127 * \return Returns values as specified by the \ref tfm_plat_err_t 128 */ 129 enum tfm_plat_err_t enable_fault_handlers(void); 130 131 /** 132 * \brief Configures the system reset request properties 133 * 134 * \return Returns values as specified by the \ref tfm_plat_err_t 135 */ 136 enum tfm_plat_err_t system_reset_cfg(void); 137 138 /** 139 * \brief Configures the system debug properties. 140 * 141 * \return Returns values as specified by the \ref tfm_plat_err_t 142 */ 143 enum tfm_plat_err_t init_debug(void); 144 145 /** 146 * \brief Configures all external interrupts to target the 147 * NS state, apart for the ones associated to secure 148 * peripherals (plus MPC and PPC) 149 * 150 * \return Returns values as specified by the \ref tfm_plat_err_t 151 */ 152 enum tfm_plat_err_t nvic_interrupt_target_state_cfg(void); 153 154 /** 155 * \brief This function enable the interrupts associated 156 * to the secure peripherals (plus the isolation boundary violation 157 * interrupts) 158 * 159 * \return Returns values as specified by the \ref tfm_plat_err_t 160 */ 161 enum tfm_plat_err_t nvic_interrupt_enable(void); 162 163 #ifdef __cplusplus 164 } 165 #endif 166 167 #endif /* __TARGET_CFG_H__ */ 168
