1 /*
2  * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __REGION_DEFS_H__
18 #define __REGION_DEFS_H__
19 
20 #include "flash_layout.h"
21 
22 #define BL2_HEAP_SIZE           (0x0001000)
23 #define BL2_MSP_STACK_SIZE      (0x0001800)
24 
25 #ifdef ENABLE_HEAP
26     #define S_HEAP_SIZE             (0x0000200)
27 #endif
28 
29 #define S_MSP_STACK_SIZE        (0x0000800)
30 #define S_PSP_STACK_SIZE        (0x0000800)
31 
32 #define NS_HEAP_SIZE            (0x0001000)
33 #define NS_STACK_SIZE           (0x00001E0)
34 
35 /* This size of buffer is big enough to store an attestation
36  * token produced by initial attestation service
37  */
38 #define PSA_INITIAL_ATTEST_TOKEN_MAX_SIZE   (0x250)
39 
40 /*
41  * MRAM MPC granularity is 4 KB on Musca. Alignment
42  * of partitions is defined in accordance with this constraint.
43  */
44 #ifdef BL2
45 #ifndef LINK_TO_SECONDARY_PARTITION
46 #define S_IMAGE_PRIMARY_PARTITION_OFFSET   (FLASH_AREA_0_OFFSET)
47 #define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET)
48 #else
49 #define S_IMAGE_PRIMARY_PARTITION_OFFSET   (FLASH_AREA_2_OFFSET)
50 #define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET)
51 #endif /* !LINK_TO_SECONDARY_PARTITION */
52 #else
53 #define S_IMAGE_PRIMARY_PARTITION_OFFSET (0x0)
54 #endif /* BL2 */
55 
56 #ifndef LINK_TO_SECONDARY_PARTITION
57 #define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET \
58                                            + FLASH_S_PARTITION_SIZE)
59 #else
60 #define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET \
61                                            + FLASH_S_PARTITION_SIZE)
62 #endif /* !LINK_TO_SECONDARY_PARTITION */
63 
64 /* Boot partition structure if MCUBoot is used:
65  * 0x0_0000 Bootloader header
66  * 0x0_0400 Image area
67  * 0x1_FC00 Trailer
68  */
69 /* IMAGE_CODE_SIZE is the space available for the software binary image.
70  * It is less than the FLASH_S_PARTITION_SIZE + FLASH_NS_PARTITION_SIZE
71  * because we reserve space for the image header and trailer introduced
72  * by the bootloader.
73  */
74 
75 #if (!defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1)) && \
76     (NS_IMAGE_PRIMARY_PARTITION_OFFSET > S_IMAGE_PRIMARY_PARTITION_OFFSET)
77 /* If secure image and nonsecure image are concatenated, and nonsecure image
78  * locates at the higher memory range, then the secure image does not need
79  * the trailer area.
80  */
81 #define IMAGE_S_CODE_SIZE \
82             (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE)
83 #else
84 #define IMAGE_S_CODE_SIZE \
85             (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
86 #endif
87 
88 #define IMAGE_NS_CODE_SIZE \
89             (FLASH_NS_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
90 
91 /* Alias definitions for secure and non-secure areas*/
92 #define S_ROM_ALIAS(x)  (S_ROM_ALIAS_BASE + (x))
93 #define NS_ROM_ALIAS(x) (NS_ROM_ALIAS_BASE + (x))
94 
95 #define S_RAM_ALIAS(x)  (S_RAM_ALIAS_BASE + (x))
96 #define NS_RAM_ALIAS(x) (NS_RAM_ALIAS_BASE + (x))
97 
98 /* Secure regions */
99 #define S_IMAGE_PRIMARY_AREA_OFFSET \
100              (S_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
101 #define S_CODE_START    (S_ROM_ALIAS(S_IMAGE_PRIMARY_AREA_OFFSET))
102 #define S_CODE_SIZE     (IMAGE_S_CODE_SIZE)
103 #define S_CODE_LIMIT    (S_CODE_START + S_CODE_SIZE - 1)
104 
105 #define S_DATA_START    (S_RAM_ALIAS(0x0))
106 #define S_DATA_SIZE     (TOTAL_RAM_SIZE / 2)
107 #define S_DATA_LIMIT    (S_DATA_START + S_DATA_SIZE - 1)
108 
109 /* CMSE Veneers region */
110 #define CMSE_VENEER_REGION_START (S_CODE_START + S_CODE_VECTOR_TABLE_SIZE)
111 /* Size of vector table: 111 interrupt handlers + 4 bytes MPS initial value */
112 #define S_CODE_VECTOR_TABLE_SIZE    (0x1C0)
113 
114 /* Non-secure regions */
115 #define NS_IMAGE_PRIMARY_AREA_OFFSET \
116                         (NS_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
117 #define NS_CODE_START   (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_AREA_OFFSET))
118 #define NS_CODE_SIZE    (IMAGE_NS_CODE_SIZE)
119 #define NS_CODE_LIMIT   (NS_CODE_START + NS_CODE_SIZE - 1)
120 
121 #define NS_DATA_START   (NS_RAM_ALIAS(TOTAL_RAM_SIZE / 2))
122 #define NS_DATA_SIZE    (TOTAL_RAM_SIZE / 2)
123 #define NS_DATA_LIMIT   (NS_DATA_START + NS_DATA_SIZE - 1)
124 
125 /* NS partition information is used for MPC and SAU configuration */
126 #define NS_PARTITION_START \
127             (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_PARTITION_OFFSET))
128 
129 #define NS_PARTITION_SIZE (FLASH_NS_PARTITION_SIZE)
130 
131 /* Secondary partition for new images in case of firmware upgrade */
132 #define SECONDARY_PARTITION_START \
133             (NS_ROM_ALIAS(S_IMAGE_SECONDARY_PARTITION_OFFSET))
134 #define SECONDARY_PARTITION_SIZE (FLASH_S_PARTITION_SIZE + \
135                                   FLASH_NS_PARTITION_SIZE)
136 
137 /* Code SRAM area */
138 #define TOTAL_CODE_SRAM_SIZE     (0x00080000) /* 512 KB */
139 #define S_CODE_SRAM_ALIAS_BASE   (0x1A400000)
140 #define NS_CODE_SRAM_ALIAS_BASE  (0x0A400000)
141 
142 #ifdef BL2
143 /* Bootloader regions */
144 #define BL2_CODE_START    (S_ROM_ALIAS(FLASH_AREA_BL2_OFFSET))
145 #define BL2_CODE_SIZE     (FLASH_AREA_BL2_SIZE)
146 #define BL2_CODE_LIMIT    (BL2_CODE_START + BL2_CODE_SIZE - 1)
147 
148 #define BL2_DATA_START    (S_RAM_ALIAS(0x0))
149 #define BL2_DATA_SIZE     (TOTAL_RAM_SIZE)
150 #define BL2_DATA_LIMIT    (BL2_DATA_START + BL2_DATA_SIZE - 1)
151 #endif /* BL2 */
152 
153 /* Shared data area between bootloader and runtime firmware.
154  * Shared data area is allocated at the beginning of the RAM, it is overlapping
155  * with TF-M Secure code's MSP stack
156  */
157 #define BOOT_TFM_SHARED_DATA_BASE S_RAM_ALIAS_BASE
158 #define BOOT_TFM_SHARED_DATA_SIZE (0x400)
159 #define BOOT_TFM_SHARED_DATA_LIMIT (BOOT_TFM_SHARED_DATA_BASE + \
160                                     BOOT_TFM_SHARED_DATA_SIZE - 1)
161 
162 #endif /* __REGION_DEFS_H__ */
163