1#-------------------------------------------------------------------------------
2# Copyright (c) 2021-2022, Arm Limited. All rights reserved.
3# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
4# or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
5#
6# SPDX-License-Identifier: BSD-3-Clause
7#
8#-------------------------------------------------------------------------------
9
10set(CONFIG_TFM_USE_TRUSTZONE          ON    CACHE BOOL    "Enable use of TrustZone to transition between NSPE and SPE")
11set(TFM_MULTI_CORE_TOPOLOGY           OFF   CACHE BOOL    "Whether to build for a dual-cpu architecture")
12
13set(PLATFORM_SLIH_IRQ_TEST_SUPPORT    ON    CACHE BOOL    "Platform supports SLIH IRQ tests")
14set(PLATFORM_FLIH_IRQ_TEST_SUPPORT    ON    CACHE BOOL    "Platform supports FLIH IRQ tests")
15
16# Make FLIH IRQ test as the default IRQ test on Corstone-310
17set(TEST_NS_SLIH_IRQ                  OFF   CACHE BOOL    "Whether to build NS regression Second-Level Interrupt Handling tests")
18
19if(BL2)
20    set(BL2_TRAILER_SIZE 0x800 CACHE STRING "Trailer size")
21else()
22    #No header if no bootloader, but keep IMAGE_CODE_SIZE the same
23    set(BL2_TRAILER_SIZE 0xC00 CACHE STRING "Trailer size")
24endif()
25