1 /*
2  * Copyright (c) 2019-2022 Arm Limited. All rights reserved.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __REGION_DEFS_H__
18 #define __REGION_DEFS_H__
19 
20 #include "flash_layout.h"
21 #include "platform_base_address.h"
22 
23 #define BL2_HEAP_SIZE           (0x0001000)
24 #define BL2_MSP_STACK_SIZE      (0x0001800)
25 
26 #ifdef ENABLE_HEAP
27     #define S_HEAP_SIZE             (0x0000200)
28 #endif
29 
30 #define S_MSP_STACK_SIZE        (0x0000800)
31 #define S_PSP_STACK_SIZE        (0x0000800)
32 
33 #define NS_HEAP_SIZE            (0x0001000)
34 #define NS_STACK_SIZE           (0x0001000)
35 
36 /* This size of buffer is big enough to store an attestation
37  * token produced by initial attestation service
38  */
39 #define PSA_INITIAL_ATTEST_TOKEN_MAX_SIZE   (0x250)
40 
41 #ifdef BL2
42 #ifndef LINK_TO_SECONDARY_PARTITION
43 #define S_IMAGE_PRIMARY_PARTITION_OFFSET   (FLASH_AREA_0_OFFSET)
44 #define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET)
45 #else
46 #define S_IMAGE_PRIMARY_PARTITION_OFFSET   (FLASH_AREA_2_OFFSET)
47 #define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET)
48 #endif /* !LINK_TO_SECONDARY_PARTITION */
49 #else
50 #define S_IMAGE_PRIMARY_PARTITION_OFFSET (0x0)
51 #endif /* BL2 */
52 
53 #ifndef LINK_TO_SECONDARY_PARTITION
54 #define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET \
55                                            + FLASH_S_PARTITION_SIZE)
56 #else
57 #define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET \
58                                            + FLASH_S_PARTITION_SIZE)
59 #endif /* !LINK_TO_SECONDARY_PARTITION */
60 
61 /* Boot partition structure if MCUBoot is used:
62  * 0x0_0000 Bootloader header
63  * 0x0_0400 Image area
64  * 0x5_0000 Trailer
65  */
66 /* IMAGE_CODE_SIZE is the space available for the software binary image.
67  * It is less than the FLASH_S_PARTITION_SIZE + FLASH_NS_PARTITION_SIZE
68  * because we reserve space for the image header and trailer introduced
69  * by the bootloader.
70  */
71 #if (!defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1)) && \
72     (NS_IMAGE_PRIMARY_PARTITION_OFFSET > S_IMAGE_PRIMARY_PARTITION_OFFSET)
73 /* If secure image and nonsecure image are concatenated, and nonsecure image
74  * locates at the higher memory range, then the secure image does not need
75  * the trailer area.
76  */
77 #define IMAGE_S_CODE_SIZE \
78             (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE)
79 #else
80 #define IMAGE_S_CODE_SIZE \
81             (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
82 #endif
83 
84 #define IMAGE_NS_CODE_SIZE \
85             (FLASH_NS_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
86 
87 /* Secure regions */
88 #define S_IMAGE_PRIMARY_AREA_OFFSET \
89              (S_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
90 /* Secure Code stored in Code SRAM */
91 #define S_CODE_START    ((SRAM_BASE_S) +  (S_IMAGE_PRIMARY_AREA_OFFSET))
92 #define S_CODE_SIZE     (IMAGE_S_CODE_SIZE)
93 #define S_CODE_LIMIT    (S_CODE_START + S_CODE_SIZE - 1)
94 
95 /* Secure Data stored in DTCM */
96 #define S_DATA_START    (DTCM0_BASE_S)
97 #define S_DATA_SIZE     (DTCM_BLK_SIZE * DTCM_BLK_NUM)
98 #define S_DATA_LIMIT    (S_DATA_START + S_DATA_SIZE - 1)
99 
100 /* Size of vector table: 146 interrupt handlers + 4 bytes MPS initial value */
101 #define S_CODE_VECTOR_TABLE_SIZE    (0x24C)
102 
103 /* Non-secure regions */
104 #define NS_IMAGE_PRIMARY_AREA_OFFSET \
105                         (NS_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
106 /* Non-Secure Code stored in Code SRAM memory */
107 #define NS_CODE_START   (SRAM_BASE_NS + (NS_IMAGE_PRIMARY_AREA_OFFSET))
108 #define NS_CODE_SIZE    (IMAGE_NS_CODE_SIZE)
109 #define NS_CODE_LIMIT   (NS_CODE_START + NS_CODE_SIZE - 1)
110 
111 /* Non-Secure Data stored in ISRAM0 */
112 #define NS_DATA_START   (ISRAM0_BASE_NS)
113 #define NS_DATA_SIZE    (ISRAM0_SIZE)
114 #define NS_DATA_LIMIT   (NS_DATA_START + NS_DATA_SIZE - 1)
115 
116 /* NS partition information is used for MPC and SAU configuration */
117 #define NS_PARTITION_START \
118             ((SRAM_BASE_NS) + (NS_IMAGE_PRIMARY_PARTITION_OFFSET))
119 #define NS_PARTITION_SIZE (FLASH_NS_PARTITION_SIZE)
120 
121 /* Secondary partition for new images in case of firmware upgrade */
122 #define SECONDARY_PARTITION_START \
123             ((SRAM_BASE_NS) + (S_IMAGE_SECONDARY_PARTITION_OFFSET))
124 #define SECONDARY_PARTITION_SIZE (FLASH_S_PARTITION_SIZE + \
125                                   FLASH_NS_PARTITION_SIZE)
126 
127 #ifdef BL2
128 /* Bootloader regions */
129 /* Use ITCM to store Bootloader */
130 #define BL2_CODE_START    (ITCM_BASE_S)
131 #define BL2_CODE_SIZE     (ITCM_SIZE)
132 #define BL2_CODE_LIMIT    (BL2_CODE_START + BL2_CODE_SIZE - 1)
133 
134 /* Bootloader uses same memory as for secure image */
135 #define BL2_DATA_START    (S_DATA_START)
136 #define BL2_DATA_SIZE     (S_DATA_SIZE)
137 #define BL2_DATA_LIMIT    (BL2_DATA_START + BL2_DATA_SIZE - 1)
138 #endif /* BL2 */
139 
140 /* Shared data area between bootloader and runtime firmware.
141  * Shared data area is allocated at the beginning of the RAM, it is overlapping
142  * with TF-M Secure code's MSP stack
143  */
144 #define BOOT_TFM_SHARED_DATA_BASE S_DATA_START
145 #define BOOT_TFM_SHARED_DATA_SIZE (0x400)
146 #define BOOT_TFM_SHARED_DATA_LIMIT (BOOT_TFM_SHARED_DATA_BASE + \
147                                     BOOT_TFM_SHARED_DATA_SIZE - 1)
148 
149 #endif /* __REGION_DEFS_H__ */
150