1 /* 2 * Copyright (c) 2019-2021 Arm Limited. All rights reserved. 3 * Copyright (c) 2020 Cypress Semiconductor Corporation. All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #ifndef __FLASH_LAYOUT_H__ 19 #define __FLASH_LAYOUT_H__ 20 21 /* Use the QSPI as boot flash 22 * 23 * QSPI MPC BLK_CFG register value is 0xD. 24 * Thus QSPI MPC Block size is 256 KB = 2 ^ (0xD + 5). 25 */ 26 27 /* The addresses used in the following layout are all NS alias 28 * Flash layout on MPS3 AN524 with BL2 (single image boot): 29 * 30 * 0x0000_0000 BL2 - MCUBoot (256 KB) 31 * Primary image area: 32 * 0x0004_0000 Secure image (512 KB) 33 * 0x000C_0000 Non-secure image (256 KB) 34 * Secondary image area: 35 * 0x0010_0000 Secure image (512 KB) 36 * 0x0018_0000 Non-secure image (256 KB) 37 * 0x001C_0000 PS area (20 KB) 38 * 0x001C_5000 ITS area (16 KB) 39 * 0x001C_9000 OTP / NV counters area (8 KB) 40 * 0x001C_B000 Unused 41 * 42 * Flash layout without BL2 43 * 44 * 0x0000_0000 Secure image (512 KB) 45 * 0x000C_0000 Non-secure image (256 KB) 46 * 0x001C_0000 PS area (20 KB) 47 * 0x001C_5000 ITS area (16 KB) 48 * 0x001C_9000 OTP / NV counters area (8 KB) 49 * 0x001C_B000 Unused 50 */ 51 52 /* Size of a Secure and of a Non-secure image */ 53 #define FLASH_S_PARTITION_SIZE (0x80000) /* S partition: 512 KB */ 54 #define FLASH_NS_PARTITION_SIZE (0x40000) /* NS partition: 256 KB */ 55 #define FLASH_MAX_PARTITION_SIZE ((FLASH_S_PARTITION_SIZE > \ 56 FLASH_NS_PARTITION_SIZE) ? \ 57 FLASH_S_PARTITION_SIZE : \ 58 FLASH_NS_PARTITION_SIZE) 59 60 /* Sector size of the flash hardware; same as FLASH0_SECTOR_SIZE */ 61 #define FLASH_AREA_IMAGE_SECTOR_SIZE (0x1000) /* 4 KB */ 62 /* Same as FLASH0_SIZE */ 63 #define FLASH_TOTAL_SIZE (0x800000) /* 8 MB */ 64 65 /* Flash base info for BL2 bootloader */ 66 #define FLASH_BASE_ADDRESS (0x10000000) 67 68 /* Offset to QSPI base */ 69 #define FLASH_AREA_BL2_OFFSET (0x0) 70 #define FLASH_AREA_BL2_SIZE (0x40000) /* 256 KB */ 71 72 #if !defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1) 73 /* Secure + Non-secure image primary slot */ 74 #define FLASH_AREA_0_ID (1) 75 #define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) 76 #define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE + \ 77 FLASH_NS_PARTITION_SIZE) 78 /* Secure + Non-secure secondary slot */ 79 #define FLASH_AREA_2_ID (FLASH_AREA_0_ID + 1) 80 #define FLASH_AREA_2_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) 81 #define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE + \ 82 FLASH_NS_PARTITION_SIZE) 83 /* Not used, only the Non-swapping firmware upgrade operation 84 * is supported on AN524. 85 */ 86 #define FLASH_AREA_SCRATCH_ID (FLASH_AREA_2_ID + 1) 87 #define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) 88 #define FLASH_AREA_SCRATCH_SIZE (0) 89 /* Maximum number of image sectors supported by the bootloader. */ 90 #define MCUBOOT_MAX_IMG_SECTORS ((FLASH_S_PARTITION_SIZE + \ 91 FLASH_NS_PARTITION_SIZE) / \ 92 FLASH_AREA_IMAGE_SECTOR_SIZE) 93 #elif (MCUBOOT_IMAGE_NUMBER == 2) 94 /* Secure image primary slot */ 95 #define FLASH_AREA_0_ID (1) 96 #define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) 97 #define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE) 98 /* Non-secure image primary slot */ 99 #define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1) 100 #define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) 101 #define FLASH_AREA_1_SIZE (FLASH_NS_PARTITION_SIZE) 102 /* Secure image secondary slot */ 103 #define FLASH_AREA_2_ID (FLASH_AREA_1_ID + 1) 104 #define FLASH_AREA_2_OFFSET (FLASH_AREA_1_OFFSET + FLASH_AREA_1_SIZE) 105 #define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE) 106 /* Non-secure image secondary slot */ 107 #define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1) 108 #define FLASH_AREA_3_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) 109 #define FLASH_AREA_3_SIZE (FLASH_NS_PARTITION_SIZE) 110 /* Not used, only the Non-swapping firmware upgrade operation 111 * is supported on AN524. 112 */ 113 #define FLASH_AREA_SCRATCH_ID (FLASH_AREA_3_ID + 1) 114 #define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_3_OFFSET + FLASH_AREA_3_SIZE) 115 #define FLASH_AREA_SCRATCH_SIZE (0) 116 /* Maximum number of image sectors supported by the bootloader. */ 117 #define MCUBOOT_MAX_IMG_SECTORS (FLASH_MAX_PARTITION_SIZE / \ 118 FLASH_AREA_IMAGE_SECTOR_SIZE) 119 #else /* MCUBOOT_IMAGE_NUMBER > 2 */ 120 #error "Only MCUBOOT_IMAGE_NUMBER 1 and 2 are supported!" 121 #endif /* MCUBOOT_IMAGE_NUMBER */ 122 123 /* Not used, only the Non-swapping firmware upgrade operation 124 * is supported on AN524. The maximum number of status entries 125 * supported by the bootloader. 126 */ 127 #define MCUBOOT_STATUS_MAX_ENTRIES (0) 128 129 /* Protected Storage (PS) Service definitions */ 130 #define FLASH_PS_AREA_OFFSET (FLASH_AREA_SCRATCH_OFFSET + \ 131 FLASH_AREA_SCRATCH_SIZE) 132 #define FLASH_PS_AREA_SIZE (0x5000) /* 20 KB */ 133 134 /* Internal Trusted Storage (ITS) Service definitions */ 135 #define FLASH_ITS_AREA_OFFSET (FLASH_PS_AREA_OFFSET + \ 136 FLASH_PS_AREA_SIZE) 137 #define FLASH_ITS_AREA_SIZE (0x4000) /* 16 KB */ 138 139 /* OTP_definitions */ 140 #define FLASH_OTP_NV_COUNTERS_AREA_OFFSET (FLASH_ITS_AREA_OFFSET + \ 141 FLASH_ITS_AREA_SIZE) 142 #define FLASH_OTP_NV_COUNTERS_AREA_SIZE (FLASH_AREA_IMAGE_SECTOR_SIZE * 2) 143 #define FLASH_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE 144 145 /* Offset and size definition in flash area used by assemble.py */ 146 #define SECURE_IMAGE_OFFSET (0x0) 147 #define SECURE_IMAGE_MAX_SIZE FLASH_S_PARTITION_SIZE 148 149 #define NON_SECURE_IMAGE_OFFSET (SECURE_IMAGE_OFFSET + \ 150 SECURE_IMAGE_MAX_SIZE) 151 #define NON_SECURE_IMAGE_MAX_SIZE FLASH_NS_PARTITION_SIZE 152 153 /* Flash device name used by BL2 154 * Name is defined in flash driver file: Driver_Flash.c 155 */ 156 #define FLASH_DEV_NAME Driver_FLASH0 157 /* Smallest flash programmable unit in bytes */ 158 #define TFM_HAL_FLASH_PROGRAM_UNIT (0x4) 159 160 /* Protected Storage (PS) Service definitions 161 * Note: Further documentation of these definitions can be found in the 162 * TF-M PS Integration Guide. 163 */ 164 #define TFM_HAL_PS_FLASH_DRIVER Driver_FLASH0 165 166 /* In this target the CMSIS driver requires only the offset from the base 167 * address instead of the full memory address. 168 */ 169 /* Base address of dedicated flash area for PS */ 170 #define TFM_HAL_PS_FLASH_AREA_ADDR FLASH_PS_AREA_OFFSET 171 /* Size of dedicated flash area for PS */ 172 #define TFM_HAL_PS_FLASH_AREA_SIZE FLASH_PS_AREA_SIZE 173 #define PS_RAM_FS_SIZE TFM_HAL_PS_FLASH_AREA_SIZE 174 /* Number of physical erase sectors per logical FS block */ 175 #define TFM_HAL_PS_SECTORS_PER_BLOCK (1) 176 /* Smallest flash programmable unit in bytes */ 177 #define TFM_HAL_PS_PROGRAM_UNIT (0x1) 178 179 /* Internal Trusted Storage (ITS) Service definitions 180 * Note: Further documentation of these definitions can be found in the 181 * TF-M ITS Integration Guide. The ITS should be in the internal flash, but is 182 * allocated in the external flash just for development platforms that don't 183 * have internal flash available. 184 */ 185 #define TFM_HAL_ITS_FLASH_DRIVER Driver_FLASH0 186 187 /* In this target the CMSIS driver requires only the offset from the base 188 * address instead of the full memory address. 189 */ 190 /* Base address of dedicated flash area for ITS */ 191 #define TFM_HAL_ITS_FLASH_AREA_ADDR FLASH_ITS_AREA_OFFSET 192 /* Size of dedicated flash area for ITS */ 193 #define TFM_HAL_ITS_FLASH_AREA_SIZE FLASH_ITS_AREA_SIZE 194 #define ITS_RAM_FS_SIZE TFM_HAL_ITS_FLASH_AREA_SIZE 195 /* Number of physical erase sectors per logical FS block */ 196 #define TFM_HAL_ITS_SECTORS_PER_BLOCK (1) 197 /* Smallest flash programmable unit in bytes */ 198 #define TFM_HAL_ITS_PROGRAM_UNIT (0x1) 199 200 /* OTP / NV counter definitions */ 201 #define TFM_OTP_NV_COUNTERS_AREA_SIZE (FLASH_OTP_NV_COUNTERS_AREA_SIZE / 2) 202 #define TFM_OTP_NV_COUNTERS_AREA_ADDR FLASH_OTP_NV_COUNTERS_AREA_OFFSET 203 #define TFM_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_OTP_NV_COUNTERS_SECTOR_SIZE 204 #define TFM_OTP_NV_COUNTERS_BACKUP_AREA_ADDR (TFM_OTP_NV_COUNTERS_AREA_ADDR + \ 205 TFM_OTP_NV_COUNTERS_AREA_SIZE) 206 207 /* Use Internal SRAM0~3 to store RW data 208 * ISRAM0 and ISRAM1 for Secure Data 209 * ISRAM2 and ISRAM3 for Non-Secure Data 210 */ 211 #define S_ROM_ALIAS_BASE (0x10000000) 212 #define NS_ROM_ALIAS_BASE (0x00000000) 213 214 #define S_RAM_ALIAS_BASE (0x30000000) 215 #define NS_RAM_ALIAS_BASE (0x20000000) 216 217 #define TOTAL_RAM_SIZE (0x20000) /* 128 KB */ 218 219 #endif /* __FLASH_LAYOUT_H__ */ 220
