1 /*
2 * Copyright (c) 2022, Xilinx, Inc. All rights reserved.
3 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include <assert.h>
9
10 #include <common/debug.h>
11 #include <lib/mmio.h>
12 #include <lib/psci/psci.h>
13 #include <plat/arm/common/plat_arm.h>
14 #include <plat/common/platform.h>
15 #include <plat_arm.h>
16
17 #include <plat_private.h>
18 #include "pm_api_sys.h"
19 #include "pm_client.h"
20 #include <pm_common.h>
21 #include "pm_svc_main.h"
22 #include "versal_net_def.h"
23
24 static uintptr_t versal_net_sec_entry;
25
versal_net_pwr_domain_on(u_register_t mpidr)26 static int32_t versal_net_pwr_domain_on(u_register_t mpidr)
27 {
28 uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
29 const struct pm_proc *proc;
30
31 VERBOSE("%s: mpidr: 0x%lx, cpuid: %x\n",
32 __func__, mpidr, cpu_id);
33
34 if (cpu_id == -1) {
35 return PSCI_E_INTERN_FAIL;
36 }
37
38 proc = pm_get_proc(cpu_id);
39 if (!proc) {
40 return PSCI_E_INTERN_FAIL;
41 }
42
43 pm_req_wakeup(proc->node_id, (versal_net_sec_entry & 0xFFFFFFFFU) | 0x1U,
44 versal_net_sec_entry >> 32, 0, 0);
45
46 /* Clear power down request */
47 pm_client_wakeup(proc);
48
49 return PSCI_E_SUCCESS;
50 }
51
52 /**
53 * versal_net_pwr_domain_off() - This function performs actions to turn off
54 * core.
55 * @target_state: Targeted state.
56 *
57 */
versal_net_pwr_domain_off(const psci_power_state_t * target_state)58 static void versal_net_pwr_domain_off(const psci_power_state_t *target_state)
59 {
60 uint32_t cpu_id = plat_my_core_pos();
61 const struct pm_proc *proc = pm_get_proc(cpu_id);
62
63 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
64 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
65 __func__, i, target_state->pwr_domain_state[i]);
66 }
67
68 /* Prevent interrupts from spuriously waking up this cpu */
69 plat_versal_net_gic_cpuif_disable();
70
71 /*
72 * Send request to PMC to power down the appropriate APU CPU
73 * core.
74 * According to PSCI specification, CPU_off function does not
75 * have resume address and CPU core can only be woken up
76 * invoking CPU_on function, during which resume address will
77 * be set.
78 */
79 pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0,
80 SECURE_FLAG);
81 }
82
83 /**
84 * versal_net_system_reset() - This function sends the reset request to firmware
85 * for the system to reset. This function does not
86 * return.
87 *
88 */
versal_net_system_reset(void)89 static void __dead2 versal_net_system_reset(void)
90 {
91 /* Send the system reset request to the PMC */
92 pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
93 pm_get_shutdown_scope(), SECURE_FLAG);
94
95 while (1) {
96 wfi();
97 }
98 }
99
100 /**
101 * versal_net_pwr_domain_suspend() - This function sends request to PMC to suspend
102 * core.
103 * @target_state: Targeted state.
104 *
105 */
versal_net_pwr_domain_suspend(const psci_power_state_t * target_state)106 static void versal_net_pwr_domain_suspend(const psci_power_state_t *target_state)
107 {
108 uint32_t state;
109 uint32_t cpu_id = plat_my_core_pos();
110 const struct pm_proc *proc = pm_get_proc(cpu_id);
111
112 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
113 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
114 __func__, i, target_state->pwr_domain_state[i]);
115 }
116
117 plat_versal_net_gic_cpuif_disable();
118
119 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
120 plat_versal_net_gic_save();
121 }
122
123 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
124 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
125
126 /* Send request to PMC to suspend this core */
127 pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_net_sec_entry,
128 SECURE_FLAG);
129
130 /* TODO: disable coherency */
131 }
132
versal_net_pwr_domain_on_finish(const psci_power_state_t * target_state)133 static void versal_net_pwr_domain_on_finish(const psci_power_state_t *target_state)
134 {
135 (void)target_state;
136
137 /* Enable the gic cpu interface */
138 plat_versal_net_gic_pcpu_init();
139
140 /* Program the gic per-cpu distributor or re-distributor interface */
141 plat_versal_net_gic_cpuif_enable();
142 }
143
144 /**
145 * versal_net_pwr_domain_suspend_finish() - This function performs actions to finish
146 * suspend procedure.
147 * @target_state: Targeted state.
148 *
149 */
versal_net_pwr_domain_suspend_finish(const psci_power_state_t * target_state)150 static void versal_net_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
151 {
152 uint32_t cpu_id = plat_my_core_pos();
153 const struct pm_proc *proc = pm_get_proc(cpu_id);
154
155 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
156 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
157 __func__, i, target_state->pwr_domain_state[i]);
158
159 /* Clear the APU power control register for this cpu */
160 pm_client_wakeup(proc);
161
162 /* TODO: enable coherency */
163
164 /* APU was turned off, so restore GIC context */
165 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
166 plat_versal_net_gic_resume();
167 }
168
169 plat_versal_net_gic_cpuif_enable();
170 }
171
172 /**
173 * versal_net_system_off() - This function sends the system off request
174 * to firmware. This function does not return.
175 *
176 */
versal_net_system_off(void)177 static void __dead2 versal_net_system_off(void)
178 {
179 /* Send the power down request to the PMC */
180 pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
181 pm_get_shutdown_scope(), SECURE_FLAG);
182
183 while (1) {
184 wfi();
185 }
186 }
187
188 /**
189 * versal_net_validate_power_state() - This function ensures that the power state
190 * parameter in request is valid.
191 * @power_state: Power state of core.
192 * @req_state: Requested state.
193 *
194 * Return: Returns status, either PSCI_E_SUCCESS or reason.
195 *
196 */
versal_net_validate_power_state(unsigned int power_state,psci_power_state_t * req_state)197 static int32_t versal_net_validate_power_state(unsigned int power_state,
198 psci_power_state_t *req_state)
199 {
200 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
201
202 int32_t pstate = psci_get_pstate_type(power_state);
203
204 assert(req_state);
205
206 /* Sanity check the requested state */
207 if (pstate == PSTATE_TYPE_STANDBY) {
208 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
209 } else {
210 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
211 }
212
213 /* We expect the 'state id' to be zero */
214 if (psci_get_pstate_id(power_state)) {
215 return PSCI_E_INVALID_PARAMS;
216 }
217
218 return PSCI_E_SUCCESS;
219 }
220
221 /**
222 * versal_net_get_sys_suspend_power_state() - Get power state for system
223 * suspend.
224 * @req_state: Requested state.
225 *
226 */
versal_net_get_sys_suspend_power_state(psci_power_state_t * req_state)227 static void versal_net_get_sys_suspend_power_state(psci_power_state_t *req_state)
228 {
229 uint64_t i;
230
231 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
232 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
233 }
234
235 static const struct plat_psci_ops versal_net_nopmc_psci_ops = {
236 .pwr_domain_on = versal_net_pwr_domain_on,
237 .pwr_domain_off = versal_net_pwr_domain_off,
238 .pwr_domain_on_finish = versal_net_pwr_domain_on_finish,
239 .pwr_domain_suspend = versal_net_pwr_domain_suspend,
240 .pwr_domain_suspend_finish = versal_net_pwr_domain_suspend_finish,
241 .system_off = versal_net_system_off,
242 .system_reset = versal_net_system_reset,
243 .validate_power_state = versal_net_validate_power_state,
244 .get_sys_suspend_power_state = versal_net_get_sys_suspend_power_state,
245 };
246
247 /*******************************************************************************
248 * Export the platform specific power ops.
249 ******************************************************************************/
plat_setup_psci_ops(uintptr_t sec_entrypoint,const struct plat_psci_ops ** psci_ops)250 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint,
251 const struct plat_psci_ops **psci_ops)
252 {
253 versal_net_sec_entry = sec_entrypoint;
254
255 VERBOSE("Setting up entry point %lx\n", versal_net_sec_entry);
256
257 *psci_ops = &versal_net_nopmc_psci_ops;
258
259 return 0;
260 }
261
sip_svc_setup_init(void)262 int32_t sip_svc_setup_init(void)
263 {
264 return pm_setup();
265 }
266
smc_handler(uint32_t smc_fid,uint64_t x1,uint64_t x2,uint64_t x3,uint64_t x4,void * cookie,void * handle,uint64_t flags)267 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4,
268 void *cookie, void *handle, uint64_t flags)
269 {
270 return pm_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags);
271 }
272
