1 /*
2 * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
3 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include <assert.h>
9
10 #include <common/debug.h>
11 #include <lib/mmio.h>
12 #include <lib/psci/psci.h>
13 #include <plat/arm/common/plat_arm.h>
14 #include <plat/common/platform.h>
15 #include <plat_arm.h>
16
17 #include <plat_private.h>
18 #include "pm_api_sys.h"
19 #include "pm_client.h"
20 #include <pm_common.h>
21
22 static uintptr_t versal_sec_entry;
23
versal_pwr_domain_on(u_register_t mpidr)24 static int32_t versal_pwr_domain_on(u_register_t mpidr)
25 {
26 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
27 const struct pm_proc *proc;
28
29 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
30
31 if (cpu_id == -1) {
32 return PSCI_E_INTERN_FAIL;
33 }
34
35 proc = pm_get_proc((uint32_t)cpu_id);
36
37 /* Send request to PMC to wake up selected ACPU core */
38 (void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U,
39 versal_sec_entry >> 32, 0, SECURE_FLAG);
40
41 /* Clear power down request */
42 pm_client_wakeup(proc);
43
44 return PSCI_E_SUCCESS;
45 }
46
47 /**
48 * versal_pwr_domain_suspend() - This function sends request to PMC to suspend
49 * core.
50 * @target_state: Targated state.
51 *
52 */
versal_pwr_domain_suspend(const psci_power_state_t * target_state)53 static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
54 {
55 uint32_t state;
56 uint32_t cpu_id = plat_my_core_pos();
57 const struct pm_proc *proc = pm_get_proc(cpu_id);
58
59 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
60 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
61 __func__, i, target_state->pwr_domain_state[i]);
62 }
63
64 plat_versal_gic_cpuif_disable();
65
66 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
67 plat_versal_gic_save();
68 }
69
70 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
71 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
72
73 /* Send request to PMC to suspend this core */
74 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry,
75 SECURE_FLAG);
76
77 /* APU is to be turned off */
78 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
79 /* disable coherency */
80 plat_arm_interconnect_exit_coherency();
81 }
82 }
83
84 /**
85 * versal_pwr_domain_suspend_finish() - This function performs actions to finish
86 * suspend procedure.
87 * @target_state: Targated state.
88 *
89 */
versal_pwr_domain_suspend_finish(const psci_power_state_t * target_state)90 static void versal_pwr_domain_suspend_finish(
91 const psci_power_state_t *target_state)
92 {
93 uint32_t cpu_id = plat_my_core_pos();
94 const struct pm_proc *proc = pm_get_proc(cpu_id);
95
96 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
97 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
98 __func__, i, target_state->pwr_domain_state[i]);
99 }
100
101 /* Clear the APU power control register for this cpu */
102 pm_client_wakeup(proc);
103
104 /* enable coherency */
105 plat_arm_interconnect_enter_coherency();
106
107 /* APU was turned off, so restore GIC context */
108 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
109 plat_versal_gic_resume();
110 }
111
112 plat_versal_gic_cpuif_enable();
113 }
114
versal_pwr_domain_on_finish(const psci_power_state_t * target_state)115 void versal_pwr_domain_on_finish(const psci_power_state_t *target_state)
116 {
117 /* Enable the gic cpu interface */
118 plat_versal_gic_pcpu_init();
119
120 /* Program the gic per-cpu distributor or re-distributor interface */
121 plat_versal_gic_cpuif_enable();
122 }
123
124 /**
125 * versal_system_off() - This function sends the system off request to firmware.
126 * This function does not return.
127 *
128 */
versal_system_off(void)129 static void __dead2 versal_system_off(void)
130 {
131 /* Send the power down request to the PMC */
132 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
133 pm_get_shutdown_scope(), SECURE_FLAG);
134
135 while (1) {
136 wfi();
137 }
138 }
139
140 /**
141 * versal_system_reset() - This function sends the reset request to firmware
142 * for the system to reset. This function does not
143 * return.
144 *
145 */
versal_system_reset(void)146 static void __dead2 versal_system_reset(void)
147 {
148 /* Send the system reset request to the PMC */
149 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
150 pm_get_shutdown_scope(), SECURE_FLAG);
151
152 while (1) {
153 wfi();
154 }
155 }
156
157 /**
158 * versal_pwr_domain_off() - This function performs actions to turn off core.
159 * @target_state: Targated state.
160 *
161 */
versal_pwr_domain_off(const psci_power_state_t * target_state)162 static void versal_pwr_domain_off(const psci_power_state_t *target_state)
163 {
164 uint32_t cpu_id = plat_my_core_pos();
165 const struct pm_proc *proc = pm_get_proc(cpu_id);
166
167 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
168 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
169 __func__, i, target_state->pwr_domain_state[i]);
170 }
171
172 /* Prevent interrupts from spuriously waking up this cpu */
173 plat_versal_gic_cpuif_disable();
174
175 /*
176 * Send request to PMC to power down the appropriate APU CPU
177 * core.
178 * According to PSCI specification, CPU_off function does not
179 * have resume address and CPU core can only be woken up
180 * invoking CPU_on function, during which resume address will
181 * be set.
182 */
183 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0,
184 SECURE_FLAG);
185 }
186
187 /**
188 * versal_validate_power_state() - This function ensures that the power state
189 * parameter in request is valid.
190 * @power_state: Power state of core.
191 * @req_state: Requested state.
192 *
193 * Return: Returns status, either success or reason.
194 *
195 */
versal_validate_power_state(uint32_t power_state,psci_power_state_t * req_state)196 static int32_t versal_validate_power_state(uint32_t power_state,
197 psci_power_state_t *req_state)
198 {
199 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
200
201 uint32_t pstate = psci_get_pstate_type(power_state);
202
203 assert(req_state);
204
205 /* Sanity check the requested state */
206 if (pstate == PSTATE_TYPE_STANDBY) {
207 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
208 } else {
209 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
210 }
211
212 /* We expect the 'state id' to be zero */
213 if (psci_get_pstate_id(power_state) != 0U) {
214 return PSCI_E_INVALID_PARAMS;
215 }
216
217 return PSCI_E_SUCCESS;
218 }
219
220 /**
221 * versal_get_sys_suspend_power_state() - Get power state for system suspend.
222 * @req_state: Requested state.
223 *
224 */
versal_get_sys_suspend_power_state(psci_power_state_t * req_state)225 static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state)
226 {
227 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE;
228 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE;
229 }
230
231 static const struct plat_psci_ops versal_nopmc_psci_ops = {
232 .pwr_domain_on = versal_pwr_domain_on,
233 .pwr_domain_off = versal_pwr_domain_off,
234 .pwr_domain_on_finish = versal_pwr_domain_on_finish,
235 .pwr_domain_suspend = versal_pwr_domain_suspend,
236 .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish,
237 .system_off = versal_system_off,
238 .system_reset = versal_system_reset,
239 .validate_power_state = versal_validate_power_state,
240 .get_sys_suspend_power_state = versal_get_sys_suspend_power_state,
241 };
242
243 /*******************************************************************************
244 * Export the platform specific power ops.
245 ******************************************************************************/
plat_setup_psci_ops(uintptr_t sec_entrypoint,const struct plat_psci_ops ** psci_ops)246 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint,
247 const struct plat_psci_ops **psci_ops)
248 {
249 versal_sec_entry = sec_entrypoint;
250
251 *psci_ops = &versal_nopmc_psci_ops;
252
253 return 0;
254 }
255
