1#
2# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
3#
4# Copyright (c) 2017-2023 Nuvoton Ltd.
5#
6# SPDX-License-Identifier: BSD-3-Clause
7#
8
9# This is a debug flag for bring-up. It allows reducing CPU numbers
10# SECONDARY_BRINGUP	:=	1
11RESET_TO_BL31	:=	1
12SPMD_SPM_AT_SEL2	:= 0
13#temporary until the RAM size is reduced
14USE_COHERENT_MEM	:=	1
15
16
17$(eval $(call add_define,RESET_TO_BL31))
18
19ifeq (${ARCH}, aarch64)
20# On ARM standard platorms, the TSP can execute from Trusted SRAM,
21# Trusted DRAM (if available) or the TZC secured area of DRAM.
22# TZC secured DRAM is the default.
23
24# Process ARM_BL31_IN_DRAM flag
25ARM_BL31_IN_DRAM	:=	0
26$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
27$(eval $(call add_define,ARM_BL31_IN_DRAM))
28endif
29
30# For the original power-state parameter format, the State-ID can be encoded
31# according to the recommended encoding or zero. This flag determines which
32# State-ID encoding to be parsed.
33ARM_RECOM_STATE_ID_ENC	:=	0
34
35# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC
36# need to be set. Else throw a build error.
37ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
38ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
39$(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
40	PSCI_EXTENDED_STATE_ID is set for ARM platforms)
41endif
42endif
43
44# Process ARM_RECOM_STATE_ID_ENC flag
45$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
46$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
47
48# Process ARM_DISABLE_TRUSTED_WDOG flag
49# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
50ARM_DISABLE_TRUSTED_WDOG	:=	0
51ifeq (${SPIN_ON_BL1_EXIT}, 1)
52ARM_DISABLE_TRUSTED_WDOG	:=	1
53endif
54$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
55$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
56
57# Process ARM_CONFIG_CNTACR
58ARM_CONFIG_CNTACR	:=	1
59$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
60$(eval $(call add_define,ARM_CONFIG_CNTACR))
61
62# Process ARM_BL31_IN_DRAM flag
63ARM_BL31_IN_DRAM	:=	0
64$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
65$(eval $(call add_define,ARM_BL31_IN_DRAM))
66
67# Process ARM_PLAT_MT flag
68ARM_PLAT_MT	:=	0
69$(eval $(call assert_boolean,ARM_PLAT_MT))
70$(eval $(call add_define,ARM_PLAT_MT))
71
72# Use translation tables library v2 by default
73ARM_XLAT_TABLES_LIB_V1	:=	0
74$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
75$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
76
77# Don't have the Linux kernel as a BL33 image by default
78ARM_LINUX_KERNEL_AS_BL33	:=	0
79$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
80$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
81
82ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
83ifeq (${ARCH},aarch64)
84ifneq (${RESET_TO_BL31},1)
85$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_BL31=1.")
86endif
87else
88ifneq (${RESET_TO_SP_MIN},1)
89$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
90endif
91endif
92
93ifndef PRELOADED_BL33_BASE
94$(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
95endif
96
97ifndef ARM_PRELOADED_DTB_BASE
98$(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
99endif
100
101$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
102endif
103
104# Use an implementation of SHA-256 with a smaller memory footprint
105# but reduced speed.
106$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
107
108# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
109# in the FIP if the platform requires.
110ifneq ($(BL32_EXTRA1),)
111$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
112endif
113ifneq ($(BL32_EXTRA2),)
114$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
115endif
116
117# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
118ENABLE_PSCI_STAT	:=	1
119ENABLE_PMF		:=	1
120
121# On ARM platforms, separate the code and read-only data sections to allow
122# mapping the former as executable and the latter as execute-never.
123SEPARATE_CODE_AND_RODATA	:=	1
124
125# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
126# and NOBITS sections of BL31 image are adjacent to each other and loaded
127# into Trusted SRAM.
128SEPARATE_NOBITS_REGION	:=	0
129
130# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
131# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
132# the build to require that ARM_BL31_IN_DRAM is enabled as well.
133ifeq ($(SEPARATE_NOBITS_REGION),1)
134ifneq ($(ARM_BL31_IN_DRAM),1)
135$(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
136endif
137
138ifneq ($(RECLAIM_INIT_CODE),0)
139$(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
140endif
141endif
142
143# Enable PIE support for RESET_TO_BL31 case
144ifeq (${RESET_TO_BL31},1)
145ENABLE_PIE	:=	1
146endif
147
148PLAT_INCLUDES	:=	-Iinclude/plat/nuvoton/npcm845x \
149		-Iinclude/plat/nuvoton/common \
150		-Iinclude/drivers/nuvoton/npcm845x \
151
152ifeq (${ARCH}, aarch64)
153PLAT_INCLUDES	+=	-Iinclude/plat/arm/common/aarch64
154endif
155
156# Include GICv3 driver files
157include drivers/arm/gic/v2/gicv2.mk
158
159NPCM850_GIC_SOURCES	:=	${GICV2_SOURCES}
160
161BL31_SOURCES	+=lib/cpus/aarch64/cortex_a35.S \
162		plat/common/plat_psci_common.c \
163		drivers/ti/uart/aarch64/16550_console.S \
164		plat/nuvoton/npcm845x/npcm845x_psci.c \
165		plat/nuvoton/npcm845x/npcm845x_serial_port.c \
166		plat/nuvoton/common/nuvoton_topology.c \
167		plat/nuvoton/npcm845x/npcm845x_bl31_setup.c
168
169PLAT_BL_COMMON_SOURCES	:=	drivers/delay_timer/delay_timer.c \
170		drivers/delay_timer/generic_delay_timer.c \
171		plat/common/plat_gicv2.c \
172		plat/arm/common/arm_gicv2.c \
173		plat/nuvoton/common/plat_nuvoton_gic.c \
174		${NPCM850_GIC_SOURCES} \
175		plat/nuvoton/npcm845x/npcm845x_common.c \
176		plat/nuvoton/common/nuvoton_helpers.S \
177		lib/semihosting/semihosting.c \
178		lib/semihosting/${ARCH}/semihosting_call.S \
179		plat/arm/common/arm_common.c \
180		plat/arm/common/arm_console.c
181
182ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
183PLAT_BL_COMMON_SOURCES	+=	lib/xlat_tables/xlat_tables_common.c \
184		lib/xlat_tables/${ARCH}/xlat_tables.c
185else
186include lib/xlat_tables_v2/xlat_tables.mk
187
188PLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
189endif
190
191ARM_IO_SOURCES	+=	plat/arm/common/arm_io_storage.c \
192		plat/arm/common/fconf/arm_fconf_io.c
193
194ifeq (${SPD},spmd)
195ifeq (${SPMD_SPM_AT_SEL2},1)
196ARM_IO_SOURCES	+=	plat/arm/common/fconf/arm_fconf_sp.c
197endif
198endif
199
200BL1_SOURCES	+=	drivers/io/io_fip.c \
201		drivers/io/io_memmap.c \
202		drivers/io/io_storage.c \
203		plat/arm/common/arm_bl1_setup.c \
204		plat/arm/common/arm_err.c \
205		${ARM_IO_SOURCES}
206
207ifdef EL3_PAYLOAD_BASE
208# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs
209# from their holding pen
210BL1_SOURCES	+=	plat/arm/common/arm_pm.c
211endif
212
213BL2_SOURCES	+=	drivers/delay_timer/delay_timer.c \
214		drivers/delay_timer/generic_delay_timer.c \
215		drivers/io/io_fip.c \
216		drivers/io/io_memmap.c \
217		drivers/io/io_storage.c \
218		plat/arm/common/arm_bl2_setup.c \
219		plat/arm/common/arm_err.c \
220		${ARM_IO_SOURCES}
221
222# Firmware Configuration Framework sources
223include lib/fconf/fconf.mk
224
225# Add `libfdt` and Arm common helpers required for Dynamic Config
226include lib/libfdt/libfdt.mk
227
228DYN_CFG_SOURCES	+=	plat/arm/common/arm_dyn_cfg.c \
229		plat/arm/common/arm_dyn_cfg_helpers.c \
230		common/fdt_wrappers.c
231
232BL1_SOURCES	+=	${DYN_CFG_SOURCES}
233BL2_SOURCES	+=	${DYN_CFG_SOURCES}
234
235ifeq (${BL2_AT_EL3},1)
236BL2_SOURCES	+=	plat/arm/common/arm_bl2_el3_setup.c
237endif
238
239# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
240# the AArch32 descriptors.
241BL2_SOURCES	+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
242BL2_SOURCES	+=	plat/arm/common/arm_image_load.c \
243		common/desc_image_load.c
244
245ifeq (${SPD},opteed)
246BL2_SOURCES	+=	lib/optee/optee_utils.c
247endif
248
249BL2U_SOURCES	+=	drivers/delay_timer/delay_timer.c \
250		drivers/delay_timer/generic_delay_timer.c \
251		plat/arm/common/arm_bl2u_setup.c
252
253BL31_SOURCES	+=	plat/arm/common/arm_bl31_setup.c \
254		plat/nuvoton/common/nuvoton_pm.c \
255		plat/nuvoton/common/nuvoton_topology.c \
256		plat/common/plat_psci_common.c
257
258ifeq (${ENABLE_PMF}, 1)
259ifeq (${ARCH}, aarch64)
260BL31_SOURCES	+=	plat/arm/common/aarch64/execution_state_switch.c \
261		plat/arm/common/arm_sip_svc.c \
262		plat/arm/common/plat_arm_sip_svc.c \
263		lib/pmf/pmf_smc.c
264else
265BL32_SOURCES	+=	plat/arm/common/arm_sip_svc.c \
266		plat/arm/common/plat_arm_sip_svc.c \
267		lib/pmf/pmf_smc.c
268endif
269endif
270
271ifeq (${EL3_EXCEPTION_HANDLING},1)
272BL31_SOURCES	+=	plat/arm/common/aarch64/arm_ehf.c
273endif
274
275ifeq (${SDEI_SUPPORT},1)
276BL31_SOURCES	+=	plat/arm/common/aarch64/arm_sdei.c
277ifeq (${SDEI_IN_FCONF},1)
278BL31_SOURCES	+=	plat/arm/common/fconf/fconf_sdei_getter.c
279endif
280endif
281
282# RAS sources
283ifeq (${RAS_EXTENSION},1)
284BL31_SOURCES	+=	lib/extensions/ras/std_err_record.c \
285		lib/extensions/ras/ras_common.c
286endif
287
288# Pointer Authentication sources
289ifeq (${ENABLE_PAUTH}, 1)
290PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c
291endif
292
293ifeq (${SPD},spmd)
294BL31_SOURCES	+=	plat/common/plat_spmd_manifest.c \
295		common/fdt_wrappers.c \
296		${LIBFDT_SRCS}
297endif
298
299ifneq (${TRUSTED_BOARD_BOOT},0)
300# Include common TBB sources
301AUTH_SOURCES	:=	drivers/auth/auth_mod.c \
302		drivers/auth/crypto_mod.c \
303		drivers/auth/img_parser_mod.c \
304		lib/fconf/fconf_tbbr_getter.c
305
306# Include the selected chain of trust sources.
307ifeq (${COT},tbbr)
308AUTH_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c
309BL1_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_bl1.c
310BL2_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_bl2.c
311else ifeq (${COT},dualroot)
312AUTH_SOURCES	+=	drivers/auth/dualroot/cot.c
313else
314$(error Unknown chain of trust ${COT})
315endif
316
317BL1_SOURCES	+=	${AUTH_SOURCES} \
318		bl1/tbbr/tbbr_img_desc.c \
319		plat/arm/common/arm_bl1_fwu.c \
320		plat/common/tbbr/plat_tbbr.c
321
322BL2_SOURCES	+=	${AUTH_SOURCES} \
323		plat/common/tbbr/plat_tbbr.c
324
325$(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
326
327# We expect to locate the *.mk files under the directories specified below
328CRYPTO_LIB_MK	:=	drivers/auth/mbedtls/mbedtls_crypto.mk
329
330IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
331
332$(info Including ${CRYPTO_LIB_MK})
333include ${CRYPTO_LIB_MK}
334
335$(info Including ${IMG_PARSER_LIB_MK})
336include ${IMG_PARSER_LIB_MK}
337endif
338
339ifeq (${MEASURED_BOOT},1)
340MEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk
341$(info Including ${MEASURED_BOOT_MK})
342include ${MEASURED_BOOT_MK}
343endif
344
345ifeq (${EL3_EXCEPTION_HANDLING},1)
346BL31_SOURCES	+=	plat/arm/common/aarch64/arm_ehf.c
347endif
348
349BL1_SOURCES	:=
350BL2_SOURCES	:=
351BL2U_SOURCES	:=
352
353DEBUG_CONSOLE	?=	0
354$(eval $(call add_define,DEBUG_CONSOLE))
355