1 /*
2  * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /****************************************************************
8  * Auto generated by DE, please DO NOT modify this file directly.
9  *****************************************************************/
10 
11 #ifndef MT_SPM_PMIC_WRAP_H
12 #define MT_SPM_PMIC_WRAP_H
13 
14 enum pmic_wrap_phase_id {
15 	PMIC_WRAP_PHASE_ALLINONE = 0,
16 	NR_PMIC_WRAP_PHASE,
17 };
18 
19 /* IDX mapping */
20 enum {
21 	CMD_0 = 0,	/* PMIC_WRAP_PHASE_ALLINONE */
22 	CMD_1,
23 	CMD_2,
24 	CMD_3,
25 	CMD_4,
26 	CMD_5,
27 	CMD_6,
28 	CMD_7,
29 	CMD_8,
30 	CMD_9,
31 	CMD_10,
32 	CMD_11,
33 	CMD_12,
34 	CMD_13,
35 	CMD_14,
36 	CMD_15,
37 	NR_IDX_ALL,
38 };
39 
40 /* APIs */
41 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
42 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, unsigned int idx,
43 			      unsigned int cmd_wdata);
44 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, unsigned int idx);
45 void mt_spm_dump_pmic_warp_reg(void);
46 
47 #endif /* MT_SPM_PMIC_WRAP_H */
48