1 /*
2 * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <common/debug.h>
9 #include <drivers/spm/mt_spm_resource_req.h>
10 #include <lib/pm/mtk_pm.h>
11 #include <lpm/mt_lp_api.h>
12 #include <lpm/mt_lp_rm.h>
13 #include <mt_spm.h>
14 #include <mt_spm_cond.h>
15 #include <mt_spm_conservation.h>
16 #include <mt_spm_constraint.h>
17 #include <mt_spm_idle.h>
18 #include <mt_spm_internal.h>
19 #include <mt_spm_notifier.h>
20 #include "mt_spm_rc_api.h"
21 #include "mt_spm_rc_internal.h"
22 #include <mt_spm_reg.h>
23 #include <mt_spm_suspend.h>
24
25 #define CONSTRAINT_SYSPLL_ALLOW (MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF | \
26 MT_RM_CONSTRAINT_ALLOW_DRAM_S0 | \
27 MT_RM_CONSTRAINT_ALLOW_DRAM_S1 | \
28 MT_RM_CONSTRAINT_ALLOW_VCORE_LP)
29
30 #define CONSTRAINT_SYSPLL_PCM_FLAG (SPM_FLAG_DISABLE_INFRA_PDN | \
31 SPM_FLAG_DISABLE_VCORE_DVS | \
32 SPM_FLAG_DISABLE_VCORE_DFS | \
33 SPM_FLAG_SRAM_SLEEP_CTRL | \
34 SPM_FLAG_KEEP_CSYSPWRACK_HIGH | \
35 SPM_FLAG_ENABLE_6315_CTRL | \
36 SPM_FLAG_DISABLE_DRAMC_MCU_SRAM_SLEEP | \
37 SPM_FLAG_USE_SRCCLKENO2)
38
39 #define CONSTRAINT_SYSPLL_PCM_FLAG1 (0)
40
41 /* If sspm sram won't enter sleep voltage then vcore couldn't enter low power mode */
42 #if defined(MTK_PLAT_SPM_SRAM_SLP_UNSUPPORT) && SPM_SRAM_SLEEP_RC_RES_RESTRICT
43 #define CONSTRAINT_SYSPLL_RESOURCE_REQ (MT_SPM_26M)
44 #else
45 #define CONSTRAINT_SYSPLL_RESOURCE_REQ (MT_SPM_26M)
46 #endif
47
48 static unsigned int syspll_ext_opand2;
49 static unsigned short ext_status_syspll;
50
51 static struct mt_spm_cond_tables cond_syspll = {
52 .name = "syspll",
53 .table_cg = {
54 0xFF5DD002, /* MTCMOS1 */
55 0x0000003C, /* MTCMOS2 */
56 0x27AF8000, /* INFRA0 */
57 0x20010876, /* INFRA1 */
58 0x86000640, /* INFRA2 */
59 0x30008020, /* INFRA3 */
60 0x80000000, /* INFRA4 */
61 0x01002A0B, /* PERI0 */
62 0x00090000, /* VPPSYS0_0 */
63 0x38FF3E69, /* VPPSYS0_1 */
64 0xF0081450, /* VPPSYS1_0 */
65 0x00003000, /* VPPSYS1_1 */
66 0x00000000, /* VDOSYS0_0 */
67 0x00000000, /* VDOSYS0_1 */
68 0x000001FF, /* VDOSYS1_0 */
69 0x008001E0, /* VDOSYS1_1 */
70 0x00FB0007, /* VDOSYS1_2 */
71 },
72 .table_pll = 0U,
73 };
74
75 static struct mt_spm_cond_tables cond_syspll_res = {
76 .table_cg = { 0U },
77 .table_pll = 0U,
78 };
79
80 static struct constraint_status status = {
81 .id = MT_RM_CONSTRAINT_ID_SYSPLL,
82 .is_valid = (MT_SPM_RC_VALID_SW |
83 MT_SPM_RC_VALID_COND_CHECK |
84 MT_SPM_RC_VALID_COND_LATCH |
85 MT_SPM_RC_VALID_XSOC_BBLPM |
86 MT_SPM_RC_VALID_TRACE_TIME),
87 .is_cond_block = 0U,
88 .enter_cnt = 0U,
89 .cond_res = &cond_syspll_res,
90 .residency = 0ULL,
91 };
92
spm_syspll_conduct(int state_id,struct spm_lp_scen * spm_lp,unsigned int * resource_req)93 int spm_syspll_conduct(int state_id, struct spm_lp_scen *spm_lp, unsigned int *resource_req)
94 {
95 unsigned int res_req = CONSTRAINT_SYSPLL_RESOURCE_REQ;
96
97 if ((spm_lp == NULL) || (resource_req == NULL)) {
98 return -1;
99 }
100
101 spm_lp->pwrctrl->pcm_flags = (uint32_t)CONSTRAINT_SYSPLL_PCM_FLAG;
102 spm_lp->pwrctrl->pcm_flags1 = (uint32_t)CONSTRAINT_SYSPLL_PCM_FLAG1;
103
104 *resource_req |= res_req;
105 return 0;
106 }
107
spm_is_valid_rc_syspll(unsigned int cpu,int state_id)108 bool spm_is_valid_rc_syspll(unsigned int cpu, int state_id)
109 {
110 return (!(status.is_cond_block && (status.is_valid & MT_SPM_RC_VALID_COND_CHECK) > 0) &&
111 IS_MT_RM_RC_READY(status.is_valid) &&
112 (IS_PLAT_SUSPEND_ID(state_id) ||
113 (state_id == MT_PLAT_PWR_STATE_SYSTEM_PLL) ||
114 (state_id == MT_PLAT_PWR_STATE_SYSTEM_BUS)));
115 }
116
update_rc_condition(int state_id,const void * val)117 static int update_rc_condition(int state_id, const void *val)
118 {
119 int res = MT_RM_STATUS_OK;
120
121 const struct mt_spm_cond_tables * const tlb =
122 (const struct mt_spm_cond_tables * const)val;
123 const struct mt_spm_cond_tables *tlb_check =
124 (const struct mt_spm_cond_tables *)&cond_syspll;
125
126 if (tlb == NULL) {
127 return MT_RM_STATUS_BAD;
128 }
129
130 status.is_cond_block = mt_spm_cond_check(state_id, tlb, tlb_check,
131 (status.is_valid & MT_SPM_RC_VALID_COND_LATCH) ?
132 &cond_syspll_res : NULL);
133 return res;
134 }
135
update_rc_clkbuf_status(const void * val)136 static void update_rc_clkbuf_status(const void *val)
137 {
138 unsigned int is_flight = (val) ? !!(*((unsigned int *)val) == FLIGHT_MODE_ON) : 0;
139
140 if (is_flight != 0U) {
141 spm_rc_constraint_valid_set(MT_RM_CONSTRAINT_ID_SYSPLL,
142 MT_RM_CONSTRAINT_ID_SYSPLL,
143 MT_SPM_RC_VALID_FLIGHTMODE,
144 (struct constraint_status * const)&status);
145 } else {
146 spm_rc_constraint_valid_clr(MT_RM_CONSTRAINT_ID_SYSPLL,
147 MT_RM_CONSTRAINT_ID_SYSPLL,
148 MT_SPM_RC_VALID_FLIGHTMODE,
149 (struct constraint_status * const)&status);
150 }
151 }
152
update_rc_ufs_status(const void * val)153 static void update_rc_ufs_status(const void *val)
154 {
155 unsigned int is_ufs_h8 = (val) ? !!(*((unsigned int *)val) == UFS_REF_CLK_OFF) : 0;
156
157 if (is_ufs_h8 != 0U) {
158 spm_rc_constraint_valid_set(MT_RM_CONSTRAINT_ID_SYSPLL,
159 MT_RM_CONSTRAINT_ID_SYSPLL,
160 MT_SPM_RC_VALID_UFS_H8,
161 (struct constraint_status * const)&status);
162 } else {
163 spm_rc_constraint_valid_clr(MT_RM_CONSTRAINT_ID_SYSPLL,
164 MT_RM_CONSTRAINT_ID_SYSPLL,
165 MT_SPM_RC_VALID_UFS_H8,
166 (struct constraint_status * const)&status);
167 }
168 }
169
update_rc_usb_peri(const void * val)170 static void update_rc_usb_peri(const void *val)
171 {
172 int *flag = (int *)val;
173
174 if (flag == NULL) {
175 return;
176 }
177
178 if (*flag != 0) {
179 SPM_RC_BITS_SET(syspll_ext_opand2, MT_SPM_EX_OP_PERI_ON);
180 } else {
181 SPM_RC_BITS_CLR(syspll_ext_opand2, MT_SPM_EX_OP_PERI_ON);
182 }
183 }
184
update_rc_usb_infra(const void * val)185 static void update_rc_usb_infra(const void *val)
186 {
187 int *flag = (int *)val;
188
189 if (flag == NULL) {
190 return;
191 }
192
193 if (*flag != 0) {
194 SPM_RC_BITS_SET(syspll_ext_opand2, MT_SPM_EX_OP_INFRA_ON);
195 } else {
196 SPM_RC_BITS_CLR(syspll_ext_opand2, MT_SPM_EX_OP_INFRA_ON);
197 }
198 }
199
update_rc_status(const void * val)200 static void update_rc_status(const void *val)
201 {
202 const struct rc_common_state *st;
203
204 st = (const struct rc_common_state *)val;
205
206 if (st == NULL) {
207 return;
208 }
209
210 if (st->type == CONSTRAINT_UPDATE_COND_CHECK) {
211 struct mt_spm_cond_tables * const tlb = &cond_syspll;
212
213 spm_rc_condition_modifier(st->id, st->act, st->value,
214 MT_RM_CONSTRAINT_ID_SYSPLL, tlb);
215 } else if ((st->type == CONSTRAINT_UPDATE_VALID) ||
216 (st->type == CONSTRAINT_RESIDNECY)) {
217 spm_rc_constraint_status_set(st->id, st->type, st->act,
218 MT_RM_CONSTRAINT_ID_SYSPLL,
219 (struct constraint_status * const)st->value,
220 (struct constraint_status * const)&status);
221 } else {
222 INFO("[%s:%d] - Unknown type: 0x%x\n", __func__, __LINE__, st->type);
223 }
224 }
225
spm_update_rc_syspll(int state_id,int type,const void * val)226 int spm_update_rc_syspll(int state_id, int type, const void *val)
227 {
228 int res = MT_RM_STATUS_OK;
229
230 switch (type) {
231 case PLAT_RC_UPDATE_CONDITION:
232 res = update_rc_condition(state_id, val);
233 break;
234 case PLAT_RC_CLKBUF_STATUS:
235 update_rc_clkbuf_status(val);
236 break;
237 case PLAT_RC_UFS_STATUS:
238 update_rc_ufs_status(val);
239 break;
240 case PLAT_RC_IS_USB_PERI:
241 update_rc_usb_peri(val);
242 break;
243 case PLAT_RC_IS_USB_INFRA:
244 update_rc_usb_infra(val);
245 break;
246 case PLAT_RC_STATUS:
247 update_rc_status(val);
248 break;
249 default:
250 INFO("[%s:%d] - Do nothing for type: %d\n", __func__, __LINE__, type);
251 break;
252 }
253 return res;
254 }
255
spm_allow_rc_syspll(int state_id)256 unsigned int spm_allow_rc_syspll(int state_id)
257 {
258 return CONSTRAINT_SYSPLL_ALLOW;
259 }
260
spm_run_rc_syspll(unsigned int cpu,int state_id)261 int spm_run_rc_syspll(unsigned int cpu, int state_id)
262 {
263 unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT;
264 unsigned int allows = CONSTRAINT_SYSPLL_ALLOW;
265
266 ext_status_syspll = status.is_valid;
267
268 if (IS_MT_SPM_RC_BBLPM_MODE(ext_status_syspll)) {
269 #ifdef MT_SPM_USING_SRCLKEN_RC
270 ext_op |= MT_SPM_EX_OP_SRCLKEN_RC_BBLPM;
271 #else
272 allows |= MT_RM_CONSTRAINT_ALLOW_BBLPM;
273 #endif
274 }
275
276 #ifndef MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT
277 mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_ENTER, allows | (IS_PLAT_SUSPEND_ID(state_id) ?
278 MT_RM_CONSTRAINT_ALLOW_AP_SUSPEND : 0));
279 #else
280 (void)allows;
281 #endif
282 if (ext_status_syspll & MT_SPM_RC_VALID_TRACE_TIME) {
283 ext_op |= MT_SPM_EX_OP_TRACE_TIMESTAMP_EN;
284 }
285
286 if (IS_PLAT_SUSPEND_ID(state_id)) {
287 mt_spm_suspend_enter(state_id,
288 (syspll_ext_opand2 | MT_SPM_EX_OP_CLR_26M_RECORD |
289 MT_SPM_EX_OP_SET_WDT | MT_SPM_EX_OP_HW_S1_DETECT |
290 MT_SPM_EX_OP_SET_SUSPEND_MODE),
291 CONSTRAINT_SYSPLL_RESOURCE_REQ);
292 } else {
293 mt_spm_idle_generic_enter(state_id, ext_op, spm_syspll_conduct);
294 }
295
296 return 0;
297 }
298
spm_reset_rc_syspll(unsigned int cpu,int state_id)299 int spm_reset_rc_syspll(unsigned int cpu, int state_id)
300 {
301 unsigned int ext_op = MT_SPM_EX_OP_HW_S1_DETECT;
302 unsigned int allows = CONSTRAINT_SYSPLL_ALLOW;
303
304 if (IS_MT_SPM_RC_BBLPM_MODE(ext_status_syspll)) {
305 #ifdef MT_SPM_USING_SRCLKEN_RC
306 ext_op |= MT_SPM_EX_OP_SRCLKEN_RC_BBLPM;
307 #else
308 allows |= MT_RM_CONSTRAINT_ALLOW_BBLPM;
309 #endif
310 }
311
312 #ifndef MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT
313 mt_spm_sspm_notify_u32(MT_SPM_NOTIFY_LP_LEAVE, allows);
314 #else
315 (void)allows;
316 #endif
317 if (ext_status_syspll & MT_SPM_RC_VALID_TRACE_TIME) {
318 ext_op |= MT_SPM_EX_OP_TRACE_TIMESTAMP_EN;
319 }
320
321 if (IS_PLAT_SUSPEND_ID(state_id)) {
322 mt_spm_suspend_resume(state_id,
323 (syspll_ext_opand2 | MT_SPM_EX_OP_SET_SUSPEND_MODE |
324 MT_SPM_EX_OP_SET_WDT | MT_SPM_EX_OP_HW_S1_DETECT),
325 NULL);
326 } else {
327 struct wake_status *waken = NULL;
328
329 if (spm_unlikely(status.is_valid & MT_SPM_RC_VALID_TRACE_EVENT)) {
330 ext_op |= MT_SPM_EX_OP_TRACE_LP;
331 }
332
333 mt_spm_idle_generic_resume(state_id, ext_op, &waken, NULL);
334 status.enter_cnt++;
335
336 if (spm_unlikely(status.is_valid & MT_SPM_RC_VALID_RESIDNECY)) {
337 status.residency += (waken != NULL) ? waken->tr.comm.timer_out : 0;
338 }
339 }
340
341 return 0;
342 }
343
spm_get_status_rc_syspll(unsigned int type,void * priv)344 int spm_get_status_rc_syspll(unsigned int type, void *priv)
345 {
346 int ret = MT_RM_STATUS_OK;
347
348 if (type == PLAT_RC_STATUS) {
349 int res = 0;
350 struct rc_common_state *st = (struct rc_common_state *)priv;
351
352 if (st == NULL) {
353 return MT_RM_STATUS_BAD;
354 }
355
356 res = spm_rc_constraint_status_get(st->id, st->type, st->act,
357 MT_RM_CONSTRAINT_ID_SYSPLL,
358 (struct constraint_status * const)&status,
359 (struct constraint_status * const)st->value);
360 if ((res == 0) && (st->id != MT_RM_CONSTRAINT_ID_ALL)) {
361 ret = MT_RM_STATUS_STOP;
362 }
363 }
364 return ret;
365 }
366
