1# 2# Copyright (c) 2020-2023, Arm Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Making sure the Morello platform type is specified 8ifeq ($(filter ${TARGET_PLATFORM}, fvp soc),) 9 $(error TARGET_PLATFORM must be fvp or soc) 10endif 11 12MORELLO_BASE := plat/arm/board/morello 13 14INTERCONNECT_SOURCES := ${MORELLO_BASE}/morello_interconnect.c 15 16PLAT_INCLUDES := -I${MORELLO_BASE}/include 17 18MORELLO_CPU_SOURCES := lib/cpus/aarch64/rainier.S 19 20# GIC-600 configuration 21GICV3_SUPPORT_GIC600 := 1 22 23# Include GICv3 driver files 24include drivers/arm/gic/v3/gicv3.mk 25 26MORELLO_GIC_SOURCES := ${GICV3_SOURCES} \ 27 plat/common/plat_gicv3.c \ 28 plat/arm/common/arm_gicv3.c \ 29 30PLAT_BL_COMMON_SOURCES := ${MORELLO_BASE}/morello_plat.c \ 31 ${MORELLO_BASE}/aarch64/morello_helper.S 32 33BL1_SOURCES := ${MORELLO_CPU_SOURCES} \ 34 ${INTERCONNECT_SOURCES} \ 35 ${MORELLO_BASE}/morello_err.c \ 36 ${MORELLO_BASE}/morello_trusted_boot.c \ 37 ${MORELLO_BASE}/morello_bl1_setup.c \ 38 drivers/arm/sbsa/sbsa.c 39 40BL2_SOURCES := ${MORELLO_BASE}/morello_security.c \ 41 ${MORELLO_BASE}/morello_err.c \ 42 ${MORELLO_BASE}/morello_trusted_boot.c \ 43 ${MORELLO_BASE}/morello_bl2_setup.c \ 44 ${MORELLO_BASE}/morello_image_load.c \ 45 lib/utils/mem_region.c \ 46 drivers/arm/css/sds/sds.c 47 48BL31_SOURCES := ${MORELLO_CPU_SOURCES} \ 49 ${INTERCONNECT_SOURCES} \ 50 ${MORELLO_GIC_SOURCES} \ 51 ${MORELLO_BASE}/morello_bl31_setup.c \ 52 ${MORELLO_BASE}/morello_pm.c \ 53 ${MORELLO_BASE}/morello_topology.c \ 54 ${MORELLO_BASE}/morello_security.c \ 55 drivers/arm/css/sds/sds.c 56 57FDT_SOURCES += fdts/morello-${TARGET_PLATFORM}.dts \ 58 ${MORELLO_BASE}/fdts/morello_fw_config.dts \ 59 ${MORELLO_BASE}/fdts/morello_tb_fw_config.dts \ 60 ${MORELLO_BASE}/fdts/morello_nt_fw_config.dts 61 62FW_CONFIG := ${BUILD_PLAT}/fdts/morello_fw_config.dtb 63HW_CONFIG := ${BUILD_PLAT}/fdts/morello-${TARGET_PLATFORM}.dtb 64TB_FW_CONFIG := ${BUILD_PLAT}/fdts/morello_tb_fw_config.dtb 65NT_FW_CONFIG := ${BUILD_PLAT}/fdts/morello_nt_fw_config.dtb 66 67# Add the FW_CONFIG to FIP and specify the same to certtool 68$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 69# Add the HW_CONFIG to FIP and specify the same to certtool 70$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG})) 71# Add the TB_FW_CONFIG to FIP and specify the same to certtool 72$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 73# Add the NT_FW_CONFIG to FIP and specify the same to certtool 74$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) 75 76MORELLO_FW_NVCTR_VAL := 0 77TFW_NVCTR_VAL := ${MORELLO_FW_NVCTR_VAL} 78NTFW_NVCTR_VAL := ${MORELLO_FW_NVCTR_VAL} 79 80# TF-A not required to load the SCP Images 81override CSS_LOAD_SCP_IMAGES := 0 82 83override NEED_BL2U := no 84 85# 32 bit mode not supported 86override CTX_INCLUDE_AARCH32_REGS := 0 87 88override ARM_PLAT_MT := 1 89 90override ARM_BL31_IN_DRAM := 1 91 92override PSCI_EXTENDED_STATE_ID := 1 93override ARM_RECOM_STATE_ID_ENC := 1 94 95# Errata workarounds: 96ERRATA_N1_1868343 := 1 97 98# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 99# SCP during power management operations and for SCP RAM Firmware transfer. 100CSS_USE_SCMI_SDS_DRIVER := 1 101 102# System coherency is managed in hardware 103HW_ASSISTED_COHERENCY := 1 104 105# When building for systems with hardware-assisted coherency, there's no need to 106# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 107USE_COHERENT_MEM := 0 108 109# Add TARGET_PLATFORM to differentiate between Morello FVP and Morello SoC platform 110$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM}))) 111 112# Add MORELLO_FW_NVCTR_VAL 113$(eval $(call add_define,MORELLO_FW_NVCTR_VAL)) 114 115include plat/arm/common/arm_common.mk 116include plat/arm/css/common/css_common.mk 117include plat/arm/board/common/board_common.mk 118