1 /*
2  * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <common/debug.h>
10 #include <common/desc_image_load.h>
11 #include <drivers/arm/sp804_delay_timer.h>
12 #include <lib/fconf/fconf.h>
13 #include <lib/fconf/fconf_dyn_cfg_getter.h>
14 #include <lib/transfer_list.h>
15 
16 #include <plat/arm/common/plat_arm.h>
17 #include <plat/common/platform.h>
18 #include <platform_def.h>
19 
20 #include "fvp_private.h"
21 
22 static struct transfer_list_header *ns_tl __unused;
23 
bl2_early_platform_setup2(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)24 void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3)
25 {
26 	arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
27 
28 	/* Initialize the platform config for future decision making */
29 	fvp_config_setup();
30 }
31 
bl2_platform_setup(void)32 void bl2_platform_setup(void)
33 {
34 	arm_bl2_platform_setup();
35 
36 #if TRANSFER_LIST
37 	ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE, FW_HANDOFF_SIZE);
38 	assert(ns_tl != NULL);
39 #endif
40 	/* Initialize System level generic or SP804 timer */
41 	fvp_timer_init();
42 }
43 
44 /*******************************************************************************
45  * This function returns the list of executable images
46  ******************************************************************************/
plat_get_next_bl_params(void)47 struct bl_params *plat_get_next_bl_params(void)
48 {
49 	struct bl_params *arm_bl_params;
50 	const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
51 	struct transfer_list_entry *te __unused;
52 	bl_mem_params_node_t *param_node __unused;
53 
54 	arm_bl_params = arm_get_next_bl_params();
55 
56 #if !RESET_TO_BL2 && !EL3_PAYLOAD_BASE
57 	const struct dyn_cfg_dtb_info_t *fw_config_info;
58 	uintptr_t fw_config_base = 0UL;
59 
60 #if __aarch64__
61 	/* Get BL31 image node */
62 	param_node = get_bl_mem_params_node(BL31_IMAGE_ID);
63 #else /* aarch32 */
64 	/* Get SP_MIN image node */
65 	param_node = get_bl_mem_params_node(BL32_IMAGE_ID);
66 #endif /* __aarch64__ */
67 	assert(param_node != NULL);
68 
69 	/* Update the next image's ep info with the FW config address */
70 	fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID);
71 	assert(fw_config_info != NULL);
72 
73 	fw_config_base = fw_config_info->config_addr;
74 	assert(fw_config_base != 0UL);
75 
76 	param_node->ep_info.args.arg1 = (uint32_t)fw_config_base;
77 
78 	/* Update BL33's ep info with the NS HW config address */
79 	param_node = get_bl_mem_params_node(BL33_IMAGE_ID);
80 	assert(param_node != NULL);
81 
82 #if TRANSFER_LIST
83 	/* Update BL33's ep info with NS HW config address  */
84 	te = transfer_list_find(ns_tl, TL_TAG_FDT);
85 	assert(te != NULL);
86 
87 	param_node->ep_info.args.arg1 = TRANSFER_LIST_SIGNATURE |
88 					REGISTER_CONVENTION_VERSION_MASK;
89 	param_node->ep_info.args.arg2 = 0;
90 	param_node->ep_info.args.arg3 = (uintptr_t)ns_tl;
91 	param_node->ep_info.args.arg0 =
92 		te ? (uintptr_t)transfer_list_entry_data(te) : 0;
93 #else
94 	hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
95 	assert(hw_config_info != NULL);
96 
97 	param_node->ep_info.args.arg1 = hw_config_info->secondary_config_addr;
98 #endif /* TRANSFER_LIST */
99 #endif /* !RESET_TO_BL2 && !EL3_PAYLOAD_BASE */
100 
101 	return arm_bl_params;
102 }
103 
bl2_plat_handle_post_image_load(unsigned int image_id)104 int bl2_plat_handle_post_image_load(unsigned int image_id)
105 {
106 #if !RESET_TO_BL2 && !EL3_PAYLOAD_BASE
107 	if (image_id == HW_CONFIG_ID) {
108 		const struct dyn_cfg_dtb_info_t *hw_config_info;
109 		struct transfer_list_entry *te __unused;
110 
111 		const bl_mem_params_node_t *param_node =
112 			get_bl_mem_params_node(image_id);
113 		assert(param_node != NULL);
114 
115 		hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
116 		assert(hw_config_info != NULL);
117 
118 #if TRANSFER_LIST
119 		/* Update BL33's ep info with NS HW config address  */
120 		te = transfer_list_add(ns_tl, TL_TAG_FDT,
121 				       param_node->image_info.image_size,
122 				       (void *)hw_config_info->config_addr);
123 		assert(te != NULL);
124 #else
125 		memcpy((void *)hw_config_info->secondary_config_addr,
126 		       (void *)hw_config_info->config_addr,
127 		       (size_t)param_node->image_info.image_size);
128 
129 		/*
130 		 * Ensure HW-config device tree is committed to memory, as the HW-Config
131 		 * might be used without cache and MMU enabled at BL33.
132 		 */
133 		flush_dcache_range(hw_config_info->secondary_config_addr,
134 				   param_node->image_info.image_size);
135 #endif /* TRANSFER_LIST */
136 	}
137 #endif /* !RESET_TO_BL2 && !EL3_PAYLOAD_BASE */
138 
139 	return arm_bl2_plat_handle_post_image_load(image_id);
140 }
141