1STM32MP1 2======== 3 4STM32MP1 is a microprocessor designed by STMicroelectronics 5based on Arm Cortex-A7. 6It is an Armv7-A platform, using dedicated code from TF-A. 7More information can be found on `STM32MP1 Series`_ page. 8 9For TF-A common configuration of STM32 MPUs, please check 10:ref:`STM32 MPUs` page. 11 12STM32MP1 Versions 13----------------- 14 15There are 2 variants for STM32MP1: STM32MP13 and STM32MP15 16 17STM32MP13 Versions 18~~~~~~~~~~~~~~~~~~ 19The STM32MP13 series is available in 3 different lines which are pin-to-pin compatible: 20 21- STM32MP131: Single Cortex-A7 core 22- STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1 23- STM32MP135: STM32MP133 + DCMIPP, LTDC 24 25Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 26 27- A Cortex-A7 @ 650 MHz 28- C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz 29- D Cortex-A7 @ 900 MHz 30- F Secure Boot + HW Crypto + Cortex-A7 @ 900 MHz 31 32STM32MP15 Versions 33~~~~~~~~~~~~~~~~~~ 34The STM32MP15 series is available in 3 different lines which are pin-to-pin compatible: 35 36- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD 37- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD 38- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz 39 40Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 41 42- A Basic + Cortex-A7 @ 650 MHz 43- C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz 44- D Basic + Cortex-A7 @ 800 MHz 45- F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz 46 47The `STM32MP1 part number codification`_ page gives more information about part numbers. 48 49Memory mapping 50-------------- 51 52:: 53 54 0x00000000 +-----------------+ 55 | | ROM 56 0x00020000 +-----------------+ 57 | | 58 | ... | 59 | | 60 0x2FFC0000 +-----------------+ \ 61 | BL32 DTB | | 62 0x2FFC5000 +-----------------+ | 63 | BL32 | | 64 0x2FFDF000 +-----------------+ | 65 | ... | | 66 0x2FFE3000 +-----------------+ | 67 | BL2 DTB | | Embedded SRAM 68 0x2FFEA000 +-----------------+ | 69 | BL2 | | 70 0x2FFFF000 +-----------------+ | 71 | SCMI mailbox | | 72 0x30000000 +-----------------+ / 73 | | 74 | ... | 75 | | 76 0x40000000 +-----------------+ 77 | | 78 | | Devices 79 | | 80 0xC0000000 +-----------------+ \ 81 | | | 82 0xC0100000 +-----------------+ | 83 | BL33 | | Non-secure RAM (DDR) 84 | ... | | 85 | | | 86 0xFFFFFFFF +-----------------+ / 87 88 89Build Instructions 90------------------ 91 92STM32MP1x specific flags 93~~~~~~~~~~~~~~~~~~~~~~~~ 94 95Dedicated STM32MP1 flags: 96 97- | ``STM32_TF_VERSION``: to manage BL2 monotonic counter. 98 | Default: 0 99- | ``STM32MP13``: to select STM32MP13 variant configuration. 100 | Default: 0 101- | ``STM32MP15``: to select STM32MP15 variant configuration. 102 | Default: 1 103 104 105Boot with FIP 106~~~~~~~~~~~~~ 107You need to build BL2, BL32 (SP_min or OP-TEE) and BL33 (U-Boot) before building FIP binary. 108 109U-Boot 110______ 111 112.. code:: bash 113 114 cd <u-boot_directory> 115 make stm32mp15_trusted_defconfig 116 make DEVICE_TREE=stm32mp157c-ev1 all 117 118OP-TEE (optional) 119_________________ 120 121.. code:: bash 122 123 cd <optee_directory> 124 make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \ 125 CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts 126 127 128TF-A BL32 (SP_min) 129__________________ 130If you choose not to use OP-TEE, you can use TF-A SP_min. 131To build TF-A BL32, and its device tree file: 132 133.. code:: bash 134 135 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 136 AARCH32_SP=sp_min DTB_FILE_NAME=stm32mp157c-ev1.dtb bl32 dtbs 137 138TF-A BL2 139________ 140To build TF-A BL2 with its STM32 header for SD-card boot: 141 142.. code:: bash 143 144 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 145 DTB_FILE_NAME=stm32mp157c-ev1.dtb STM32MP_SDMMC=1 146 147For other boot devices, you have to replace STM32MP_SDMMC in the previous command 148with the desired device flag. 149 150This BL2 is independent of the BL32 used (SP_min or OP-TEE) 151 152 153FIP 154___ 155With BL32 SP_min: 156 157.. code:: bash 158 159 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 160 AARCH32_SP=sp_min \ 161 DTB_FILE_NAME=stm32mp157c-ev1.dtb \ 162 BL33=<u-boot_directory>/u-boot-nodtb.bin \ 163 BL33_CFG=<u-boot_directory>/u-boot.dtb \ 164 fip 165 166With OP-TEE: 167 168.. code:: bash 169 170 make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \ 171 AARCH32_SP=optee \ 172 DTB_FILE_NAME=stm32mp157c-ev1.dtb \ 173 BL33=<u-boot_directory>/u-boot-nodtb.bin \ 174 BL33_CFG=<u-boot_directory>/u-boot.dtb \ 175 BL32=<optee_directory>/tee-header_v2.bin \ 176 BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin 177 BL32_EXTRA2=<optee_directory>/tee-pageable_v2.bin 178 fip 179 180Trusted Boot Board 181__________________ 182 183.. code:: shell 184 185 tools/cert_create/cert_create -n --rot-key build/stm32mp1/release/rot_key.pem \ 186 --tfw-nvctr 0 \ 187 --ntfw-nvctr 0 \ 188 --key-alg ecdsa --hash-alg sha256 \ 189 --trusted-key-cert build/stm32mp1/release/trusted_key.crt \ 190 --tos-fw <optee_directory>/tee-header_v2.bin \ 191 --tos-fw-extra1 <optee_directory>/tee-pager_v2.bin \ 192 --tos-fw-extra2 <optee_directory>/tee-pageable_v2.bin \ 193 --tos-fw-cert build/stm32mp1/release/tos_fw_content.crt \ 194 --tos-fw-key-cert build/stm32mp1/release/tos_fw_key.crt \ 195 --nt-fw <u-boot_directory>/u-boot-nodtb.bin \ 196 --nt-fw-cert build/stm32mp1/release/nt_fw_content.crt \ 197 --nt-fw-key-cert build/stm32mp1/release/nt_fw_key.crt \ 198 --hw-config <u-boot_directory>/u-boot.dtb \ 199 --fw-config build/stm32mp1/release/fdts/fw-config.dtb \ 200 --stm32mp-cfg-cert build/stm32mp1/release/stm32mp_cfg_cert.crt 201 202 tools/fiptool/fiptool create --tos-fw <optee_directory>/tee-header_v2.bin \ 203 --tos-fw-extra1 <optee_directory>/tee-pager_v2.bin \ 204 --tos-fw-extra2 <optee_directory>/tee-pageable_v2.bin \ 205 --nt-fw <u-boot_directory>/u-boot-nodtb.bin \ 206 --hw-config <u-boot_directory>/u-boot.dtb \ 207 --fw-config build/stm32mp1/release/fdts/fw-config.dtb \ 208 --trusted-key-cert build/stm32mp1/release/trusted_key.crt \ 209 --tos-fw-cert build/stm32mp1/release/tos_fw_content.crt \ 210 --tos-fw-key-cert build/stm32mp1/release/tos_fw_key.crt \ 211 --nt-fw-cert build/stm32mp1/release/nt_fw_content.crt \ 212 --nt-fw-key-cert build/stm32mp1/release/nt_fw_key.crt \ 213 --stm32mp-cfg-cert build/stm32mp1/release/stm32mp_cfg_cert.crt \ 214 build/stm32mp1/release/stm32mp1.fip 215 216 217.. _STM32MP1 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html 218.. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#Part_number_codification 219 220*Copyright (c) 2023, STMicroelectronics - All Rights Reserved* 221