1 /* 2 * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef ZYNQMP_PM_API_SYS_H 9 #define ZYNQMP_PM_API_SYS_H 10 11 #include <stdint.h> 12 13 #include "pm_defs.h" 14 #include "zynqmp_pm_defs.h" 15 16 enum pm_query_ids { 17 PM_QID_INVALID, 18 PM_QID_CLOCK_GET_NAME, 19 PM_QID_CLOCK_GET_TOPOLOGY, 20 PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, 21 PM_QID_CLOCK_GET_PARENTS, 22 PM_QID_CLOCK_GET_ATTRIBUTES, 23 PM_QID_PINCTRL_GET_NUM_PINS, 24 PM_QID_PINCTRL_GET_NUM_FUNCTIONS, 25 PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS, 26 PM_QID_PINCTRL_GET_FUNCTION_NAME, 27 PM_QID_PINCTRL_GET_FUNCTION_GROUPS, 28 PM_QID_PINCTRL_GET_PIN_GROUPS, 29 PM_QID_CLOCK_GET_NUM_CLOCKS, 30 PM_QID_CLOCK_GET_MAX_DIVISOR, 31 }; 32 33 enum pm_register_access_id { 34 CONFIG_REG_WRITE, 35 CONFIG_REG_READ, 36 }; 37 38 /* 39 * Assigning of argument values into array elements. 40 */ 41 #define PM_PACK_PAYLOAD1(pl, arg0) { \ 42 pl[0] = (uint32_t)(arg0); \ 43 } 44 45 #define PM_PACK_PAYLOAD2(pl, arg0, arg1) { \ 46 pl[1] = (uint32_t)(arg1); \ 47 PM_PACK_PAYLOAD1(pl, arg0); \ 48 } 49 50 #define PM_PACK_PAYLOAD3(pl, arg0, arg1, arg2) { \ 51 pl[2] = (uint32_t)(arg2); \ 52 PM_PACK_PAYLOAD2(pl, arg0, arg1); \ 53 } 54 55 #define PM_PACK_PAYLOAD4(pl, arg0, arg1, arg2, arg3) { \ 56 pl[3] = (uint32_t)(arg3); \ 57 PM_PACK_PAYLOAD3(pl, arg0, arg1, arg2); \ 58 } 59 60 #define PM_PACK_PAYLOAD5(pl, arg0, arg1, arg2, arg3, arg4) { \ 61 pl[4] = (uint32_t)(arg4); \ 62 PM_PACK_PAYLOAD4(pl, arg0, arg1, arg2, arg3); \ 63 } 64 65 #define PM_PACK_PAYLOAD6(pl, arg0, arg1, arg2, arg3, arg4, arg5) { \ 66 pl[5] = (uint32_t)(arg5); \ 67 PM_PACK_PAYLOAD5(pl, arg0, arg1, arg2, arg3, arg4); \ 68 } 69 70 /********************************************************** 71 * System-level API function declarations 72 **********************************************************/ 73 enum pm_ret_status pm_req_suspend(enum pm_node_id target, 74 enum pm_request_ack ack, 75 uint32_t latency, 76 uint32_t state); 77 78 enum pm_ret_status pm_self_suspend(enum pm_node_id nid, 79 uint32_t latency, 80 uint32_t state, 81 uintptr_t address); 82 83 enum pm_ret_status pm_force_powerdown(enum pm_node_id target, 84 enum pm_request_ack ack); 85 86 enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason); 87 88 enum pm_ret_status pm_req_wakeup(enum pm_node_id target, 89 uint32_t set_address, 90 uintptr_t address, 91 enum pm_request_ack ack); 92 93 enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target, 94 enum pm_node_id wkup_node, 95 uint32_t enable); 96 97 enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype); 98 99 /* API functions for managing PM Slaves */ 100 enum pm_ret_status pm_req_node(enum pm_node_id nid, 101 uint32_t capabilities, 102 uint32_t qos, 103 enum pm_request_ack ack); 104 105 enum pm_ret_status pm_set_requirement(enum pm_node_id nid, 106 uint32_t capabilities, 107 uint32_t qos, 108 enum pm_request_ack ack); 109 110 /* Miscellaneous API functions */ 111 enum pm_ret_status pm_get_api_version(uint32_t *version); 112 enum pm_ret_status pm_get_node_status(enum pm_node_id nid, 113 uint32_t *ret_buff); 114 115 /* Direct-Control API functions */ 116 enum pm_ret_status pm_mmio_write(uintptr_t address, 117 uint32_t mask, 118 uint32_t value); 119 enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value); 120 enum pm_ret_status pm_fpga_load(uint32_t address_low, 121 uint32_t address_high, 122 uint32_t size, 123 uint32_t flags); 124 enum pm_ret_status pm_fpga_get_status(uint32_t *value); 125 126 enum pm_ret_status pm_get_chipid(uint32_t *value); 127 enum pm_ret_status pm_secure_rsaaes(uint32_t address_low, 128 uint32_t address_high, 129 uint32_t size, 130 uint32_t flags); 131 uint32_t pm_get_shutdown_scope(void); 132 enum pm_ret_status pm_get_callbackdata(uint32_t *data, size_t count); 133 enum pm_ret_status pm_ioctl(enum pm_node_id nid, 134 uint32_t ioctl_id, 135 uint32_t arg1, 136 uint32_t arg2, 137 uint32_t *value); 138 enum pm_ret_status pm_clock_enable(uint32_t clock_id); 139 enum pm_ret_status pm_clock_disable(uint32_t clock_id); 140 enum pm_ret_status pm_clock_getstate(uint32_t clock_id, 141 uint32_t *state); 142 enum pm_ret_status pm_clock_setdivider(uint32_t clock_id, 143 uint32_t divider); 144 enum pm_ret_status pm_clock_getdivider(uint32_t clock_id, 145 uint32_t *divider); 146 enum pm_ret_status pm_clock_setparent(uint32_t clock_id, 147 uint32_t parent_index); 148 enum pm_ret_status pm_clock_getparent(uint32_t clock_id, 149 uint32_t *parent_index); 150 void pm_query_data(enum pm_query_ids qid, uint32_t arg1, uint32_t arg2, 151 uint32_t arg3, uint32_t *data); 152 enum pm_ret_status pm_sha_hash(uint32_t address_high, 153 uint32_t address_low, 154 uint32_t size, 155 uint32_t flags); 156 enum pm_ret_status pm_rsa_core(uint32_t address_high, 157 uint32_t address_low, 158 uint32_t size, 159 uint32_t flags); 160 enum pm_ret_status pm_secure_image(uint32_t address_low, 161 uint32_t address_high, 162 uint32_t key_lo, 163 uint32_t key_hi, 164 uint32_t *value); 165 enum pm_ret_status pm_fpga_read(uint32_t reg_numframes, 166 uint32_t address_low, 167 uint32_t address_high, 168 uint32_t readback_type, 169 uint32_t *value); 170 enum pm_ret_status pm_aes_engine(uint32_t address_high, 171 uint32_t address_low, 172 uint32_t *value); 173 enum pm_ret_status pm_register_access(uint32_t register_access_id, 174 uint32_t address, 175 uint32_t mask, 176 uint32_t value, 177 uint32_t *out); 178 enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid, 179 enum pm_pll_param param_id, 180 uint32_t value); 181 enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid, 182 enum pm_pll_param param_id, 183 uint32_t *value); 184 enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode); 185 enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode); 186 enum pm_ret_status pm_efuse_access(uint32_t address_high, 187 uint32_t address_low, uint32_t *value); 188 enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version, 189 uint32_t *bit_mask, uint8_t len); 190 enum pm_ret_status check_api_dependency(uint8_t id); 191 192 #endif /* ZYNQMP_PM_API_SYS_H */ 193
