1 /*
2 * Copyright 2021 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #include <assert.h>
9 #include <errno.h>
10 #include <stddef.h>
11 #include <stdint.h>
12 #include <stdio.h>
13 #include <stdlib.h>
14 #include <string.h>
15
16 #include <platform_def.h>
17 #include <common/debug.h>
18 #ifndef NXP_COINED_BB
19 #include <flash_info.h>
20 #include <fspi.h>
21 #include <fspi_api.h>
22 #endif
23 #include <lib/mmio.h>
24 #ifdef NXP_COINED_BB
25 #include <snvs.h>
26 #else
27 #include <xspi_error_codes.h>
28 #endif
29
30 #include <plat_nv_storage.h>
31
32 /*This structure will be a static structure and
33 * will be populated as first step of BL2 booting-up.
34 * fspi_strorage.c . To be located in the fspi driver folder.
35 */
36
37 static nv_app_data_t nv_app_data;
38
read_nv_app_data(void)39 int read_nv_app_data(void)
40 {
41 int ret = 0;
42
43 #ifdef NXP_COINED_BB
44 uint8_t *nv_app_data_array = (uint8_t *) &nv_app_data;
45 uint8_t offset = 0U;
46
47 ret = snvs_read_app_data();
48 do {
49 nv_app_data_array[offset] = snvs_read_app_data_bit(offset);
50 offset++;
51
52 } while (offset < APP_DATA_MAX_OFFSET);
53 snvs_clear_app_data();
54 #else
55 uintptr_t nv_base_addr = NV_STORAGE_BASE_ADDR;
56
57 ret = fspi_init(NXP_FLEXSPI_ADDR, NXP_FLEXSPI_FLASH_ADDR);
58
59 if (ret != XSPI_SUCCESS) {
60 ERROR("Failed to initialized driver flexspi-nor.\n");
61 ERROR("exiting warm-reset request.\n");
62 return -ENODEV;
63 }
64
65 xspi_read(nv_base_addr,
66 (uint32_t *)&nv_app_data, sizeof(nv_app_data_t));
67 xspi_sector_erase((uint32_t) nv_base_addr,
68 F_SECTOR_ERASE_SZ);
69 #endif
70 return ret;
71 }
72
wr_nv_app_data(int data_offset,uint8_t * data,int data_size)73 int wr_nv_app_data(int data_offset,
74 uint8_t *data,
75 int data_size)
76 {
77 int ret = 0;
78 #ifdef NXP_COINED_BB
79 #if !TRUSTED_BOARD_BOOT
80 snvs_disable_zeroize_lp_gpr();
81 #endif
82 /* In case LP SecMon General purpose register,
83 * only 1 bit flags can be saved.
84 */
85 if ((data_size > 1) || (*data != DEFAULT_SET_VALUE)) {
86 ERROR("Only binary value is allowed to be written.\n");
87 ERROR("Use flash instead of SNVS GPR as NV location.\n");
88 return -ENODEV;
89 }
90 snvs_write_app_data_bit(data_offset);
91 #else
92 uint8_t read_val[sizeof(nv_app_data_t)];
93 uint8_t ready_to_write_val[sizeof(nv_app_data_t)];
94 uintptr_t nv_base_addr = NV_STORAGE_BASE_ADDR;
95
96 assert((nv_base_addr + data_offset + data_size) <= (nv_base_addr + F_SECTOR_ERASE_SZ));
97
98 ret = fspi_init(NXP_FLEXSPI_ADDR, NXP_FLEXSPI_FLASH_ADDR);
99
100 if (ret != XSPI_SUCCESS) {
101 ERROR("Failed to initialized driver flexspi-nor.\n");
102 ERROR("exiting warm-reset request.\n");
103 return -ENODEV;
104 }
105
106 ret = xspi_read(nv_base_addr + data_offset, (uint32_t *)read_val, data_size);
107
108 memset(ready_to_write_val, READY_TO_WRITE_VALUE, ARRAY_SIZE(ready_to_write_val));
109
110 if (memcmp(read_val, ready_to_write_val, data_size) == 0) {
111 xspi_write(nv_base_addr + data_offset, data, data_size);
112 }
113 #endif
114
115 return ret;
116 }
117
get_nv_data(void)118 const nv_app_data_t *get_nv_data(void)
119 {
120 return (const nv_app_data_t *) &nv_app_data;
121 }
122
