1 /*
2  * Copyright (c) 2022, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef MTK_DCM_UTILS_H
8 #define MTK_DCM_UTILS_H
9 
10 #include <stdbool.h>
11 
12 #include <mtk_dcm.h>
13 #include <platform_def.h>
14 
15 /* Base */
16 #define MP_CPUSYS_TOP_BASE	(MCUCFG_BASE + 0x8000)
17 #define CPCCFG_REG_BASE		(MCUCFG_BASE + 0xA800)
18 
19 /* Register Definition */
20 #define CPCCFG_REG_EMI_WFIFO		(CPCCFG_REG_BASE + 0x100)
21 #define MP_CPUSYS_TOP_CPU_PLLDIV_CFG0	(MP_CPUSYS_TOP_BASE + 0x22a0)
22 #define MP_CPUSYS_TOP_CPU_PLLDIV_CFG1	(MP_CPUSYS_TOP_BASE + 0x22a4)
23 #define MP_CPUSYS_TOP_BUS_PLLDIV_CFG	(MP_CPUSYS_TOP_BASE + 0x22e0)
24 #define MP_CPUSYS_TOP_MCSIC_DCM0	(MP_CPUSYS_TOP_BASE + 0x2440)
25 #define MP_CPUSYS_TOP_MP_ADB_DCM_CFG0	(MP_CPUSYS_TOP_BASE + 0x2500)
26 #define MP_CPUSYS_TOP_MP_ADB_DCM_CFG4	(MP_CPUSYS_TOP_BASE + 0x2510)
27 #define MP_CPUSYS_TOP_MP_MISC_DCM_CFG0	(MP_CPUSYS_TOP_BASE + 0x2518)
28 #define MP_CPUSYS_TOP_MCUSYS_DCM_CFG0	(MP_CPUSYS_TOP_BASE + 0x25c0)
29 #define MP_CPUSYS_TOP_MP0_DCM_CFG0	(MP_CPUSYS_TOP_BASE + 0x4880)
30 #define MP_CPUSYS_TOP_MP0_DCM_CFG7	(MP_CPUSYS_TOP_BASE + 0x489c)
31 
32 /* MP_CPUSYS_TOP */
33 bool dcm_mp_cpusys_top_adb_dcm_is_on(void);
34 void dcm_mp_cpusys_top_adb_dcm(bool on);
35 bool dcm_mp_cpusys_top_apb_dcm_is_on(void);
36 void dcm_mp_cpusys_top_apb_dcm(bool on);
37 bool dcm_mp_cpusys_top_bus_pll_div_dcm_is_on(void);
38 void dcm_mp_cpusys_top_bus_pll_div_dcm(bool on);
39 bool dcm_mp_cpusys_top_core_stall_dcm_is_on(void);
40 void dcm_mp_cpusys_top_core_stall_dcm(bool on);
41 bool dcm_mp_cpusys_top_cpubiu_dcm_is_on(void);
42 void dcm_mp_cpusys_top_cpubiu_dcm(bool on);
43 bool dcm_mp_cpusys_top_cpu_pll_div_0_dcm_is_on(void);
44 void dcm_mp_cpusys_top_cpu_pll_div_0_dcm(bool on);
45 bool dcm_mp_cpusys_top_cpu_pll_div_1_dcm_is_on(void);
46 void dcm_mp_cpusys_top_cpu_pll_div_1_dcm(bool on);
47 bool dcm_mp_cpusys_top_fcm_stall_dcm_is_on(void);
48 void dcm_mp_cpusys_top_fcm_stall_dcm(bool on);
49 bool dcm_mp_cpusys_top_last_cor_idle_dcm_is_on(void);
50 void dcm_mp_cpusys_top_last_cor_idle_dcm(bool on);
51 bool dcm_mp_cpusys_top_misc_dcm_is_on(void);
52 void dcm_mp_cpusys_top_misc_dcm(bool on);
53 bool dcm_mp_cpusys_top_mp0_qdcm_is_on(void);
54 void dcm_mp_cpusys_top_mp0_qdcm(bool on);
55 /* CPCCFG_REG */
56 bool dcm_cpccfg_reg_emi_wfifo_is_on(void);
57 void dcm_cpccfg_reg_emi_wfifo(bool on);
58 
59 #endif
60