1/*
2 * Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <common/bl_common.ld.h>
8#include <lib/xlat_tables/xlat_tables_defs.h>
9
10OUTPUT_FORMAT(elf32-littlearm)
11OUTPUT_ARCH(arm)
12ENTRY(sp_min_vector_table)
13
14MEMORY {
15    RAM (rwx): ORIGIN = BL32_BASE, LENGTH = BL32_LIMIT - BL32_BASE
16}
17
18#ifdef PLAT_SP_MIN_EXTRA_LD_SCRIPT
19#   include <plat_sp_min.ld.S>
20#endif /* PLAT_SP_MIN_EXTRA_LD_SCRIPT */
21
22SECTIONS {
23    RAM_REGION_START = ORIGIN(RAM);
24    RAM_REGION_LENGTH = LENGTH(RAM);
25    . = BL32_BASE;
26
27    ASSERT(. == ALIGN(PAGE_SIZE),
28        "BL32_BASE address is not aligned on a page boundary.")
29
30#if SEPARATE_CODE_AND_RODATA
31    .text . : {
32        __TEXT_START__ = .;
33
34        *entrypoint.o(.text*)
35        *(SORT_BY_ALIGNMENT(.text*))
36        *(.vectors)
37        __TEXT_END_UNALIGNED__ = .;
38
39        . = ALIGN(PAGE_SIZE);
40
41        __TEXT_END__ = .;
42    } >RAM
43
44    /* .ARM.extab and .ARM.exidx are only added because Clang needs them */
45    .ARM.extab . : {
46        *(.ARM.extab* .gnu.linkonce.armextab.*)
47    } >RAM
48
49    .ARM.exidx . : {
50        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
51    } >RAM
52
53    .rodata . : {
54        __RODATA_START__ = .;
55        *(SORT_BY_ALIGNMENT(.rodata*))
56
57        RODATA_COMMON
58
59        . = ALIGN(8);
60
61#   include <lib/el3_runtime/pubsub_events.h>
62        __RODATA_END_UNALIGNED__ = .;
63
64        . = ALIGN(PAGE_SIZE);
65
66        __RODATA_END__ = .;
67    } >RAM
68#else /* SEPARATE_CODE_AND_RODATA */
69    .ro . : {
70        __RO_START__ = .;
71
72        *entrypoint.o(.text*)
73        *(SORT_BY_ALIGNMENT(.text*))
74        *(SORT_BY_ALIGNMENT(.rodata*))
75
76        RODATA_COMMON
77
78        . = ALIGN(8);
79
80#   include <lib/el3_runtime/pubsub_events.h>
81
82        *(.vectors)
83
84        __RO_END_UNALIGNED__ = .;
85
86        /*
87         * Memory page(s) mapped to this section will be marked as device
88         * memory. No other unexpected data must creep in. Ensure that the rest
89         * of the current memory page is unused.
90         */
91        . = ALIGN(PAGE_SIZE);
92
93        __RO_END__ = .;
94    } >RAM
95#endif /* SEPARATE_CODE_AND_RODATA */
96
97    ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__,
98        "cpu_ops not defined for this platform.")
99
100    __RW_START__ = .;
101
102    DATA_SECTION >RAM
103    RELA_SECTION >RAM
104
105#ifdef BL32_PROGBITS_LIMIT
106    ASSERT(. <= BL32_PROGBITS_LIMIT, "BL32 progbits has exceeded its limit.")
107#endif /* BL32_PROGBITS_LIMIT */
108
109    STACK_SECTION >RAM
110    BSS_SECTION >RAM
111    XLAT_TABLE_SECTION >RAM
112
113    __BSS_SIZE__ = SIZEOF(.bss);
114
115#if USE_COHERENT_MEM
116    /*
117     * The base address of the coherent memory section must be page-aligned to
118     * guarantee that the coherent data are stored on their own pages and are
119     * not mixed with normal data.  This is required to set up the correct
120     * memory attributes for the coherent data page tables.
121     */
122    .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
123        __COHERENT_RAM_START__ = .;
124
125        /*
126         * Bakery locks are stored in coherent memory. Each lock's data is
127         * contiguous and fully allocated by the compiler.
128         */
129        *(.bakery_lock)
130        *(.tzfw_coherent_mem)
131
132        __COHERENT_RAM_END_UNALIGNED__ = .;
133
134        /*
135         * Memory page(s) mapped to this section will be marked as device
136         * memory. No other unexpected data must creep in. Ensure that the rest
137         * of the current memory page is unused.
138         */
139        . = ALIGN(PAGE_SIZE);
140
141        __COHERENT_RAM_END__ = .;
142    } >RAM
143
144    __COHERENT_RAM_UNALIGNED_SIZE__ =
145        __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
146#endif /* USE_COHERENT_MEM */
147
148    __RW_END__ = .;
149    __BL32_END__ = .;
150
151    /DISCARD/ : {
152        *(.dynsym .dynstr .hash .gnu.hash)
153    }
154
155    ASSERT(. <= BL32_LIMIT, "BL32 image has exceeded its limit.")
156    RAM_REGION_END = .;
157}
158