1 /*
2  * Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <errno.h>
9 
10 #include <common/bl_common.h>
11 #include <bl31/interrupt_mgmt.h>
12 #include <lib/el3_runtime/context_mgmt.h>
13 #include <plat/common/platform.h>
14 
15 /*******************************************************************************
16  * Local structure and corresponding array to keep track of the state of the
17  * registered interrupt handlers for each interrupt type.
18  * The field descriptions are:
19  *
20  * 'scr_el3[2]'  : Mapping of the routing model in the 'flags' field to the
21  *                 value of the SCR_EL3.IRQ or FIQ bit for each security state.
22  *                 There are two instances of this field corresponding to the
23  *                 two security states.
24  *
25  * 'flags' : Bit[0], Routing model for this interrupt type when execution is
26  *                   not in EL3 in the secure state. '1' implies that this
27  *                   interrupt will be routed to EL3. '0' implies that this
28  *                   interrupt will be routed to the current exception level.
29  *
30  *           Bit[1], Routing model for this interrupt type when execution is
31  *                   not in EL3 in the non-secure state. '1' implies that this
32  *                   interrupt will be routed to EL3. '0' implies that this
33  *                   interrupt will be routed to the current exception level.
34  *
35  *           All other bits are reserved and SBZ.
36  ******************************************************************************/
37 typedef struct intr_type_desc {
38 	interrupt_type_handler_t handler;
39 	u_register_t scr_el3[2];
40 	uint32_t flags;
41 } intr_type_desc_t;
42 
43 static intr_type_desc_t intr_type_descs[MAX_INTR_TYPES];
44 
45 /*******************************************************************************
46  * This function validates the interrupt type.
47  ******************************************************************************/
validate_interrupt_type(uint32_t type)48 static int32_t validate_interrupt_type(uint32_t type)
49 {
50 	if (plat_ic_has_interrupt_type(type)) {
51 		return 0;
52 	}
53 
54 	return -EINVAL;
55 }
56 
57 /*******************************************************************************
58 * This function validates the routing model for this type of interrupt
59  ******************************************************************************/
validate_routing_model(uint32_t type,uint32_t flags)60 static int32_t validate_routing_model(uint32_t type, uint32_t flags)
61 {
62 	uint32_t rm_flags = (flags >> INTR_RM_FLAGS_SHIFT) & INTR_RM_FLAGS_MASK;
63 
64 	if (type == INTR_TYPE_S_EL1)
65 		return validate_sel1_interrupt_rm(rm_flags);
66 
67 	if (type == INTR_TYPE_NS)
68 		return validate_ns_interrupt_rm(rm_flags);
69 
70 	if (type == INTR_TYPE_EL3)
71 		return validate_el3_interrupt_rm(rm_flags);
72 
73 	return -EINVAL;
74 }
75 
76 /*******************************************************************************
77  * This function returns the cached copy of the SCR_EL3 which contains the
78  * routing model (expressed through the IRQ and FIQ bits) for a security state
79  * which was stored through a call to 'set_routing_model()' earlier.
80  ******************************************************************************/
get_scr_el3_from_routing_model(uint32_t security_state)81 u_register_t get_scr_el3_from_routing_model(uint32_t security_state)
82 {
83 	u_register_t scr_el3;
84 
85 	assert(sec_state_is_valid(security_state));
86 	scr_el3 = intr_type_descs[INTR_TYPE_NS].scr_el3[security_state];
87 	scr_el3 |= intr_type_descs[INTR_TYPE_S_EL1].scr_el3[security_state];
88 	scr_el3 |= intr_type_descs[INTR_TYPE_EL3].scr_el3[security_state];
89 	return scr_el3;
90 }
91 
92 /*******************************************************************************
93  * This function uses the 'interrupt_type_flags' parameter to obtain the value
94  * of the trap bit (IRQ/FIQ) in the SCR_EL3 for a security state for this
95  * interrupt type. It uses it to update the SCR_EL3 in the cpu context and the
96  * 'intr_type_desc' for that security state.
97  ******************************************************************************/
set_scr_el3_from_rm(uint32_t type,uint32_t interrupt_type_flags,uint32_t security_state)98 static void set_scr_el3_from_rm(uint32_t type,
99 				uint32_t interrupt_type_flags,
100 				uint32_t security_state)
101 {
102 	uint32_t flag, bit_pos;
103 
104 	flag = get_interrupt_rm_flag(interrupt_type_flags, security_state);
105 	bit_pos = plat_interrupt_type_to_line(type, security_state);
106 	intr_type_descs[type].scr_el3[security_state] = (u_register_t)flag << bit_pos;
107 
108 	/*
109 	 * Update scr_el3 only if there is a context available. If not, it
110 	 * will be updated later during context initialization which will obtain
111 	 * the scr_el3 value to be used via get_scr_el3_from_routing_model()
112 	 */
113 	if (cm_get_context(security_state) != NULL)
114 		cm_write_scr_el3_bit(security_state, bit_pos, flag);
115 }
116 
117 /*******************************************************************************
118  * This function validates the routing model specified in the 'flags' and
119  * updates internal data structures to reflect the new routing model. It also
120  * updates the copy of SCR_EL3 for each security state with the new routing
121  * model in the 'cpu_context' structure for this cpu.
122  ******************************************************************************/
set_routing_model(uint32_t type,uint32_t flags)123 int32_t set_routing_model(uint32_t type, uint32_t flags)
124 {
125 	int32_t rc;
126 
127 	rc = validate_interrupt_type(type);
128 	if (rc != 0)
129 		return rc;
130 
131 	rc = validate_routing_model(type, flags);
132 	if (rc != 0)
133 		return rc;
134 
135 	/* Update the routing model in internal data structures */
136 	intr_type_descs[type].flags = flags;
137 	set_scr_el3_from_rm(type, flags, SECURE);
138 	set_scr_el3_from_rm(type, flags, NON_SECURE);
139 
140 	return 0;
141 }
142 
143 /******************************************************************************
144  * This function disables the routing model of interrupt 'type' from the
145  * specified 'security_state' on the local core. The disable is in effect
146  * till the core powers down or till the next enable for that interrupt
147  * type.
148  *****************************************************************************/
disable_intr_rm_local(uint32_t type,uint32_t security_state)149 int disable_intr_rm_local(uint32_t type, uint32_t security_state)
150 {
151 	uint32_t bit_pos, flag;
152 
153 	assert(intr_type_descs[type].handler != NULL);
154 
155 	flag = get_interrupt_rm_flag(INTR_DEFAULT_RM, security_state);
156 
157 	bit_pos = plat_interrupt_type_to_line(type, security_state);
158 	cm_write_scr_el3_bit(security_state, bit_pos, flag);
159 
160 	return 0;
161 }
162 
163 /******************************************************************************
164  * This function enables the routing model of interrupt 'type' from the
165  * specified 'security_state' on the local core.
166  *****************************************************************************/
enable_intr_rm_local(uint32_t type,uint32_t security_state)167 int enable_intr_rm_local(uint32_t type, uint32_t security_state)
168 {
169 	uint32_t bit_pos, flag;
170 
171 	assert(intr_type_descs[type].handler != NULL);
172 
173 	flag = get_interrupt_rm_flag(intr_type_descs[type].flags,
174 				security_state);
175 
176 	bit_pos = plat_interrupt_type_to_line(type, security_state);
177 	cm_write_scr_el3_bit(security_state, bit_pos, flag);
178 
179 	return 0;
180 }
181 
182 /*******************************************************************************
183  * This function registers a handler for the 'type' of interrupt specified. It
184  * also validates the routing model specified in the 'flags' for this type of
185  * interrupt.
186  ******************************************************************************/
register_interrupt_type_handler(uint32_t type,interrupt_type_handler_t handler,uint32_t flags)187 int32_t register_interrupt_type_handler(uint32_t type,
188 					interrupt_type_handler_t handler,
189 					uint32_t flags)
190 {
191 	int32_t rc;
192 
193 	/* Validate the 'handler' parameter */
194 	if (handler == NULL)
195 		return -EINVAL;
196 
197 	/* Validate the 'flags' parameter */
198 	if ((flags & INTR_TYPE_FLAGS_MASK) != 0U)
199 		return -EINVAL;
200 
201 	/* Check if a handler has already been registered */
202 	if (intr_type_descs[type].handler != NULL)
203 		return -EALREADY;
204 
205 	rc = set_routing_model(type, flags);
206 	if (rc != 0)
207 		return rc;
208 
209 	/* Save the handler */
210 	intr_type_descs[type].handler = handler;
211 
212 	return 0;
213 }
214 
215 /*******************************************************************************
216  * This function is called when an interrupt is generated and returns the
217  * handler for the interrupt type (if registered). It returns NULL if the
218  * interrupt type is not supported or its handler has not been registered.
219  ******************************************************************************/
get_interrupt_type_handler(uint32_t type)220 interrupt_type_handler_t get_interrupt_type_handler(uint32_t type)
221 {
222 	if (validate_interrupt_type(type) != 0)
223 		return NULL;
224 
225 	return intr_type_descs[type].handler;
226 }
227 
228