1/*
2 * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef STM32MP1_LD_S
8#define STM32MP1_LD_S
9
10#include <lib/xlat_tables/xlat_tables_defs.h>
11#include <platform_def.h>
12
13OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
14OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
15
16ENTRY(__BL2_IMAGE_START__)
17
18MEMORY {
19	HEADER (rw) : ORIGIN = 0x00000000, LENGTH = STM32MP_HEADER_RESERVED_SIZE
20	RAM (rwx) : ORIGIN = STM32MP_BINARY_BASE, LENGTH = STM32MP_BINARY_SIZE
21}
22
23SECTIONS
24{
25    /*
26     * TF mapping must conform to ROM code specification.
27     */
28    .header : {
29        __HEADER_START__ = .;
30        KEEP(*(.header))
31        . = ALIGN(4);
32        __HEADER_END__ = .;
33    } >HEADER
34
35    . = STM32MP_BINARY_BASE;
36    .data . : {
37        . = ALIGN(PAGE_SIZE);
38        __DATA_START__ = .;
39        *(.data*)
40
41        /*
42         * dtb.
43         * The strongest and only alignment contraint is MMU 4K page.
44         * Indeed as images below will be removed, 4K pages will be re-used.
45         */
46        . = ( STM32MP_BL2_DTB_BASE - STM32MP_BINARY_BASE );
47        __DTB_IMAGE_START__ = .;
48        *(.dtb_image*)
49        __DTB_IMAGE_END__ = .;
50
51        /*
52         * bl2.
53         * The strongest and only alignment contraint is MMU 4K page.
54         * Indeed as images below will be removed, 4K pages will be re-used.
55         */
56#if SEPARATE_CODE_AND_RODATA
57        . = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
58#else
59        . = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
60#endif
61        __BL2_IMAGE_START__ = .;
62        *(.bl2_image*)
63        __BL2_IMAGE_END__ = .;
64
65        __DATA_END__ = .;
66    } >RAM
67
68    __TF_END__ = .;
69
70}
71#endif /* STM32MP1_LD_S */
72