1 /*
2 * Copyright (C) 2018 Marvell International Ltd.
3 * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io>
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 * https://spdx.org/licenses
7 */
8
9 /*
10 * This driver is for Mentor Graphics Inventra MI2CV IP core, which is used
11 * for Marvell and Allwinner SoCs in ATF.
12 */
13
14 #include <errno.h>
15
16 #include <common/debug.h>
17 #include <drivers/delay_timer.h>
18 #include <drivers/mentor/mi2cv.h>
19 #include <lib/mmio.h>
20
21 #include <mentor_i2c_plat.h>
22
23 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
24 #define DEBUG_I2C
25 #endif
26
27 #define I2C_TIMEOUT_VALUE 0x500
28 #define I2C_MAX_RETRY_CNT 1000
29 #define I2C_CMD_WRITE 0x0
30 #define I2C_CMD_READ 0x1
31
32 #define I2C_DATA_ADDR_7BIT_OFFS 0x1
33 #define I2C_DATA_ADDR_7BIT_MASK (0xFF << I2C_DATA_ADDR_7BIT_OFFS)
34
35 #define I2C_CONTROL_ACK 0x00000004
36 #define I2C_CONTROL_IFLG 0x00000008
37 #define I2C_CONTROL_STOP 0x00000010
38 #define I2C_CONTROL_START 0x00000020
39 #define I2C_CONTROL_TWSIEN 0x00000040
40 #define I2C_CONTROL_INTEN 0x00000080
41
42 #define I2C_STATUS_START 0x08
43 #define I2C_STATUS_REPEATED_START 0x10
44 #define I2C_STATUS_ADDR_W_ACK 0x18
45 #define I2C_STATUS_DATA_W_ACK 0x28
46 #define I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER 0x38
47 #define I2C_STATUS_ADDR_R_ACK 0x40
48 #define I2C_STATUS_DATA_R_ACK 0x50
49 #define I2C_STATUS_DATA_R_NAK 0x58
50 #define I2C_STATUS_LOST_ARB_GENERAL_CALL 0x78
51 #define I2C_STATUS_IDLE 0xF8
52
53 #define I2C_UNSTUCK_TRIGGER 0x1
54 #define I2C_UNSTUCK_ONGOING 0x2
55 #define I2C_UNSTUCK_ERROR 0x4
56
57 static struct mentor_i2c_regs *base;
58
mentor_i2c_lost_arbitration(uint32_t * status)59 static int mentor_i2c_lost_arbitration(uint32_t *status)
60 {
61 *status = mmio_read_32((uintptr_t)&base->status);
62 if ((*status == I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER) ||
63 (*status == I2C_STATUS_LOST_ARB_GENERAL_CALL))
64 return -EAGAIN;
65
66 return 0;
67 }
68
mentor_i2c_interrupt_clear(void)69 static void mentor_i2c_interrupt_clear(void)
70 {
71 uint32_t reg;
72
73 reg = mmio_read_32((uintptr_t)&base->control);
74 #ifndef I2C_INTERRUPT_CLEAR_INVERTED
75 reg &= ~(I2C_CONTROL_IFLG);
76 #else
77 reg |= I2C_CONTROL_IFLG;
78 #endif
79 mmio_write_32((uintptr_t)&base->control, reg);
80 /* Wait for 1 us for the clear to take effect */
81 udelay(1);
82 }
83
mentor_i2c_interrupt_get(void)84 static bool mentor_i2c_interrupt_get(void)
85 {
86 uint32_t reg;
87
88 /* get the interrupt flag bit */
89 reg = mmio_read_32((uintptr_t)&base->control);
90 reg &= I2C_CONTROL_IFLG;
91 return (reg != 0U);
92 }
93
mentor_i2c_wait_interrupt(void)94 static int mentor_i2c_wait_interrupt(void)
95 {
96 uint32_t timeout = 0;
97
98 while (!mentor_i2c_interrupt_get() && (timeout++ < I2C_TIMEOUT_VALUE))
99 ;
100 if (timeout >= I2C_TIMEOUT_VALUE)
101 return -ETIMEDOUT;
102
103 return 0;
104 }
105
mentor_i2c_start_bit_set(void)106 static int mentor_i2c_start_bit_set(void)
107 {
108 int is_int_flag = 0;
109 uint32_t status;
110
111 if (mentor_i2c_interrupt_get())
112 is_int_flag = 1;
113
114 /* set start bit */
115 mmio_write_32((uintptr_t)&base->control,
116 mmio_read_32((uintptr_t)&base->control) |
117 I2C_CONTROL_START);
118
119 /* in case that the int flag was set before i.e. repeated start bit */
120 if (is_int_flag) {
121 VERBOSE("%s: repeated start Bit\n", __func__);
122 mentor_i2c_interrupt_clear();
123 }
124
125 if (mentor_i2c_wait_interrupt()) {
126 ERROR("Start clear bit timeout\n");
127 return -ETIMEDOUT;
128 }
129
130 /* check that start bit went down */
131 if ((mmio_read_32((uintptr_t)&base->control) &
132 I2C_CONTROL_START) != 0) {
133 ERROR("Start bit didn't went down\n");
134 return -EPERM;
135 }
136
137 /* check the status */
138 if (mentor_i2c_lost_arbitration(&status)) {
139 ERROR("%s - %d: Lost arbitration, got status %x\n",
140 __func__, __LINE__, status);
141 return -EAGAIN;
142 }
143 if ((status != I2C_STATUS_START) &&
144 (status != I2C_STATUS_REPEATED_START)) {
145 ERROR("Got status %x after enable start bit.\n", status);
146 return -EPERM;
147 }
148
149 return 0;
150 }
151
mentor_i2c_stop_bit_set(void)152 static int mentor_i2c_stop_bit_set(void)
153 {
154 int timeout;
155 uint32_t status;
156
157 /* Generate stop bit */
158 mmio_write_32((uintptr_t)&base->control,
159 mmio_read_32((uintptr_t)&base->control) |
160 I2C_CONTROL_STOP);
161 mentor_i2c_interrupt_clear();
162
163 timeout = 0;
164 /* Read control register, check the control stop bit */
165 while ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) &&
166 (timeout++ < I2C_TIMEOUT_VALUE))
167 ;
168 if (timeout >= I2C_TIMEOUT_VALUE) {
169 ERROR("Stop bit didn't went down\n");
170 return -ETIMEDOUT;
171 }
172
173 /* check that stop bit went down */
174 if ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) != 0) {
175 ERROR("Stop bit didn't went down\n");
176 return -EPERM;
177 }
178
179 /* check the status */
180 if (mentor_i2c_lost_arbitration(&status)) {
181 ERROR("%s - %d: Lost arbitration, got status %x\n",
182 __func__, __LINE__, status);
183 return -EAGAIN;
184 }
185 if (status != I2C_STATUS_IDLE) {
186 ERROR("Got status %x after enable stop bit.\n", status);
187 return -EPERM;
188 }
189
190 return 0;
191 }
192
mentor_i2c_address_set(uint8_t chain,int command)193 static int mentor_i2c_address_set(uint8_t chain, int command)
194 {
195 uint32_t reg, status;
196
197 reg = (chain << I2C_DATA_ADDR_7BIT_OFFS) & I2C_DATA_ADDR_7BIT_MASK;
198 reg |= command;
199 mmio_write_32((uintptr_t)&base->data, reg);
200 udelay(1);
201
202 mentor_i2c_interrupt_clear();
203
204 if (mentor_i2c_wait_interrupt()) {
205 ERROR("Start clear bit timeout\n");
206 return -ETIMEDOUT;
207 }
208
209 /* check the status */
210 if (mentor_i2c_lost_arbitration(&status)) {
211 ERROR("%s - %d: Lost arbitration, got status %x\n",
212 __func__, __LINE__, status);
213 return -EAGAIN;
214 }
215 if (((status != I2C_STATUS_ADDR_R_ACK) && (command == I2C_CMD_READ)) ||
216 ((status != I2C_STATUS_ADDR_W_ACK) && (command == I2C_CMD_WRITE))) {
217 /* only in debug, since in boot we try to read the SPD
218 * of both DRAM, and we don't want error messages in cas
219 * DIMM doesn't exist.
220 */
221 INFO("%s: ERROR - status %x addr in %s mode.\n", __func__,
222 status, (command == I2C_CMD_WRITE) ? "Write" : "Read");
223 return -EPERM;
224 }
225
226 return 0;
227 }
228
229 /*
230 * The I2C module contains a clock divider to generate the SCL clock.
231 * This function calculates and sets the <N> and <M> fields in the I2C Baud
232 * Rate Register (t=01) to obtain given 'requested_speed'.
233 * The requested_speed will be equal to:
234 * CONFIG_SYS_TCLK / (10 * (M + 1) * (2 << N))
235 * Where M is the value represented by bits[6:3] and N is the value represented
236 * by bits[2:0] of "I2C Baud Rate Register".
237 * Therefore max M which can be set is 16 (2^4) and max N is 8 (2^3). So the
238 * lowest possible baudrate is:
239 * CONFIG_SYS_TCLK/(10 * (16 +1) * (2 << 8), which equals to:
240 * CONFIG_SYS_TCLK/87040. Assuming that CONFIG_SYS_TCLK=250MHz, the lowest
241 * possible frequency is ~2,872KHz.
242 */
mentor_i2c_bus_speed_set(unsigned int requested_speed)243 static unsigned int mentor_i2c_bus_speed_set(unsigned int requested_speed)
244 {
245 unsigned int n, m, freq, margin, min_margin = 0xffffffff;
246 unsigned int actual_n = 0, actual_m = 0;
247 int val;
248
249 /* Calculate N and M for the TWSI clock baud rate */
250 for (n = 0; n < 8; n++) {
251 for (m = 0; m < 16; m++) {
252 freq = CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
253 val = requested_speed - freq;
254 margin = (val > 0) ? val : -val;
255
256 if ((freq <= requested_speed) &&
257 (margin < min_margin)) {
258 min_margin = margin;
259 actual_n = n;
260 actual_m = m;
261 }
262 }
263 }
264 VERBOSE("%s: actual_n = %u, actual_m = %u\n",
265 __func__, actual_n, actual_m);
266 /* Set the baud rate */
267 mmio_write_32((uintptr_t)&base->baudrate, (actual_m << 3) | actual_n);
268
269 return 0;
270 }
271
272 #ifdef DEBUG_I2C
mentor_i2c_probe(uint8_t chip)273 static int mentor_i2c_probe(uint8_t chip)
274 {
275 int ret = 0;
276
277 ret = mentor_i2c_start_bit_set();
278 if (ret != 0) {
279 mentor_i2c_stop_bit_set();
280 ERROR("%s - %d: %s", __func__, __LINE__,
281 "mentor_i2c_start_bit_set failed\n");
282 return -EPERM;
283 }
284
285 ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
286 if (ret != 0) {
287 mentor_i2c_stop_bit_set();
288 ERROR("%s - %d: %s", __func__, __LINE__,
289 "mentor_i2c_address_set failed\n");
290 return -EPERM;
291 }
292
293 mentor_i2c_stop_bit_set();
294
295 VERBOSE("%s: successful I2C probe\n", __func__);
296
297 return ret;
298 }
299 #endif
300
301 /* regular i2c transaction */
mentor_i2c_data_receive(uint8_t * p_block,uint32_t block_size)302 static int mentor_i2c_data_receive(uint8_t *p_block, uint32_t block_size)
303 {
304 uint32_t reg, status, block_size_read = block_size;
305
306 /* Wait for cause interrupt */
307 if (mentor_i2c_wait_interrupt()) {
308 ERROR("Start clear bit timeout\n");
309 return -ETIMEDOUT;
310 }
311 while (block_size_read) {
312 if (block_size_read == 1) {
313 reg = mmio_read_32((uintptr_t)&base->control);
314 reg &= ~(I2C_CONTROL_ACK);
315 mmio_write_32((uintptr_t)&base->control, reg);
316 }
317 mentor_i2c_interrupt_clear();
318
319 if (mentor_i2c_wait_interrupt()) {
320 ERROR("Start clear bit timeout\n");
321 return -ETIMEDOUT;
322 }
323 /* check the status */
324 if (mentor_i2c_lost_arbitration(&status)) {
325 ERROR("%s - %d: Lost arbitration, got status %x\n",
326 __func__, __LINE__, status);
327 return -EAGAIN;
328 }
329 if ((status != I2C_STATUS_DATA_R_ACK) &&
330 (block_size_read != 1)) {
331 ERROR("Status %x in read transaction\n", status);
332 return -EPERM;
333 }
334 if ((status != I2C_STATUS_DATA_R_NAK) &&
335 (block_size_read == 1)) {
336 ERROR("Status %x in Rd Terminate\n", status);
337 return -EPERM;
338 }
339
340 /* read the data */
341 *p_block = (uint8_t) mmio_read_32((uintptr_t)&base->data);
342 VERBOSE("%s: place %d read %x\n", __func__,
343 block_size - block_size_read, *p_block);
344 p_block++;
345 block_size_read--;
346 }
347
348 return 0;
349 }
350
mentor_i2c_data_transmit(uint8_t * p_block,uint32_t block_size)351 static int mentor_i2c_data_transmit(uint8_t *p_block, uint32_t block_size)
352 {
353 uint32_t status, block_size_write = block_size;
354
355 if (mentor_i2c_wait_interrupt()) {
356 ERROR("Start clear bit timeout\n");
357 return -ETIMEDOUT;
358 }
359
360 while (block_size_write) {
361 /* write the data */
362 mmio_write_32((uintptr_t)&base->data, (uint32_t) *p_block);
363 VERBOSE("%s: index = %d, data = %x\n", __func__,
364 block_size - block_size_write, *p_block);
365 p_block++;
366 block_size_write--;
367
368 mentor_i2c_interrupt_clear();
369
370 if (mentor_i2c_wait_interrupt()) {
371 ERROR("Start clear bit timeout\n");
372 return -ETIMEDOUT;
373 }
374
375 /* check the status */
376 if (mentor_i2c_lost_arbitration(&status)) {
377 ERROR("%s - %d: Lost arbitration, got status %x\n",
378 __func__, __LINE__, status);
379 return -EAGAIN;
380 }
381 if (status != I2C_STATUS_DATA_W_ACK) {
382 ERROR("Status %x in write transaction\n", status);
383 return -EPERM;
384 }
385 }
386
387 return 0;
388 }
389
mentor_i2c_target_offset_set(uint8_t chip,uint32_t addr,int alen)390 static int mentor_i2c_target_offset_set(uint8_t chip, uint32_t addr, int alen)
391 {
392 uint8_t off_block[2];
393 uint32_t off_size;
394
395 if (alen == 2) { /* 2-byte addresses support */
396 off_block[0] = (addr >> 8) & 0xff;
397 off_block[1] = addr & 0xff;
398 off_size = 2;
399 } else { /* 1-byte addresses support */
400 off_block[0] = addr & 0xff;
401 off_size = 1;
402 }
403 VERBOSE("%s: off_size = %x addr1 = %x addr2 = %x\n", __func__,
404 off_size, off_block[0], off_block[1]);
405 return mentor_i2c_data_transmit(off_block, off_size);
406 }
407
408 #ifdef I2C_CAN_UNSTUCK
mentor_i2c_unstuck(int ret)409 static int mentor_i2c_unstuck(int ret)
410 {
411 uint32_t v;
412
413 if (ret != -ETIMEDOUT)
414 return ret;
415 VERBOSE("Trying to \"unstuck i2c\"... ");
416 i2c_init(base);
417 mmio_write_32((uintptr_t)&base->unstuck, I2C_UNSTUCK_TRIGGER);
418 do {
419 v = mmio_read_32((uintptr_t)&base->unstuck);
420 } while (v & I2C_UNSTUCK_ONGOING);
421
422 if (v & I2C_UNSTUCK_ERROR) {
423 VERBOSE("failed - soft reset i2c\n");
424 ret = -EPERM;
425 } else {
426 VERBOSE("ok\n");
427 i2c_init(base);
428 ret = -EAGAIN;
429 }
430 return ret;
431 }
432 #else
mentor_i2c_unstuck(int ret)433 static int mentor_i2c_unstuck(int ret)
434 {
435 VERBOSE("Cannot \"unstuck i2c\" - soft reset i2c\n");
436 return -EPERM;
437 }
438 #endif
439
440 /*
441 * API Functions
442 */
i2c_init(void * i2c_base)443 void i2c_init(void *i2c_base)
444 {
445 /* For I2C speed and slave address, now we do not set them since
446 * we just provide the working speed and slave address otherwhere
447 * for i2c_init
448 */
449 base = (struct mentor_i2c_regs *)i2c_base;
450
451 /* Reset the I2C logic */
452 mmio_write_32((uintptr_t)&base->soft_reset, 0);
453
454 udelay(200);
455
456 mentor_i2c_bus_speed_set(CONFIG_SYS_I2C_SPEED);
457
458 /* Enable the I2C and slave */
459 mmio_write_32((uintptr_t)&base->control,
460 I2C_CONTROL_TWSIEN | I2C_CONTROL_ACK);
461
462 /* set the I2C slave address */
463 mmio_write_32((uintptr_t)&base->xtnd_slave_addr, 0);
464 mmio_write_32((uintptr_t)&base->slave_address, CONFIG_SYS_I2C_SLAVE);
465
466 /* unmask I2C interrupt */
467 mmio_write_32((uintptr_t)&base->control,
468 mmio_read_32((uintptr_t)&base->control) |
469 I2C_CONTROL_INTEN);
470
471 udelay(10);
472 }
473
474 /*
475 * i2c_read: - Read multiple bytes from an i2c device
476 *
477 * The higher level routines take into account that this function is only
478 * called with len < page length of the device (see configuration file)
479 *
480 * @chip: address of the chip which is to be read
481 * @addr: i2c data address within the chip
482 * @alen: length of the i2c data address (1..2 bytes)
483 * @buffer: where to write the data
484 * @len: how much byte do we want to read
485 * @return: 0 in case of success
486 */
i2c_read(uint8_t chip,uint32_t addr,int alen,uint8_t * buffer,int len)487 int i2c_read(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len)
488 {
489 int ret = 0;
490 uint32_t counter = 0;
491
492 #ifdef DEBUG_I2C
493 mentor_i2c_probe(chip);
494 #endif
495
496 do {
497 if (ret != -EAGAIN && ret) {
498 ERROR("i2c transaction failed, after %d retries\n",
499 counter);
500 mentor_i2c_stop_bit_set();
501 return ret;
502 }
503
504 /* wait for 1 us for the interrupt clear to take effect */
505 if (counter > 0)
506 udelay(1);
507 counter++;
508
509 ret = mentor_i2c_start_bit_set();
510 if (ret) {
511 ret = mentor_i2c_unstuck(ret);
512 continue;
513 }
514
515 /* if EEPROM device */
516 if (alen != 0) {
517 ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
518 if (ret)
519 continue;
520
521 ret = mentor_i2c_target_offset_set(chip, addr, alen);
522 if (ret)
523 continue;
524 ret = mentor_i2c_start_bit_set();
525 if (ret)
526 continue;
527 }
528
529 ret = mentor_i2c_address_set(chip, I2C_CMD_READ);
530 if (ret)
531 continue;
532
533 ret = mentor_i2c_data_receive(buffer, len);
534 if (ret)
535 continue;
536
537 ret = mentor_i2c_stop_bit_set();
538 } while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT));
539
540 if (counter == I2C_MAX_RETRY_CNT) {
541 ERROR("I2C transactions failed, got EAGAIN %d times\n",
542 I2C_MAX_RETRY_CNT);
543 ret = -EPERM;
544 }
545 mmio_write_32((uintptr_t)&base->control,
546 mmio_read_32((uintptr_t)&base->control) |
547 I2C_CONTROL_ACK);
548
549 udelay(1);
550 return ret;
551 }
552
553 /*
554 * i2c_write: - Write multiple bytes to an i2c device
555 *
556 * The higher level routines take into account that this function is only
557 * called with len < page length of the device (see configuration file)
558 *
559 * @chip: address of the chip which is to be written
560 * @addr: i2c data address within the chip
561 * @alen: length of the i2c data address (1..2 bytes)
562 * @buffer: where to find the data to be written
563 * @len: how much byte do we want to read
564 * @return: 0 in case of success
565 */
i2c_write(uint8_t chip,uint32_t addr,int alen,uint8_t * buffer,int len)566 int i2c_write(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len)
567 {
568 int ret = 0;
569 uint32_t counter = 0;
570
571 do {
572 if (ret != -EAGAIN && ret) {
573 ERROR("i2c transaction failed\n");
574 mentor_i2c_stop_bit_set();
575 return ret;
576 }
577 /* wait for 1 us for the interrupt clear to take effect */
578 if (counter > 0)
579 udelay(1);
580 counter++;
581
582 ret = mentor_i2c_start_bit_set();
583 if (ret) {
584 ret = mentor_i2c_unstuck(ret);
585 continue;
586 }
587
588 ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
589 if (ret)
590 continue;
591
592 /* if EEPROM device */
593 if (alen != 0) {
594 ret = mentor_i2c_target_offset_set(chip, addr, alen);
595 if (ret)
596 continue;
597 }
598
599 ret = mentor_i2c_data_transmit(buffer, len);
600 if (ret)
601 continue;
602
603 ret = mentor_i2c_stop_bit_set();
604 } while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT));
605
606 if (counter == I2C_MAX_RETRY_CNT) {
607 ERROR("I2C transactions failed, got EAGAIN %d times\n",
608 I2C_MAX_RETRY_CNT);
609 ret = -EPERM;
610 }
611
612 udelay(1);
613 return ret;
614 }
615
