1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9	fmc_pins_a: fmc-0 {
10		pins1 {
11			pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
12				 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
13				 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
14				 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
15				 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
16				 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
17				 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
18				 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
19				 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
20				 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
21				 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
22				 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
23				 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
24			bias-disable;
25			drive-push-pull;
26			slew-rate = <1>;
27		};
28		pins2 {
29			pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
30			bias-pull-up;
31		};
32	};
33
34	i2c2_pins_a: i2c2-0 {
35		pins {
36			pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
37				 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
38			bias-disable;
39			drive-open-drain;
40			slew-rate = <0>;
41		};
42	};
43
44	qspi_clk_pins_a: qspi-clk-0 {
45		pins {
46			pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
47			bias-disable;
48			drive-push-pull;
49			slew-rate = <3>;
50		};
51	};
52
53	qspi_bk1_pins_a: qspi-bk1-0 {
54		pins1 {
55			pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
56				 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
57				 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
58				 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
59			bias-disable;
60			drive-push-pull;
61			slew-rate = <1>;
62		};
63		pins2 {
64			pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
65			bias-pull-up;
66			drive-push-pull;
67			slew-rate = <1>;
68		};
69	};
70
71	qspi_bk2_pins_a: qspi-bk2-0 {
72		pins1 {
73			pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
74				 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
75				 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
76				 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
77			bias-disable;
78			drive-push-pull;
79			slew-rate = <1>;
80		};
81		pins2 {
82			pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
83			bias-pull-up;
84			drive-push-pull;
85			slew-rate = <1>;
86		};
87	};
88
89	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
90		pins1 {
91			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
92				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
93				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
94				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
95				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
96			slew-rate = <1>;
97			drive-push-pull;
98			bias-disable;
99		};
100		pins2 {
101			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
102			slew-rate = <2>;
103			drive-push-pull;
104			bias-disable;
105		};
106	};
107
108	sdmmc1_dir_pins_a: sdmmc1-dir-0 {
109		pins1 {
110			pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
111				 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
112				 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
113			slew-rate = <1>;
114			drive-push-pull;
115			bias-pull-up;
116		};
117		pins2 {
118			pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
119			bias-pull-up;
120		};
121	};
122
123	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
124		pins1 {
125			pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
126				 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
127				 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
128				 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
129				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
130			slew-rate = <1>;
131			drive-push-pull;
132			bias-pull-up;
133		};
134		pins2 {
135			pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
136			slew-rate = <2>;
137			drive-push-pull;
138			bias-pull-up;
139		};
140	};
141
142	sdmmc2_b4_pins_b: sdmmc2-b4-1 {
143		pins1 {
144			pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
145				 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
146				 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
147				 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
148				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
149			slew-rate = <1>;
150			drive-push-pull;
151			bias-disable;
152		};
153		pins2 {
154			pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
155			slew-rate = <2>;
156			drive-push-pull;
157			bias-disable;
158		};
159	};
160
161	sdmmc2_d47_pins_a: sdmmc2-d47-0 {
162		pins {
163			pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
164				 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
165				 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
166				 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
167			slew-rate = <1>;
168			drive-push-pull;
169			bias-pull-up;
170		};
171	};
172
173	sdmmc2_d47_pins_b: sdmmc2-d47-1 {
174		pins {
175			pinmux = <STM32_PINMUX('A', 8, AF9)>,  /* SDMMC2_D4 */
176				 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
177				 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
178				 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
179			slew-rate = <1>;
180			drive-push-pull;
181			bias-disable;
182		};
183	};
184
185	sdmmc2_d47_pins_d: sdmmc2-d47-3 {
186		pins {
187			pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
188				 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
189				 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
190				 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
191		};
192	};
193
194	uart4_pins_a: uart4-0 {
195		pins1 {
196			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
197			bias-disable;
198			drive-push-pull;
199			slew-rate = <0>;
200		};
201		pins2 {
202			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
203			bias-disable;
204		};
205	};
206
207	uart4_pins_b: uart4-1 {
208		pins1 {
209			pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
210			bias-disable;
211			drive-push-pull;
212			slew-rate = <0>;
213		};
214		pins2 {
215			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
216			bias-disable;
217		};
218	};
219
220	uart7_pins_a: uart7-0 {
221		pins1 {
222			pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
223			bias-disable;
224			drive-push-pull;
225			slew-rate = <0>;
226		};
227		pins2 {
228			pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
229				 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
230				 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
231			bias-disable;
232		};
233	};
234
235	uart7_pins_b: uart7-1 {
236		pins1 {
237			pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
238			bias-disable;
239			drive-push-pull;
240			slew-rate = <0>;
241		};
242		pins2 {
243			pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
244			bias-disable;
245		};
246	};
247
248	uart7_pins_c: uart7-2 {
249		pins1 {
250			pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
251			bias-disable;
252			drive-push-pull;
253			slew-rate = <0>;
254		};
255		pins2 {
256			pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
257			bias-disable;
258		};
259	};
260
261	uart8_pins_a: uart8-0 {
262		pins1 {
263			pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
264			bias-disable;
265			drive-push-pull;
266			slew-rate = <0>;
267		};
268		pins2 {
269			pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
270			bias-disable;
271		};
272	};
273
274	usart2_pins_a: usart2-0 {
275		pins1 {
276			pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
277				 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
278			bias-disable;
279			drive-push-pull;
280			slew-rate = <0>;
281		};
282		pins2 {
283			pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
284				 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
285			bias-disable;
286		};
287	};
288
289	usart2_pins_b: usart2-1 {
290		pins1 {
291			pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
292				 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
293			bias-disable;
294			drive-push-pull;
295			slew-rate = <0>;
296		};
297		pins2 {
298			pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
299				 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
300			bias-disable;
301		};
302	};
303
304	usart2_pins_c: usart2-2 {
305		pins1 {
306			pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
307				 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
308			bias-disable;
309			drive-push-pull;
310			slew-rate = <3>;
311		};
312		pins2 {
313			pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
314				 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
315			bias-disable;
316		};
317	};
318
319	usart3_pins_a: usart3-0 {
320		pins1 {
321			pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
322			bias-disable;
323			drive-push-pull;
324			slew-rate = <0>;
325		};
326		pins2 {
327			pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
328			bias-disable;
329		};
330	};
331
332	usart3_pins_b: usart3-1 {
333		pins1 {
334			pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
335				 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
336			bias-disable;
337			drive-push-pull;
338			slew-rate = <0>;
339		};
340		pins2 {
341			pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
342				 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
343			bias-disable;
344		};
345	};
346
347	usart3_pins_c: usart3-2 {
348		pins1 {
349			pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
350				 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
351			bias-disable;
352			drive-push-pull;
353			slew-rate = <0>;
354		};
355		pins2 {
356			pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
357				 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
358			bias-disable;
359		};
360	};
361
362	usbotg_hs_pins_a: usbotg-hs-0 {
363		pins {
364			pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
365		};
366	};
367
368	usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
369		pins {
370			pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
371				 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
372		};
373	};
374};
375
376&pinctrl_z {
377	i2c4_pins_a: i2c4-0 {
378		pins {
379			pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
380				 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
381			bias-disable;
382			drive-open-drain;
383			slew-rate = <0>;
384		};
385	};
386};
387