1# 2# Topology for Tigerlake with Max98373 amp (SSP: $AMP_SSP) + rt5682 codec + DMIC + 4 HDMI 3# 4 5# Include topology builder 6include(`utils.m4') 7include(`dai.m4') 8include(`pipeline.m4') 9include(`ssp.m4') 10include(`hda.m4') 11 12# Include TLV library 13include(`common/tlv.m4') 14 15# Include Token library 16include(`sof/tokens.m4') 17 18# Include Tigerlake DSP configuration 19include(`platform/intel/tgl.m4') 20include(`platform/intel/dmic.m4') 21 22DEBUG_START 23 24# 25# Define the pipelines 26# 27# PCM0 ----> smart_amp ----> SSP$AMP_SSP (Speaker -max98373) 28# ^ 29# | 30# | 31# PCM0 <---- demux <----- SSP$AMP_SSP (Speaker -max98373) 32# PCM1 <---> volume <----> SSP0 (Headset - ALC5682) 33# PCM2 ----> volume -----> iDisp1 34# PCM3 ----> volume -----> iDisp2 35# PCM4 ----> volume -----> iDisp3 36# PCM5 ----> volume -----> iDisp4 37# PCM6 ----> passthrough ----> SSP2 (Bluetooth) 38# PCM99 <---- volume <---- DMIC01 (dmic 48k capture) 39# PCM100 <---- kpb <---- DMIC16K (dmic 16k capture) 40 41# Run Speakers pipeline on core#1 by default for low power considering 42ifdef(`SPK_PLAYBACK_CORE', `', `define(`SPK_PLAYBACK_CORE', `1')') 43 44ifdef(`AMP_SSP',`',`fatal_error(note: Define AMP_SSP for speaker amp SSP Index)') 45# Smart amplifier related 46# SSP related 47#define smart amplifier SSP index 48define(`SMART_SSP_INDEX', AMP_SSP) 49#define SSP BE dai_link name 50define(`SMART_SSP_NAME', concat(concat(`SSP', AMP_SSP),`-Codec')) 51#define BE dai_link ID 52define(`SMART_BE_ID', 7) 53#define SSP mclk 54define(`SSP_MCLK', 24576000) 55# Run Smart Amp pipeline on core#1 by default for low power considering 56define(`SMART_AMP_CORE', SPK_PLAYBACK_CORE) 57# Playback related 58define(`SMART_PB_PPL_ID', 1) 59define(`SMART_PB_CH_NUM', 2) 60define(`SMART_TX_CHANNELS', 4) 61define(`SMART_RX_CHANNELS', 4) 62define(`SMART_FB_CHANNELS', 4) 63# Ref capture related 64define(`SMART_REF_PPL_ID', 11) 65define(`SMART_REF_CH_NUM', 2) 66# PCM related 67define(`SMART_PCM_ID', 0) 68define(`SMART_PCM_NAME', `smart373-spk') 69 70# Include Smart Amplifier support 71include(`sof-smart-amplifier.m4') 72 73# Define pipeline id for intel-generic-dmic-kwd.m4 74# to generate dmic setting with kwd when we have dmic 75# define channel 76define(CHANNELS, `4') 77# define kfbm with volume 78define(KFBM_TYPE, `vol-kfbm') 79# define pcm, pipeline and dai id 80define(DMIC_PCM_48k_ID, `99') 81define(DMIC_PIPELINE_48k_ID, `4') 82define(DMIC_DAI_LINK_48k_ID, `1') 83define(DMIC_PCM_16k_ID, `100') 84define(DMIC_PIPELINE_16k_ID, `9') 85define(DMIC_PIPELINE_KWD_ID, `10') 86define(DMIC_DAI_LINK_16k_ID, `2') 87# Offload DMIC_PIPELINE_48K to secondary core of TGL. 88define(DMIC_PIPELINE_48k_CORE_ID, 1) 89# define pcm, pipeline and dai id 90define(KWD_PIPE_SCH_DEADLINE_US, 20000) 91 92ifdef(`IGO', 93 `define(`DMICPROC', igonr)' 94 `define(`DMIC_48k_PERIOD_US', 16000)', 95 `') 96 97# include the generic dmic with kwd 98include(`platform/intel/intel-generic-dmic-kwd.m4') 99 100# BT offload support 101ifdef(`BT_OFFLOAD', ` 102define(`BT_PIPELINE_PB_ID', eval(SMART_REF_PPL_ID + 1)) 103define(`BT_PIPELINE_CP_ID', eval(SMART_REF_PPL_ID + 2)) 104define(`BT_DAI_LINK_ID', eval(SMART_BE_ID + 1)) 105define(`BT_PCM_ID', `6') 106define(`HW_CONFIG_ID', `8') 107include(`platform/intel/intel-generic-bt.m4')') 108 109dnl PIPELINE_PCM_ADD(pipeline, 110dnl pipe id, pcm, max channels, format, 111dnl frames, deadline, priority, core) 112 113ifdef(`INCLUDE_IIR_EQ', 114` 115# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. 116# Schedule 48 frames per 1000us deadline with priority 0 on core 0 117PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-playback.m4, 118 2, 1, 2, s32le, 119 1000, 0, 0, 120 48000, 48000, 48000) 121' 122, 123` 124# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. 125# Schedule 48 frames per 1000us deadline with priority 0 on core 0 126PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, 127 2, 1, 2, s32le, 128 1000, 0, 0, 129 48000, 48000, 48000) 130') 131 132 133# Low Latency capture pipeline 3 on PCM 1 using max 2 channels of s32le. 134# Schedule 48 frames per 1000us deadline with priority 0 on core 0 135PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, 136 3, 1, 2, s32le, 137 1000, 0, 0, 138 48000, 48000, 48000) 139 140# Low Latency playback pipeline 5 on PCM 2 using max 2 channels of s32le. 141# Schedule 48 frames per 1000us deadline with priority 0 on core 0 142PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, 143 5, 2, 2, s32le, 144 1000, 0, 0, 145 48000, 48000, 48000) 146 147# Low Latency playback pipeline 6 on PCM 3 using max 2 channels of s32le. 148# Schedule 48 frames per 1000us deadline with priority 0 on core 0 149PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, 150 6, 3, 2, s32le, 151 1000, 0, 0, 152 48000, 48000, 48000) 153 154# Low Latency playback pipeline 7 on PCM 4 using max 2 channels of s32le. 155# Schedule 48 frames per 1000us deadline with priority 0 on core 0 156PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, 157 7, 4, 2, s32le, 158 1000, 0, 0, 159 48000, 48000, 48000) 160 161# Low Latency playback pipeline 8 on PCM 5 using max 2 channels of s32le. 162# Schedule 48 frames per 1000us deadline with priority 0 on core 0 163PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, 164 8, 5, 2, s32le, 165 1000, 0, 0, 166 48000, 48000, 48000) 167 168# 169# DAIs configuration 170# 171 172dnl DAI_ADD(pipeline, 173dnl pipe id, dai type, dai_index, dai_be, 174dnl buffer, periods, format, 175dnl frames, deadline, priority, core) 176 177# playback DAI is SSP0 using 2 periods 178# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 179DAI_ADD(sof/pipe-dai-playback.m4, 180 2, SSP, 0, SSP0-Codec, 181 PIPELINE_SOURCE_2, 2, s32le, 182 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) 183 184# capture DAI is SSP0 using 2 periods 185# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 186DAI_ADD(sof/pipe-dai-capture.m4, 187 3, SSP, 0, SSP0-Codec, 188 PIPELINE_SINK_3, 2, s32le, 189 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) 190 191# playback DAI is iDisp1 using 2 periods 192# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 193DAI_ADD(sof/pipe-dai-playback.m4, 194 5, HDA, 0, iDisp1, 195 PIPELINE_SOURCE_5, 2, s32le, 196 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) 197 198# playback DAI is iDisp2 using 2 periods 199# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 200DAI_ADD(sof/pipe-dai-playback.m4, 201 6, HDA, 1, iDisp2, 202 PIPELINE_SOURCE_6, 2, s32le, 203 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) 204 205# playback DAI is iDisp3 using 2 periods 206# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 207DAI_ADD(sof/pipe-dai-playback.m4, 208 7, HDA, 2, iDisp3, 209 PIPELINE_SOURCE_7, 2, s32le, 210 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) 211 212# playback DAI is iDisp4 using 2 periods 213# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 214DAI_ADD(sof/pipe-dai-playback.m4, 215 8, HDA, 3, iDisp4, 216 PIPELINE_SOURCE_8, 2, s32le, 217 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) 218 219# 220# Bind PCM with the pipeline 221# 222dnl PCM_PLAYBACK_ADD(name, pcm_id, playback) 223PCM_DUPLEX_ADD(Headset, 1, PIPELINE_PCM_2, PIPELINE_PCM_3) 224PCM_PLAYBACK_ADD(HDMI1, 2, PIPELINE_PCM_5) 225PCM_PLAYBACK_ADD(HDMI2, 3, PIPELINE_PCM_6) 226PCM_PLAYBACK_ADD(HDMI3, 4, PIPELINE_PCM_7) 227PCM_PLAYBACK_ADD(HDMI4, 5, PIPELINE_PCM_8) 228 229# 230# BE configurations - overrides config in ACPI if present 231# 232dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config) 233dnl SSP_CONFIG(format, mclk, bclk, fsync, tdm, ssp_config_data) 234dnl SSP_CLOCK(clock, freq, codec_master, polarity) 235dnl SSP_CONFIG_DATA(type, idx, valid bits, mclk_id) 236dnl mclk_id is optional 237dnl ssp1-maxmspk, ssp0-RTHeadset 238 239#SSP 0 (ID: 0) 240DAI_CONFIG(SSP, 0, 0, SSP0-Codec, 241 SSP_CONFIG(I2S, SSP_CLOCK(mclk, SSP_MCLK, codec_mclk_in), 242 SSP_CLOCK(bclk, 3072000, codec_slave), 243 SSP_CLOCK(fsync, 48000, codec_slave), 244 SSP_TDM(2, 32, 3, 3), 245 SSP_CONFIG_DATA(SSP, 0, 32))) 246 247# 4 HDMI/DP outputs (ID: 3,4,5,6) 248DAI_CONFIG(HDA, 0, 3, iDisp1, 249 HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2))) 250DAI_CONFIG(HDA, 1, 4, iDisp2, 251 HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2))) 252DAI_CONFIG(HDA, 2, 5, iDisp3, 253 HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2))) 254DAI_CONFIG(HDA, 3, 6, iDisp4, 255 HDA_CONFIG(HDA_CONFIG_DATA(HDA, 3, 48000, 2))) 256 257DEBUG_END 258
