1 // SPDX-License-Identifier: BSD-3-Clause
2 //
3 // Copyright(c) 2022 Intel Corporation. All rights reserved.
4 //
5 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
6 // Keyon Jie <yang.jie@linux.intel.com>
7 // Rander Wang <rander.wang@intel.com>
8 // Janusz Jankowski <janusz.jankowski@linux.intel.com>
9
10 #include <sof/debug/debug.h>
11 #include <sof/ipc/common.h>
12 #include <sof/ipc/driver.h>
13 #include <sof/ipc/msg.h>
14 #include <sof/lib/agent.h>
15 #include <sof/lib/cpu-clk-manager.h>
16 #include <sof/lib/mm_heap.h>
17 #include <sof/lib/watchdog.h>
18 #include <sof/schedule/edf_schedule.h>
19 #include <sof/schedule/dp_schedule.h>
20 #include <sof/schedule/ll_schedule.h>
21 #include <sof/schedule/ll_schedule_domain.h>
22 #include <sof/trace/trace.h>
23 #include <ipc/header.h>
24 #include <ipc/info.h>
25 #include <kernel/abi.h>
26 #include <rtos/clk.h>
27
28 #include <sof_versions.h>
29 #include <stdint.h>
30
31 static const struct sof_ipc_fw_ready ready
32 __section(".fw_ready") = {
33 .hdr = {
34 .cmd = SOF_IPC_FW_READY,
35 .size = sizeof(struct sof_ipc_fw_ready),
36 },
37 .version = {
38 .hdr.size = sizeof(struct sof_ipc_fw_version),
39 .micro = SOF_MICRO,
40 .minor = SOF_MINOR,
41 .major = SOF_MAJOR,
42 /* opt-in; reproducible build by default */
43 #if BLD_COUNTERS
44 .build = SOF_BUILD, /* See version-build-counter.cmake */
45 .date = __DATE__,
46 .time = __TIME__,
47 #else /* BLD_COUNTERS */
48 .build = -1,
49 .date = "dtermin.\0",
50 .time = "fwready.\0",
51 #endif /* BLD_COUNTERS */
52 .tag = SOF_TAG,
53 .abi_version = SOF_ABI_VERSION,
54 .src_hash = SOF_SRC_HASH,
55 },
56 .flags = DEBUG_SET_FW_READY_FLAGS,
57 };
58
platform_boot_complete(uint32_t boot_message)59 int platform_boot_complete(uint32_t boot_message)
60 {
61 struct ipc_cmd_hdr header;
62
63 /* get any IPC specific boot message and optional data */
64 ipc_boot_complete_msg(&header, 0);
65
66 struct ipc_msg msg = {
67 .header = header.pri,
68 .extension = header.ext,
69 .tx_size = sizeof(ready),
70 .tx_data = (void *)&ready,
71 };
72
73 /* send fimrware ready message. */
74 return ipc_platform_send_msg(&msg);
75 }
76
77 /* Runs on the primary core only */
platform_init(struct sof * sof)78 int platform_init(struct sof *sof)
79 {
80 int ret;
81
82 trace_point(TRACE_BOOT_PLATFORM_CLOCK);
83 platform_clock_init(sof);
84
85 /* Set DSP clock to MAX using KCPS API. Value should be lowered when KCPS API
86 * for modules is implemented
87 */
88 ret = core_kcps_adjust(cpu_get_id(), CLK_MAX_CPU_HZ / 1000);
89 if (ret < 0)
90 return ret;
91
92 trace_point(TRACE_BOOT_PLATFORM_SCHED);
93 scheduler_init_edf();
94
95 /* init low latency timer domain and scheduler. Any failure is fatal */
96 sof->platform_timer_domain = zephyr_domain_init(PLATFORM_DEFAULT_CLOCK);
97 ret = scheduler_init_ll(sof->platform_timer_domain);
98 if (ret < 0)
99 return ret;
100
101 #if CONFIG_ZEPHYR_DP_SCHEDULER
102 ret = scheduler_dp_init();
103 if (ret < 0)
104 return ret;
105 #endif /* CONFIG_ZEPHYR_DP_SCHEDULER */
106
107 /* init the system agent */
108 trace_point(TRACE_BOOT_PLATFORM_AGENT);
109 sa_init(sof, CONFIG_SYSTICK_PERIOD);
110
111 /* init DMACs */
112 trace_point(TRACE_BOOT_PLATFORM_DMA);
113 ret = dmac_init(sof);
114 if (ret < 0)
115 return ret;
116
117 /* initialize the host IPC mechanisms */
118 trace_point(TRACE_BOOT_PLATFORM_IPC);
119 ipc_init(sof);
120 idc_init();
121
122 watchdog_init();
123
124 /* show heap status */
125 heap_trace_all(1);
126
127 return 0;
128 }
129
platform_context_save(struct sof * sof)130 int platform_context_save(struct sof *sof)
131 {
132 return 0;
133 }
134
