1# Low Latency Passthrough with volume Pipeline and PCM
2#
3# Pipeline Endpoints for connection are :-
4#
5#  host PCM_P --> B0 --> EQ_IIR 0 --> B1 --> sink DAI0
6
7# Include topology builder
8include(`utils.m4')
9include(`buffer.m4')
10include(`pcm.m4')
11include(`dai.m4')
12include(`bytecontrol.m4')
13include(`pipeline.m4')
14include(`eq_iir.m4')
15
16#
17# Controls
18#
19
20define(DEF_EQIIR_COEF, concat(`eqiir_coef_', PIPELINE_ID))
21define(DEF_EQIIR_PRIV, concat(`eqiir_priv_', PIPELINE_ID))
22
23# define filter. eq_iir_coef_flat.m4 is set by default
24ifdef(`PIPELINE_FILTER1', , `define(PIPELINE_FILTER1, eq_iir_coef_flat.m4)')
25include(PIPELINE_FILTER1)
26
27# EQ Bytes control with max value of 255
28define(MY_CONTROLBYTES, concat(`EQIIR_CONTROLBYTES_', PIPELINE_ID))
29C_CONTROLBYTES(MY_CONTROLBYTES, PIPELINE_ID,
30	CONTROLBYTES_OPS(bytes,
31		258 binds the mixer control to bytes get/put handlers, 258, 258),
32	CONTROLBYTES_EXTOPS(258 binds the mixer control to bytes get/put handlers,
33		258, 258),
34	, , ,
35	CONTROLBYTES_MAX(, 1024),
36	,
37	DEF_EQIIR_PRIV)
38
39#
40# Components and Buffers
41#
42
43# Host "EQ IIR Playback" PCM
44# with 2 sink and 0 source periods
45W_PCM_PLAYBACK(PCM_ID, EQ IIR Playback, 2, 0, SCHEDULE_CORE)
46
47# "EQ 0" has x sink period and 2 source periods
48W_EQ_IIR(0, PIPELINE_FORMAT, DAI_PERIODS, 2, SCHEDULE_CORE,
49	LIST(`		', "MY_CONTROLBYTES"))
50
51# Playback Buffers
52W_BUFFER(0, COMP_BUFFER_SIZE(2,
53	COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS,
54	COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)),
55	PLATFORM_HOST_MEM_CAP)
56W_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS,
57	COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS,
58	COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)),
59	PLATFORM_DAI_MEM_CAP)
60
61#
62# Pipeline Graph
63#
64#  host host PCM_P --> B0 --> EQ_IIR 0 --> B1 --> sink DAI0
65
66P_GRAPH(pipe-eq-iir-playback, PIPELINE_ID,
67	LIST(`		',
68	`dapm(N_BUFFER(0), N_PCMP(PCM_ID))',
69	`dapm(N_EQ_IIR(0), N_BUFFER(0))',
70	`dapm(N_BUFFER(1), N_EQ_IIR(0))'))
71
72#
73# Pipeline Source and Sinks
74#
75indir(`define', concat(`PIPELINE_SOURCE_', PIPELINE_ID), N_BUFFER(1))
76indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID),
77	EQ IIR Playback PCM_ID)
78
79#
80# PCM Configuration
81
82#
83PCM_CAPABILITIES(EQ IIR Playback PCM_ID, CAPABILITY_FORMAT_NAME(PIPELINE_FORMAT),
84	PCM_MIN_RATE, PCM_MAX_RATE, 2, PIPELINE_CHANNELS,
85	2, 16, 192, 16384, 65536, 65536)
86
87undefine(`MY_CONTROLBYTES')
88undefine(`DEF_EQIIR_COEF')
89undefine(`DEF_EQIIR_PRIV')
90