1#
2# Topology for generic Apollolake board with TDF8532
3#
4
5# Include topology builder
6include(`utils.m4')
7include(`dai.m4')
8include(`pipeline.m4')
9include(`ssp.m4')
10
11# Include TLV library
12include(`common/tlv.m4')
13
14# Include Token library
15include(`sof/tokens.m4')
16
17# Include Apollolake DSP configuration
18include(`platform/intel/bxt.m4')
19
20#
21# Define the pipelines
22#
23# PCM0 -----> Volume -----> SSP4
24# PCM1 <----> Volume <----> SSP2(Dirana Pb/Cp)
25# PCM2 <----> Volume <----> SSP0(BT HFP out/in)
26# PCM3 <----- Volume <----- SSP1(HDMI in)
27# PCM4 <----> Volume <----> SSP3(Modem out/in)
28# PCM5 <----> Volume <----> SSP5(TestPin out/in)
29#
30
31dnl PIPELINE_PCM_ADD(pipeline,
32dnl     pipe id, pcm, max channels, format,
33dnl     period, priority, core,
34dnl     pcm_min_rate, pcm_max_rate, pipeline_rate,
35dnl     time_domain, sched_comp)
36
37# Low Latency playback pipeline 1 on PCM 0 using max 4 channels of s32le.
38# 1000us deadline on core 0 with priority 0
39PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
40	1, 0, 4, s32le,
41	1000, 0, 0,
42	48000, 48000, 48000)
43
44# Low Latency playback pipeline 2 on PCM 1 using max 8 channels of s32le.
45# 1000us deadline on core 0 with priority 0
46PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
47	2, 1, 8, s32le,
48	1000, 0, 0,
49	48000, 48000, 48000)
50
51# Low Latency capture pipeline 3 on PCM 1 using max 8 channels of s32le.
52# 1000us deadline on core 0 with priority 0
53PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
54	3, 1, 8, s32le,
55	1000, 0, 0,
56	48000, 48000, 48000)
57
58# Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s16le.
59# 1000us deadline on core 0 with priority 0
60PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
61	4, 2, 2, s16le,
62	1000, 0, 0,
63	48000, 48000, 48000)
64
65# Low Latency capture pipeline 5 on PCM 2 using max 2 channels of s16le.
66# 1000us deadline on core 0 with priority 0
67PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
68	5, 2, 2, s16le,
69	1000, 0, 0,
70	48000, 48000, 48000)
71
72# Low Latency capture pipeline 6 on PCM 3 using max 2 channels of s16le.
73# 1000us deadline on core 0 with priority 0
74PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
75	6, 3, 2, s16le,
76	1000, 0, 0,
77	48000, 48000, 48000)
78
79# Low Latency playback pipeline 7 on PCM 4 using max 2 channels of s16le.
80# 1000us deadline on core 0 with priority 0
81PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
82	7, 4, 2, s16le,
83	1000, 0, 0,
84	48000, 48000, 48000)
85
86# Low Latency capture pipeline 8 on PCM 4 using max 2 channels of s16le.
87# 1000us deadline on core 0 with priority 0
88PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
89	8, 4, 2, s16le,
90	1000, 0, 0,
91	48000, 48000, 48000)
92
93# Low Latency playback pipeline 9 on PCM 5 using max 2 channels of s16le.
94# 1000us deadline on core 0 with priority 0
95PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
96	9, 5, 2, s16le,
97	1000, 0, 0,
98	48000, 48000, 48000)
99
100# Low Latency capture pipeline 10 on PCM 5 using max 2 channels of s16le.
101# 1000us deadline on core 0 with priority 0
102PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
103	10, 5, 2, s16le,
104	1000, 0, 0,
105	48000, 48000, 48000)
106
107
108#
109# DAIs configuration
110#
111
112dnl DAI_ADD(pipeline,
113dnl     pipe id, dai type, dai_index, dai_be,
114dnl     buffer, periods, format,
115dnl     deadline, priority, core, time_domain)
116
117# playback DAI is SSP0 using 2 periods
118# Buffers use s16le format, 1000us deadline on core 0 with priority 0
119DAI_ADD(sof/pipe-dai-playback.m4,
120	4, SSP, 0, SSP0-Codec,
121	PIPELINE_SOURCE_4, 2, s16le,
122	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
123
124# capture DAI is SSP0 using 2 periods
125# Buffers use s16le format, 1000us deadline on core 0 with priority 0
126DAI_ADD(sof/pipe-dai-capture.m4,
127	5, SSP, 0, SSP0-Codec,
128	PIPELINE_SINK_5, 2, s16le,
129	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
130
131# capture DAI is SSP1 using 2 periods
132# Buffers use s16le format, 1000us deadline on core 0 with priority 0
133DAI_ADD(sof/pipe-dai-capture.m4,
134	6, SSP, 1, SSP1-Codec,
135	PIPELINE_SINK_6, 2, s16le,
136	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
137
138# playback DAI is SSP2 using 2 periods
139# Buffers use s32le format, 1000us deadline on core 0 with priority 0
140DAI_ADD(sof/pipe-dai-playback.m4,
141	2, SSP, 2, SSP2-Codec,
142	PIPELINE_SOURCE_2, 2, s32le,
143	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
144
145# capture DAI is SSP2 using 2 periods
146# Buffers use s32le format, 1000us deadline on core 0 with priority 0
147DAI_ADD(sof/pipe-dai-capture.m4,
148	3, SSP, 2, SSP2-Codec,
149	PIPELINE_SINK_3, 2, s32le,
150	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
151
152# playback DAI is SSP3 using 2 periods
153# Buffers use s16le format, 1000us deadline on core 0 with priority 0
154DAI_ADD(sof/pipe-dai-playback.m4,
155	7, SSP, 3, SSP3-Codec,
156	PIPELINE_SOURCE_7, 2, s16le,
157	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
158
159# capture DAI is SSP3 using 2 periods
160# Buffers use s16le format, 1000us deadline on core 0 with priority 0
161DAI_ADD(sof/pipe-dai-capture.m4,
162	8, SSP, 3, SSP3-Codec,
163	PIPELINE_SINK_8, 2, s16le,
164	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
165
166# playback DAI is SSP4 using 2 periods
167# Buffers use s32le format, 1000us deadline on core 0 with priority 0
168DAI_ADD(sof/pipe-dai-playback.m4,
169	1, SSP, 4, SSP4-Codec,
170	PIPELINE_SOURCE_1, 2, s32le,
171	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
172
173# playback DAI is SSP5 using 2 periods
174# Buffers use s16le format, 1000us deadline on core 0 with priority 0
175DAI_ADD(sof/pipe-dai-playback.m4,
176	9, SSP, 5, SSP5-Codec,
177	PIPELINE_SOURCE_9, 2, s16le,
178	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
179
180# capture DAI is SSP5 using 2 periods
181# Buffers use s16le format, 1000us deadline on core 0 with priority 0
182DAI_ADD(sof/pipe-dai-capture.m4,
183	10, SSP, 5, SSP5-Codec,
184	PIPELINE_SINK_10, 2, s16le,
185	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
186
187# PCM Low Latency, id 0
188PCM_DUPLEX_ADD(Port0, 2, PIPELINE_PCM_4, PIPELINE_PCM_5)
189PCM_CAPTURE_ADD(Port1, 3, PIPELINE_PCM_6)
190PCM_DUPLEX_ADD(Port2, 1, PIPELINE_PCM_2, PIPELINE_PCM_3)
191PCM_DUPLEX_ADD(Port3, 4, PIPELINE_PCM_7, PIPELINE_PCM_8)
192PCM_PLAYBACK_ADD(Port4, 0, PIPELINE_PCM_1)
193PCM_DUPLEX_ADD(Port5, 5, PIPELINE_PCM_9, PIPELINE_PCM_10)
194
195#
196# BE configurations - overrides config in ACPI if present
197#
198DAI_CONFIG(SSP, 0, 0, SSP0-Codec,
199	   SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
200		      SSP_CLOCK(bclk, 1536000, codec_slave),
201		      SSP_CLOCK(fsync, 48000, codec_slave),
202		      SSP_TDM(2, 16, 3, 3),
203		      SSP_CONFIG_DATA(SSP, 0, 16)))
204
205DAI_CONFIG(SSP, 1, 1, SSP1-Codec,
206	   SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
207		      SSP_CLOCK(bclk, 1536000, codec_slave),
208		      SSP_CLOCK(fsync, 48000, codec_slave),
209		      SSP_TDM(2, 16, 3, 3),
210		      SSP_CONFIG_DATA(SSP, 1, 16)))
211
212DAI_CONFIG(SSP, 2, 2, SSP2-Codec,
213	   SSP_CONFIG(DSP_B, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
214		      SSP_CLOCK(bclk, 12288000, codec_slave),
215		      SSP_CLOCK(fsync, 48000, codec_slave),
216		      SSP_TDM(8, 32, 255, 255),
217		      SSP_CONFIG_DATA(SSP, 2, 32)))
218
219DAI_CONFIG(SSP, 3, 3, SSP3-Codec,
220	   SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
221		      SSP_CLOCK(bclk, 1536000, codec_slave),
222		      SSP_CLOCK(fsync, 48000, codec_slave),
223		      SSP_TDM(2, 16, 3, 3),
224		      SSP_CONFIG_DATA(SSP, 3, 16)))
225
226DAI_CONFIG(SSP, 4, 4, SSP4-Codec,
227	   SSP_CONFIG(DSP_B, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
228		      SSP_CLOCK(bclk, 12288000, codec_slave),
229		      SSP_CLOCK(fsync, 48000, codec_slave),
230		      SSP_TDM(8, 32, 15, 15),
231		      SSP_CONFIG_DATA(SSP, 4, 32)))
232
233DAI_CONFIG(SSP, 5, 5, SSP5-Codec,
234	   SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
235		      SSP_CLOCK(bclk, 1536000, codec_slave),
236		      SSP_CLOCK(fsync, 48000, codec_slave),
237		      SSP_TDM(2, 16, 3, 3),
238		      SSP_CONFIG_DATA(SSP, 5, 16)))
239
240
241VIRTUAL_DAPM_ROUTE_IN(BtHfp_ssp0_in, SSP, 0, IN, 0)
242VIRTUAL_DAPM_ROUTE_OUT(BtHfp_ssp0_out, SSP, 0, OUT, 1)
243VIRTUAL_DAPM_ROUTE_IN(hdmi_ssp1_in, SSP, 1, IN, 2)
244VIRTUAL_DAPM_ROUTE_IN(dirana_in, SSP, 2, IN, 3)
245VIRTUAL_DAPM_ROUTE_IN(dirana_aux_in, SSP, 2, IN, 4)
246VIRTUAL_DAPM_ROUTE_IN(dirana_tuner_in, SSP, 2, IN, 5)
247VIRTUAL_DAPM_ROUTE_OUT(dirana_out, SSP, 2, OUT, 6)
248VIRTUAL_DAPM_ROUTE_IN(Modem_ssp3_in, SSP, 3, IN, 7)
249VIRTUAL_DAPM_ROUTE_OUT(Modem_ssp3_out, SSP, 3, OUT, 8)
250VIRTUAL_DAPM_ROUTE_OUT(codec0_out, SSP, 4, OUT, 9)
251VIRTUAL_DAPM_ROUTE_IN(TestPin_ssp5_in, SSP, 5, IN, 10)
252VIRTUAL_DAPM_ROUTE_OUT(TestPin_ssp5_out, SSP, 5, OUT, 11)
253VIRTUAL_WIDGET(ssp0 Tx, out_drv, 12)
254VIRTUAL_WIDGET(ssp0 Rx, out_drv, 13)
255VIRTUAL_WIDGET(ssp1 Rx, out_drv, 14)
256VIRTUAL_WIDGET(ssp2 Tx, out_drv, 15)
257VIRTUAL_WIDGET(ssp2 Rx, out_drv, 16)
258VIRTUAL_WIDGET(ssp3 Tx, out_drv, 17)
259VIRTUAL_WIDGET(ssp3 Rx, out_drv, 18)
260VIRTUAL_WIDGET(ssp4 Tx, out_drv, 19)
261VIRTUAL_WIDGET(ssp5 Tx, out_drv, 20)
262VIRTUAL_WIDGET(ssp5 Rx, out_drv, 21)
263